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From: OpenOCD-Gerrit <ope...@us...> - 2022-09-13 22:12:01
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- Log -----------------------------------------------------------------
commit 07d84bca32702f1c8405f7dc20dc18cc448ce39d
Author: Antonio Borneo <bor...@gm...>
Date: Mon Sep 5 23:56:18 2022 +0200
target: make local symbols static
Symbols that are not exported should be declared as static.
Change-Id: I2475524f4c14520e3163572560f4a9f276356ed5
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7168
Tested-by: jenkins
Reviewed-by: Tomas Vanek <va...@fb...>
diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 20e212e2b..8b0cf3b63 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -1837,7 +1837,7 @@ static int aarch64_remove_watchpoint(struct target *target,
* find out which watchpoint hits
* get exception address and compare the address to watchpoints
*/
-int aarch64_hit_watchpoint(struct target *target,
+static int aarch64_hit_watchpoint(struct target *target,
struct watchpoint **hit_watchpoint)
{
if (target->debug_reason != DBG_REASON_WATCHPOINT)
diff --git a/src/target/arc.c b/src/target/arc.c
index 63de3f930..2761bfa80 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -93,7 +93,7 @@ struct reg *arc_reg_get_by_name(struct reg_cache *first,
*
* @param target Target for which to reset caches states.
*/
-int arc_reset_caches_states(struct target *target)
+static int arc_reset_caches_states(struct target *target)
{
struct arc_common *arc = target_to_arc(target);
@@ -283,7 +283,7 @@ static int arc_set_register(struct reg *reg, uint8_t *buf)
return ERROR_OK;
}
-const struct reg_arch_type arc_reg_type = {
+static const struct reg_arch_type arc_reg_type = {
.get = arc_get_register,
.set = arc_set_register,
};
@@ -1401,7 +1401,7 @@ static int arc_target_create(struct target *target, Jim_Interp *interp)
* little endian, so different type of conversion should be done.
* Middle endian: instruction "aabbccdd", stored as "bbaaddcc"
*/
-int arc_write_instruction_u32(struct target *target, uint32_t address,
+static int arc_write_instruction_u32(struct target *target, uint32_t address,
uint32_t instr)
{
uint8_t value_buf[4];
@@ -1428,7 +1428,7 @@ int arc_write_instruction_u32(struct target *target, uint32_t address,
* case of little endian ARC instructions are in middle endian format, so
* different type of conversion should be done.
*/
-int arc_read_instruction_u32(struct target *target, uint32_t address,
+static int arc_read_instruction_u32(struct target *target, uint32_t address,
uint32_t *value)
{
uint8_t value_buf[4];
@@ -1694,7 +1694,7 @@ static int arc_remove_breakpoint(struct target *target,
return ERROR_OK;
}
-void arc_reset_actionpoints(struct target *target)
+static void arc_reset_actionpoints(struct target *target)
{
struct arc_common *arc = target_to_arc(target);
struct arc_actionpoint *ap_list = arc->actionpoints_list;
@@ -1965,7 +1965,7 @@ static int arc_hit_watchpoint(struct target *target, struct watchpoint **hit_wat
/* Helper function which switches core to single_step mode by
* doing aux r/w operations. */
-int arc_config_step(struct target *target, int enable_step)
+static int arc_config_step(struct target *target, int enable_step)
{
uint32_t value;
@@ -2001,7 +2001,7 @@ int arc_config_step(struct target *target, int enable_step)
return ERROR_OK;
}
-int arc_step(struct target *target, int current, target_addr_t address,
+static int arc_step(struct target *target, int current, target_addr_t address,
int handle_breakpoints)
{
/* get pointers to arch-specific information */
@@ -2165,7 +2165,7 @@ int arc_cache_invalidate(struct target *target)
* values directly from memory, bypassing cache, so if there are unflushed
* lines debugger will read invalid values, which will cause a lot of troubles.
* */
-int arc_dcache_flush(struct target *target)
+static int arc_dcache_flush(struct target *target)
{
uint32_t value, dc_ctrl_value;
bool has_to_set_dc_ctrl_im;
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 8c859f2d4..5b99cffd7 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -975,7 +975,7 @@ static int jim_handle_actionpoints_num(Jim_Interp *interp, int argc,
/* ----- Exported target commands ------------------------------------------ */
-const struct command_registration arc_l2_cache_group_handlers[] = {
+static const struct command_registration arc_l2_cache_group_handlers[] = {
{
.name = "auto",
.handler = arc_l2_cache_disable_auto_cmd,
@@ -986,7 +986,7 @@ const struct command_registration arc_l2_cache_group_handlers[] = {
COMMAND_REGISTRATION_DONE
};
-const struct command_registration arc_cache_group_handlers[] = {
+static const struct command_registration arc_cache_group_handlers[] = {
{
.name = "auto",
.handler = arc_l1_cache_disable_auto_cmd,
diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index b03136786..2653cbd7b 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -392,7 +392,7 @@ struct breakpoint *breakpoint_find(struct target *target, target_addr_t address)
return NULL;
}
-int watchpoint_add_internal(struct target *target, target_addr_t address,
+static int watchpoint_add_internal(struct target *target, target_addr_t address,
uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask)
{
struct watchpoint *watchpoint = target->watchpoints;
@@ -500,7 +500,7 @@ static void watchpoint_free(struct target *target, struct watchpoint *watchpoint
free(watchpoint);
}
-int watchpoint_remove_internal(struct target *target, target_addr_t address)
+static int watchpoint_remove_internal(struct target *target, target_addr_t address)
{
struct watchpoint *watchpoint = target->watchpoints;
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 8e9264b79..d0c6376a1 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1914,7 +1914,7 @@ int cortex_m_remove_watchpoint(struct target *target, struct watchpoint *watchpo
return ERROR_OK;
}
-int cortex_m_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
+static int cortex_m_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
{
if (target->debug_reason != DBG_REASON_WATCHPOINT)
return ERROR_FAIL;
diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c
index 29229588b..08a188324 100644
--- a/src/target/mem_ap.c
+++ b/src/target/mem_ap.c
@@ -185,7 +185,7 @@ static struct reg_arch_type mem_ap_reg_arch_type = {
.set = mem_ap_reg_set,
};
-const char *mem_ap_get_gdb_arch(struct target *target)
+static const char *mem_ap_get_gdb_arch(struct target *target)
{
return "arm";
}
commit a21489e9b92c3be75f7526525a3753633b732525
Author: Antonio Borneo <bor...@gm...>
Date: Mon Sep 5 23:55:25 2022 +0200
xtensa: make local symbols static
Symbols that are not exported should be declared as static.
Change-Id: Ieb627f7f896e4663b0d5b18c4ab1853b39d23d03
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: https://review.openocd.org/c/openocd/+/7167
Reviewed-by: Erhan Kurubas <erh...@es...>
Reviewed-by: Ian Thompson <ia...@ca...>
Tested-by: jenkins
diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c
index 8ad8bad83..9f36ca5a4 100644
--- a/src/target/espressif/esp32.c
+++ b/src/target/espressif/esp32.c
@@ -101,7 +101,7 @@ static inline struct esp32_common *target_to_esp32(struct target *target)
* 6. restore initial PC and the contents of ESP32_SMP_RTC_DATA_LOW
* TODO: some state of RTC_CNTL is not reset during SW_SYS_RST. Need to reset that manually. */
-const uint8_t esp32_reset_stub_code[] = {
+static const uint8_t esp32_reset_stub_code[] = {
#include "../../../contrib/loaders/reset/espressif/esp32/cpu_reset_handler_code.inc"
};
@@ -365,7 +365,7 @@ static int esp32_target_create(struct target *target, Jim_Interp *interp)
return ERROR_OK;
}
-COMMAND_HELPER(esp32_cmd_flashbootstrap_do, struct esp32_common *esp32)
+static COMMAND_HELPER(esp32_cmd_flashbootstrap_do, struct esp32_common *esp32)
{
int state = -1;
diff --git a/src/target/espressif/esp32s2.c b/src/target/espressif/esp32s2.c
index 4aef3791b..089534cfe 100644
--- a/src/target/espressif/esp32s2.c
+++ b/src/target/espressif/esp32s2.c
@@ -122,7 +122,7 @@ static int esp32s2_deassert_reset(struct target *target)
return ERROR_OK;
}
-int esp32s2_soft_reset_halt(struct target *target)
+static int esp32s2_soft_reset_halt(struct target *target)
{
LOG_TARGET_DEBUG(target, "begin");
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c
index 0da8552a3..58267956a 100644
--- a/src/target/espressif/esp32s3.c
+++ b/src/target/espressif/esp32s3.c
@@ -96,7 +96,7 @@ struct esp32s3_common {
* PRO CPU is halted, APP CPU is in reset.
*/
-const uint8_t esp32s3_reset_stub_code[] = {
+static const uint8_t esp32s3_reset_stub_code[] = {
#include "../../../contrib/loaders/reset/espressif/esp32s3/cpu_reset_handler_code.inc"
};
diff --git a/src/target/espressif/esp_semihosting.c b/src/target/espressif/esp_semihosting.c
index b1edef31d..f9e8b0200 100644
--- a/src/target/espressif/esp_semihosting.c
+++ b/src/target/espressif/esp_semihosting.c
@@ -15,7 +15,7 @@
#include "esp_semihosting.h"
#include "esp_xtensa.h"
-struct esp_semihost_data *target_to_esp_semihost_data(struct target *target)
+static struct esp_semihost_data __attribute__((unused)) *target_to_esp_semihost_data(struct target *target)
{
const char *arch = target_get_gdb_arch(target);
if (arch) {
@@ -27,7 +27,7 @@ struct esp_semihost_data *target_to_esp_semihost_data(struct target *target)
return NULL;
}
-int esp_semihosting_sys_seek(struct target *target, uint64_t fd, uint32_t pos, size_t whence)
+static int esp_semihosting_sys_seek(struct target *target, uint64_t fd, uint32_t pos, size_t whence)
{
struct semihosting *semihosting = target->semihosting;
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 2e978b387..a6e50ccc7 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -300,7 +300,7 @@ union xtensa_reg_val_u {
uint8_t buf[4];
};
-const struct xtensa_keyval_info_s xt_qerr[XT_QERR_NUM] = {
+static const struct xtensa_keyval_info_s xt_qerr[XT_QERR_NUM] = {
{ .chrval = "E00", .intval = ERROR_FAIL },
{ .chrval = "E01", .intval = ERROR_FAIL },
{ .chrval = "E02", .intval = ERROR_COMMAND_ARGUMENT_INVALID },
@@ -519,7 +519,7 @@ static int xtensa_queue_pwr_reg_write(struct xtensa *xtensa, unsigned int reg, u
}
/* NOTE: Assumes A3 has already been saved */
-int xtensa_window_state_save(struct target *target, uint32_t *woe)
+static int xtensa_window_state_save(struct target *target, uint32_t *woe)
{
struct xtensa *xtensa = target_to_xtensa(target);
int woe_dis;
@@ -547,7 +547,7 @@ int xtensa_window_state_save(struct target *target, uint32_t *woe)
}
/* NOTE: Assumes A3 has already been saved */
-void xtensa_window_state_restore(struct target *target, uint32_t woe)
+static void xtensa_window_state_restore(struct target *target, uint32_t woe)
{
struct xtensa *xtensa = target_to_xtensa(target);
if (xtensa->core_config->windowed) {
@@ -2983,7 +2983,7 @@ const char *xtensa_get_gdb_arch(struct target *target)
}
/* exe <ascii-encoded hexadecimal instruction bytes> */
-COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
+static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
diff --git a/src/target/xtensa/xtensa_chip.c b/src/target/xtensa/xtensa_chip.c
index c609245a2..6e1931349 100644
--- a/src/target/xtensa/xtensa_chip.c
+++ b/src/target/xtensa/xtensa_chip.c
@@ -120,7 +120,7 @@ static int xtensa_chip_target_create(struct target *target, Jim_Interp *interp)
return ERROR_OK;
}
-void xtensa_chip_target_deinit(struct target *target)
+static void xtensa_chip_target_deinit(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
xtensa_target_deinit(target);
@@ -136,7 +136,7 @@ static int xtensa_chip_examine(struct target *target)
return retval;
}
-int xtensa_chip_jim_configure(struct target *target, struct jim_getopt_info *goi)
+static int xtensa_chip_jim_configure(struct target *target, struct jim_getopt_info *goi)
{
static bool dap_configured;
int ret = adiv5_jim_configure(target, goi);
-----------------------------------------------------------------------
Summary of changes:
src/target/aarch64.c | 2 +-
src/target/arc.c | 16 ++++++++--------
src/target/arc_cmd.c | 4 ++--
src/target/breakpoints.c | 4 ++--
src/target/cortex_m.c | 2 +-
src/target/espressif/esp32.c | 4 ++--
src/target/espressif/esp32s2.c | 2 +-
src/target/espressif/esp32s3.c | 2 +-
src/target/espressif/esp_semihosting.c | 4 ++--
src/target/mem_ap.c | 2 +-
src/target/xtensa/xtensa.c | 8 ++++----
src/target/xtensa/xtensa_chip.c | 4 ++--
12 files changed, 27 insertions(+), 27 deletions(-)
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