Menu
▾
▴
Re: [OpenOCD-user] JTAG connection on SSE-710
|
From: Chae-yun L. <all...@gm...> - 2022-03-30 08:58:55
|
Thanks for your reply. >> Have you checkout the whole series ending with https://review.openocd.org/5591/ ? Yes, you can see the information as below, ================================================================ $ git log -n1 commit 3f3ba7d3c1a7dcabae97fba4d1dcf3d94498c489 (HEAD) Author: Daniel Goehring <dgo...@os...> Date: Fri Apr 3 19:28:03 2020 -0400 target/board: Add Ampere QS|MQ config files Add Ampere Altra ("Quicksilver") and Ampere Altra Max ("Mystique") target/board configuration files. The target configuration file supports silicon and emulation. The board configuration files support 1 and 2 socket platforms. Tested on Ampere emulation and silicon Change-Id: I036c798a50624e30ab51ccd2895b6f60c40be096 Signed-off-by: Daniel Goehring <dgo...@os...> ================================================================ >> Try to telnet in OpenOCD and check if the command "targets" shows the CA53. >> Also command "dap info" should give you the whole dump of the ROM tables. I'm not sure if that is CA53 or not. Please refer the following log, ================================================================ > targets TargetName Type Endian TapName State -- ------------------ ---------- ------ ------------------ ------------ 0 BLABLA.armv8.apb mem_ap little BLABLA.armv8.tap running 1 BLABLA.armv8.axi mem_ap little BLABLA.armv8.tap running 2* temptarget.armv8_0 aarch64 little BLABLA.armv8.tap running > > dap info AP # 0x20000 Peripheral ID 0x04000bb9ef Designer is 0x23b, ARM Ltd Part is 0x9ef, Unrecognized Component class is 0x9, CoreSight component Type is 0x00, Miscellaneous, other Dev Arch is 0x47700a57, ARM Ltd "unknown" rev.0 ================================================================ >> Do you have any error or warning if you run OpenOCD with the command line flag "-d" ? Sure. I dumped the log with the command line flag "-d", but there are no warnings or errors. Please refer the following log, ================================================================ $ openocd -f tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f tcl/target/deeperi.cfg -d Open On-Chip Debugger 0.11.0+dev-00587-g3f3ba7d3c (2022-03-28-14:14) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html User : 3 2 options.c:63 configuration_output_handler(): debug_level: 3 User : 4 2 options.c:63 configuration_output_handler(): Debug: 5 2 options.c:244 add_default_dirs(): bindir=/usr/local/bin Debug: 6 2 options.c:245 add_default_dirs(): pkgdatadir=/usr/local/share/openocd Debug: 7 2 options.c:246 add_default_dirs(): exepath=/usr/local/bin Debug: 8 2 options.c:247 add_default_dirs(): bin2data=../share/openocd Debug: 9 2 configuration.c:44 add_script_search_dir(): adding C:/Users/uniqu/AppData/Roaming/OpenOCD Debug: 10 3 configuration.c:44 add_script_search_dir(): adding /home/uniqu/.config/openocd Debug: 11 3 configuration.c:44 add_script_search_dir(): adding /home/uniqu/.openocd Debug: 12 3 configuration.c:44 add_script_search_dir(): adding /usr/local/bin/../share/openocd/site Debug: 13 3 configuration.c:44 add_script_search_dir(): adding /usr/local/bin/../share/openocd/scripts Debug: 14 3 command.c:166 script_debug(): command - ocd_find tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg Debug: 15 3 configuration.c:99 find_file(): found tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg Debug: 16 4 command.c:166 script_debug(): command - adapter driver ftdi Debug: 17 4 command.c:166 script_debug(): command - ftdi device_desc Olimex OpenOCD JTAG ARM-USB-TINY-H Debug: 18 4 command.c:166 script_debug(): command - ftdi vid_pid 0x15ba 0x002a Debug: 19 4 command.c:166 script_debug(): command - ftdi layout_init 0x0808 0x0a1b Debug: 20 4 command.c:166 script_debug(): command - ftdi layout_signal nSRST -oe 0x0200 Debug: 21 4 command.c:166 script_debug(): command - ftdi layout_signal nTRST -data 0x0100 -oe 0x0100 Debug: 22 4 command.c:166 script_debug(): command - ftdi layout_signal LED -data 0x0800 Debug: 23 4 command.c:166 script_debug(): command - ocd_find tcl/target/deeperi.cfg Debug: 24 5 configuration.c:99 find_file(): found tcl/target/deeperi.cfg Debug: 25 5 command.c:166 script_debug(): command - adapter speed 1000 Debug: 26 5 adapter.c:180 adapter_config_khz(): handle adapter khz Debug: 27 5 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 28 5 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 29 6 command.c:166 script_debug(): command - transport select Info : 30 6 transport.c:276 jim_transport_select(): auto-selecting first available session transport "jtag". To override use 'transport select <transport>'. Debug: 31 6 command.c:166 script_debug(): command - transport select Debug: 32 6 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 33 6 command.c:166 script_debug(): command - jtag_ntrst_delay 100 Debug: 34 6 command.c:166 script_debug(): command - reset_config trst_only Debug: 35 6 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 36 6 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 37 7 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 38 7 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 39 7 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 40 7 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 41 7 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 42 7 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 43 7 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 44 7 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 45 7 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 46 7 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 47 7 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 48 7 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 49 8 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 50 8 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 51 8 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 52 8 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 53 8 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 54 8 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 55 8 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 56 8 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 57 8 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 58 8 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 59 8 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 60 8 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 61 9 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 62 9 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 63 9 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 64 9 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 65 9 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 66 9 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 67 9 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 68 9 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 69 9 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 70 9 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 71 9 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 72 9 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 73 10 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 74 10 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 75 10 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 76 10 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 77 10 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 78 10 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 79 10 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 80 10 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 81 10 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 82 10 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 83 10 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 84 10 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 85 11 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 86 11 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 87 11 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 88 11 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 89 11 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 90 11 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 91 11 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 92 11 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 93 11 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 94 11 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 95 11 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 96 11 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 97 12 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 98 12 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 99 12 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 100 12 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 101 12 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 102 12 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 103 12 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 104 12 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 105 13 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 106 13 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 107 13 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 108 13 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 109 13 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 110 13 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 111 13 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 112 14 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 113 14 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 114 14 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 115 14 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 116 14 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 117 14 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 118 14 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 119 14 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 120 14 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 121 14 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 122 14 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 123 14 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 124 15 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 125 15 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 126 15 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 127 15 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 128 15 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 129 15 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 130 15 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 131 15 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 132 15 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 133 15 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 134 15 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 135 15 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 136 16 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 137 16 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 138 16 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 139 16 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 140 16 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 141 16 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 142 16 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 143 16 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 144 16 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 145 16 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 146 16 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 147 16 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 148 17 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 149 17 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 150 17 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 151 17 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 152 17 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 153 17 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 154 17 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 155 17 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 156 17 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 157 17 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 158 17 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 159 17 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 160 17 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 161 18 command.c:166 script_debug(): command - expr $_COREMASK_LO & $_MASK Debug: 162 18 command.c:166 script_debug(): command - expr $_MASK << 0x1 Debug: 163 18 command.c:166 script_debug(): command - jtag newtap BLABLA armv8.tap -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id 0x4BA06477 Debug: 164 18 tcl.c:568 jim_newtap_cmd(): Creating New Tap, Chip: BLABLA, Tap: armv8.tap, Dotted: BLABLA.armv8.tap, 8 params Debug: 165 18 tcl.c:593 jim_newtap_cmd(): Processing option: -irlen Debug: 166 18 tcl.c:593 jim_newtap_cmd(): Processing option: -ircapture Debug: 167 18 tcl.c:593 jim_newtap_cmd(): Processing option: -irmask Debug: 168 18 tcl.c:593 jim_newtap_cmd(): Processing option: -expected-id Debug: 169 18 core.c:1468 jtag_tap_init(): Created Tap: BLABLA.armv8.tap @ abs position 0, irlen 4, capture: 0x1 mask: 0x3 Debug: 170 18 command.c:166 script_debug(): command - dap create BLABLA.armv8.dap -chain-position BLABLA.armv8.tap -adiv6 Debug: 171 19 command.c:166 script_debug(): command - target create BLABLA.armv8.apb mem_ap -endian little -dap BLABLA.armv8.dap -ap-num 0x00000000 Debug: 172 19 command.c:166 script_debug(): command - target create BLABLA.armv8.axi mem_ap -endian little -dap BLABLA.armv8.dap -ap-num 0x00020000 Debug: 173 19 command.c:166 script_debug(): command - BLABLA.armv8.dap apsel 0x00020000 Debug: 174 19 command.c:166 script_debug(): command - BLABLA.armv8.dap apcsw default Debug: 175 19 arm_adi_v5.c:1097 dap_get_config_ap(): refcount AP#0x20000 get_config 1 Debug: 176 19 arm_adi_v5.c:1112 dap_put_ap(): refcount AP#0x20000 put 0 Debug: 177 19 command.c:166 script_debug(): command - BLABLA.armv8.dap apcsw 0x00006000 0x7F006000 Debug: 178 19 arm_adi_v5.c:1097 dap_get_config_ap(): refcount AP#0x20000 get_config 1 Debug: 179 20 arm_adi_v5.c:1112 dap_put_ap(): refcount AP#0x20000 put 0 Debug: 180 20 command.c:166 script_debug(): command - cti create temptarget.armv8_0.cti -dap BLABLA.armv8.dap -ap-num 0x00000000 -baseaddr 0x12018000 Debug: 181 20 arm_adi_v5.c:1087 dap_get_ap(): refcount AP#0x0 get 1 Debug: 182 20 command.c:166 script_debug(): command - target create temptarget.armv8_0 aarch64 -endian little -dap BLABLA.armv8.dap -ap-num 0x00000000 -dbgbase 0x12010000 -rtos hwthread -cti temptarget.armv8_0.cti -coreid 0 Info : 183 20 hwthread.c:396 hwthread_create(): Hardware thread awareness created Debug: 184 20 command.c:166 script_debug(): command - temptarget.armv8_0 configure -event reset-init temptarget.armv8_0.cti write INEN0 0x00000000 temptarget.armv8_0.cti write INEN1 0x00000000 temptarget.armv8_0.cti write INEN2 0x00000000 temptarget.armv8_0.cti write INEN3 0x00000000 temptarget.armv8_0.cti write INEN4 0x00000000 temptarget.armv8_0.cti write INEN5 0x00000000 temptarget.armv8_0.cti write INEN6 0x00000000 temptarget.armv8_0.cti write INEN7 0x00000000 temptarget.armv8_0.cti write INEN8 0x00000000 temptarget.armv8_0.cti write OUTEN0 0x00000000 temptarget.armv8_0.cti write OUTEN1 0x00000000 temptarget.armv8_0.cti write OUTEN2 0x00000000 temptarget.armv8_0.cti write OUTEN3 0x00000000 temptarget.armv8_0.cti write OUTEN4 0x00000000 temptarget.armv8_0.cti write OUTEN5 0x00000000 temptarget.armv8_0.cti write OUTEN6 0x00000000 temptarget.armv8_0.cti write OUTEN7 0x00000000 temptarget.armv8_0.cti write OUTEN8 0x00000000 Info : 185 26 server.c:311 add_service(): Listening on port 6666 for tcl connections Info : 186 27 server.c:311 add_service(): Listening on port 4444 for telnet connections Debug: 187 27 command.c:166 script_debug(): command - init Debug: 188 27 command.c:166 script_debug(): command - target init Debug: 189 27 command.c:166 script_debug(): command - target names Debug: 190 27 command.c:166 script_debug(): command - BLABLA.armv8.apb cget -event gdb-flash-erase-start Debug: 191 27 command.c:166 script_debug(): command - BLABLA.armv8.apb configure -event gdb-flash-erase-start reset init Debug: 192 27 command.c:166 script_debug(): command - BLABLA.armv8.apb cget -event gdb-flash-write-end Debug: 193 28 command.c:166 script_debug(): command - BLABLA.armv8.apb configure -event gdb-flash-write-end reset halt Debug: 194 28 command.c:166 script_debug(): command - BLABLA.armv8.apb cget -event gdb-attach Debug: 195 28 command.c:166 script_debug(): command - BLABLA.armv8.apb configure -event gdb-attach halt 1000 Debug: 196 28 command.c:166 script_debug(): command - BLABLA.armv8.axi cget -event gdb-flash-erase-start Debug: 197 28 command.c:166 script_debug(): command - BLABLA.armv8.axi configure -event gdb-flash-erase-start reset init Debug: 198 28 command.c:166 script_debug(): command - BLABLA.armv8.axi cget -event gdb-flash-write-end Debug: 199 28 command.c:166 script_debug(): command - BLABLA.armv8.axi configure -event gdb-flash-write-end reset halt Debug: 200 28 command.c:166 script_debug(): command - BLABLA.armv8.axi cget -event gdb-attach Debug: 201 28 command.c:166 script_debug(): command - BLABLA.armv8.axi configure -event gdb-attach halt 1000 Debug: 202 28 command.c:166 script_debug(): command - temptarget.armv8_0 cget -event gdb-flash-erase-start Debug: 203 29 command.c:166 script_debug(): command - temptarget.armv8_0 configure -event gdb-flash-erase-start reset init Debug: 204 29 command.c:166 script_debug(): command - temptarget.armv8_0 cget -event gdb-flash-write-end Debug: 205 29 command.c:166 script_debug(): command - temptarget.armv8_0 configure -event gdb-flash-write-end reset halt Debug: 206 29 command.c:166 script_debug(): command - temptarget.armv8_0 cget -event gdb-attach Debug: 207 29 command.c:166 script_debug(): command - temptarget.armv8_0 configure -event gdb-attach halt 1000 Debug: 208 29 target.c:1650 handle_target_init_command(): Initializing targets... Debug: 209 29 mem_ap.c:69 mem_ap_init_target(): mem_ap_init_target Debug: 210 29 mem_ap.c:69 mem_ap_init_target(): mem_ap_init_target Debug: 211 29 semihosting_common.c:99 semihosting_common_init(): Debug: 212 30 ftdi.c:665 ftdi_initialize(): ftdi interface using shortest path jtag state transitions Debug: 213 66 mpsse.c:423 mpsse_purge(): - Debug: 214 66 mpsse.c:704 mpsse_loopback_config(): off Debug: 215 66 mpsse.c:749 mpsse_set_frequency(): target 1000000 Hz Debug: 216 66 mpsse.c:741 mpsse_rtck_config(): off Debug: 217 66 mpsse.c:730 mpsse_divide_by_5_config(): off Debug: 218 66 mpsse.c:710 mpsse_set_divisor(): 29 Debug: 219 66 mpsse.c:773 mpsse_set_frequency(): actually 1000000 Hz Debug: 220 66 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 221 67 adapter.c:148 adapter_khz_to_speed(): have adapter set up Debug: 222 67 mpsse.c:749 mpsse_set_frequency(): target 1000000 Hz Debug: 223 67 mpsse.c:741 mpsse_rtck_config(): off Debug: 224 67 mpsse.c:730 mpsse_divide_by_5_config(): off Debug: 225 67 mpsse.c:710 mpsse_set_divisor(): 29 Debug: 226 67 mpsse.c:773 mpsse_set_frequency(): actually 1000000 Hz Debug: 227 67 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 228 67 adapter.c:148 adapter_khz_to_speed(): have adapter set up Info : 229 67 adapter.c:108 adapter_init(): clock speed 1000 kHz Debug: 230 67 openocd.c:143 handle_init_command(): Debug Adapter init complete Debug: 231 67 command.c:166 script_debug(): command - transport init Debug: 232 67 transport.c:230 handle_transport_init(): handle_transport_init Debug: 233 68 core.c:824 jtag_add_reset(): SRST line released Debug: 234 68 core.c:849 jtag_add_reset(): TRST line released Debug: 235 68 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 236 215 command.c:166 script_debug(): command - jtag arp_init Debug: 237 215 core.c:1503 jtag_init_inner(): Init JTAG chain Debug: 238 215 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 239 216 core.c:1228 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS Debug: 240 216 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset Info : 241 217 core.c:1127 jtag_examine_chain_display(): JTAG tap: BLABLA.armv8.tap tap/device found: 0x4ba06477 (mfg: 0x23b (ARM Ltd), part: 0xba06, ver: 0x4) Debug: 242 217 core.c:1358 jtag_validate_ircapture(): IR capture validation scan Debug: 243 218 core.c:1415 jtag_validate_ircapture(): BLABLA.armv8.tap: IR capture 0x01 Debug: 244 218 command.c:166 script_debug(): command - dap init Debug: 245 218 arm_dap.c:109 dap_init_all(): Initializing all DAPs ... Debug: 246 218 arm_dap.c:136 dap_init_all(): DAP BLABLA.armv8.tap configured to use ADIv6 protocol by user cfg file Debug: 247 218 arm_adi_v5.c:670 dap_dp_init(): BLABLA.armv8.dap Debug: 248 218 arm_adi_v5.c:702 dap_dp_init(): DAP: wait CDBGPWRUPACK Debug: 249 218 arm_adi_v5.h:645 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000 Debug: 250 219 arm_adi_v5.c:710 dap_dp_init(): DAP: wait CSYSPWRUPACK Debug: 251 219 arm_adi_v5.h:645 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000 Debug: 252 221 adi_v5_jtag.c:372 adi_jtag_dp_scan_u32(): DP BANKSEL: 1 Debug: 253 221 adi_v5_jtag.c:372 adi_jtag_dp_scan_u32(): DP BANKSEL: 0 Debug: 254 221 openocd.c:160 handle_init_command(): Examining targets... Debug: 255 221 target.c:1836 target_call_event_callbacks(): target event 19 (examine-start) for core BLABLA.armv8.apb Debug: 256 221 arm_adi_v5.c:1087 dap_get_ap(): refcount AP#0x0 get 2 Debug: 257 222 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: df0 Debug: 258 223 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 259 224 arm_adi_v5.c:816 mem_ap_init(): MEM_AP Packed Transfers: disabled Debug: 260 224 arm_adi_v5.c:827 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 261 224 target.c:1836 target_call_event_callbacks(): target event 21 (examine-end) for core BLABLA.armv8.apb Debug: 262 224 target.c:1836 target_call_event_callbacks(): target event 19 (examine-start) for core BLABLA.armv8.axi Debug: 263 224 arm_adi_v5.c:1087 dap_get_ap(): refcount AP#0x20000 get 1 Debug: 264 224 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: 20df0 Debug: 265 225 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: 20d00 Debug: 266 227 arm_adi_v5.c:816 mem_ap_init(): MEM_AP Packed Transfers: disabled Debug: 267 227 arm_adi_v5.c:827 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 268 227 target.c:1836 target_call_event_callbacks(): target event 21 (examine-end) for core BLABLA.armv8.axi Debug: 269 227 target.c:1836 target_call_event_callbacks(): target event 19 (examine-start) for core temptarget.armv8_0 Debug: 270 227 arm_adi_v5.c:1087 dap_get_ap(): refcount AP#0x0 get 3 Debug: 271 227 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: df0 Debug: 272 228 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 273 230 arm_adi_v5.c:816 mem_ap_init(): MEM_AP Packed Transfers: disabled Debug: 274 230 arm_adi_v5.c:827 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 275 230 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 276 231 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 277 231 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 278 231 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 279 231 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 280 231 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 281 231 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 282 232 aarch64.c:2636 aarch64_examine_first(): cpuid = 0x00000000 Debug: 283 233 aarch64.c:2637 aarch64_examine_first(): ttypr = 0x00000000 Debug: 284 233 aarch64.c:2638 aarch64_examine_first(): debug = 0x00000000 Info : 285 233 armv8_dpm.c:1469 armv8_dpm_setup(): temptarget.armv8_0: hardware has 1 breakpoints, 1 watchpoints Debug: 286 233 armv8_dpm.c:481 dpmv8_bpwp_disable(): A: bpwp disable, cr 12010408 Debug: 287 233 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 288 233 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 289 234 armv8_dpm.c:481 dpmv8_bpwp_disable(): A: bpwp disable, cr 12010808 Debug: 290 234 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 291 234 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 292 235 aarch64.c:2679 aarch64_examine_first(): Configured 1 hw breakpoints, 1 watchpoints Debug: 293 235 aarch64.c:212 aarch64_init_debug_access(): temptarget.armv8_0 Debug: 294 235 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 295 235 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 296 236 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 297 236 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 298 236 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 299 237 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 300 237 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 301 237 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 302 238 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 303 238 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 304 239 target.c:1836 target_call_event_callbacks(): target event 21 (examine-end) for core temptarget.armv8_0 Debug: 305 239 command.c:166 script_debug(): command - flash init Debug: 306 239 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d00 Debug: 307 239 adi_v5_jtag.c:771 jtag_ap_q_bankselect(): AP BANKSEL: d10 Debug: 308 240 tcl.c:1386 handle_flash_init_command(): Initializing flash devices... Debug: 309 240 command.c:166 script_debug(): command - nand init Debug: 310 241 tcl.c:498 handle_nand_init_command(): Initializing NAND devices... Debug: 311 241 command.c:166 script_debug(): command - pld init Debug: 312 242 pld.c:205 handle_pld_init_command(): Initializing PLDs... Debug: 313 242 command.c:166 script_debug(): command - tpiu init Info : 314 242 gdb_server.c:3586 gdb_target_add_one(): gdb port disabled Info : 315 242 gdb_server.c:3586 gdb_target_add_one(): gdb port disabled Info : 316 242 gdb_server.c:3547 gdb_target_start(): starting gdb server for temptarget.armv8_0 on 3333 Info : 317 243 server.c:311 add_service(): Listening on port 3333 for gdb connections ================================================================ |
