From: OpenOCD-Gerrit <ope...@us...> - 2022-03-12 09:41:48
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via de4f52179c513cba194079f9fe1ce3a0532bdc9f (commit) via 9f1b4bbe706b3df40793a9573d7f6471a2442222 (commit) from 4ea21b95f9562ae13ef200461180bc72bbad8926 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit de4f52179c513cba194079f9fe1ce3a0532bdc9f Author: Nishanth Menon <nm...@ti...> Date: Thu Oct 14 09:57:22 2021 -0500 tcl/board: Add J721s2 EVM basic support Add basic connection details with J721s2 EVM. For further details, see https://www.ti.com/lit/zip/sprr439 Signed-off-by: Nishanth Menon <nm...@ti...> Change-Id: I68f8818c492ea6e07c14f2da305671c26da801cb Reviewed-on: https://review.openocd.org/c/openocd/+/6797 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/tcl/board/ti_j721s2evm.cfg b/tcl/board/ti_j721s2evm.cfg new file mode 100644 index 000000000..72418b57b --- /dev/null +++ b/tcl/board/ti_j721s2evm.cfg @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ +# +# Texas Instruments J721s2 EVM +# Link(SoM): https://www.ti.com/lit/zip/sprr439 +# + +# J721s2 EVM has an xds110 onboard. +source [find interface/xds110.cfg] + +transport select jtag + +# default JTAG configuration has only SRST and no TRST +reset_config srst_only srst_push_pull + +# delay after SRST goes inactive +adapter srst delay 20 + +if { ![info exists SOC] } { + set SOC j721s2 +} + +source [find target/ti_k3.cfg] + +adapter speed 2500 commit 9f1b4bbe706b3df40793a9573d7f6471a2442222 Author: Nishanth Menon <nm...@ti...> Date: Thu Oct 14 09:55:49 2021 -0500 tcl/target/ti_k3: Add J721S2 SoC Add support for the latest in TI k3 family J721S2 SoC. For further details, see http://www.ti.com/lit/pdf/spruj28 Signed-off-by: Nishanth Menon <nm...@ti...> Change-Id: I608ab4513ffb6b5c4166ba423e7d0dddbbb3bbfd Reviewed-on: https://review.openocd.org/c/openocd/+/6796 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg index f2267ca12..604083758 100644 --- a/tcl/target/ti_k3.cfg +++ b/tcl/target/ti_k3.cfg @@ -114,6 +114,26 @@ switch $_soc { # M3 CTI base set CM3_CTIBASE {0x20001000} } + j721s2 { + set _CHIPNAME j721s2 + set _K3_DAP_TAPID 0x0bb7502f + + # J721s2 has 1 cluster of 2 A72 cores. + set _armv8_cpu_name a72 + set _armv8_cores 2 + + # J721s2 has 3 clusters of 2 R5 cores each. + set _r5_cores 6 + + # sysctrl CTI base + set CM3_CTIBASE {0x20001000} + # Sysctrl power-ap unlock offsets + set _sysctrl_ap_unlock_offsets {0xf0 0x78} + + # M4 processor + set _gp_mcu_cores 1 + set _gp_mcu_ap_unlock_offsets {0xf0 0x7c} + } default { echo "'$_soc' is invalid!" } ----------------------------------------------------------------------- Summary of changes: tcl/board/{ti_j721evm.cfg => ti_j721s2evm.cfg} | 9 +++++---- tcl/target/ti_k3.cfg | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+), 4 deletions(-) copy tcl/board/{ti_j721evm.cfg => ti_j721s2evm.cfg} (62%) hooks/post-receive -- Main OpenOCD repository |