From: OpenOCD-Gerrit <ope...@us...> - 2021-12-11 17:44:49
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 654c18a4089a98afbc788de23b90e6b4b2b49ec4 (commit) from d8f64f8e356600557dc03283cce514fc6e75aac5 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 654c18a4089a98afbc788de23b90e6b4b2b49ec4 Author: Jan Matyas <ma...@co...> Date: Mon Nov 22 14:50:30 2021 +0100 doc: Updated RISC-V memory-related cmds in documentation - "riscv set_prefer_sba" - removed from the doc, superseded by the latter - "riscv set_mem_access" - new command, new entry added into the doc This change only addresses the documentation. The corresponding implementation of the RISC-V commands is already merged. Change-Id: I3c07672cde94324407cf667504dba5402f63a543 Signed-off-by: Jan Matyas <ma...@co...> Reviewed-on: https://review.openocd.org/c/openocd/+/6743 Reviewed-by: Antonio Borneo <bor...@gm...> Tested-by: jenkins diff --git a/doc/openocd.texi b/doc/openocd.texi index a441e5e36..61d398738 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -10272,9 +10272,27 @@ Set the maximum time to wait for a hart to come out of reset after reset is deasserted. @end deffn -@deffn {Command} {riscv set_prefer_sba} on|off -When on, prefer to use System Bus Access to access memory. When off (default), -prefer to use the Program Buffer to access memory. +@deffn {Command} {riscv set_scratch_ram} none|[address] +Set the address of 16 bytes of scratch RAM the debugger can use, or 'none'. +This is used to access 64-bit floating point registers on 32-bit targets. +@end deffn + +@deffn Command {riscv set_mem_access} method1 [method2] [method3] +Specify which RISC-V memory access method(s) shall be used, and in which order +of priority. At least one method must be specified. + +Available methods are: +@itemize +@item @code{progbuf} - Use RISC-V Debug Program Buffer to access memory. +@item @code{sysbus} - Access memory via RISC-V Debug System Bus interface. +@item @code{abstract} - Access memory via RISC-V Debug abstract commands. +@end itemize + +By default, all memory access methods are enabled in the following order: +@code{progbuf sysbus abstract}. + +This command can be used to change the memory access methods if the default +behavior is not suitable for a particular target. @end deffn @deffn {Command} {riscv set_enable_virtual} on|off ----------------------------------------------------------------------- Summary of changes: doc/openocd.texi | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) hooks/post-receive -- Main OpenOCD repository |