[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.11.0-402-gc55fbe190

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- Log -----------------------------------------------------------------
commit c55fbe190ba68b5fcc7b839c647f579479437293
Author: Antonio Borneo <bor...@gm...>
Date:   Tue Aug 17 00:13:05 2021 +0200

    arm_adi_v5: add arm SoC-600 part numbers
    
    Extract new part numbers from ARM CoreSight System-on-Chip SoC-600
    Technical Reference Manual Revision r4p1 and add them to the array
    dap_partnums.
    
    Change-Id: I88d8aa3c084f6e832b75032e75bfb6d377a08360
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/6450
    Tested-by: jenkins
    Reviewed-by: Daniel Goehring <dgo...@os...>
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 0d458e2b5..66d084952 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1131,6 +1131,7 @@ static const struct dap_part_nums {
 	{ ARM_ID, 0x00c, "Cortex-M4 SCS",              "(System Control Space)", },
 	{ ARM_ID, 0x00d, "CoreSight ETM11",            "(Embedded Trace)", },
 	{ ARM_ID, 0x00e, "Cortex-M7 FPB",              "(Flash Patch and Breakpoint)", },
+	{ ARM_ID, 0x193, "SoC-600 TSGEN",              "(Timestamp Generator)", },
 	{ ARM_ID, 0x470, "Cortex-M1 ROM",              "(ROM Table)", },
 	{ ARM_ID, 0x471, "Cortex-M0 ROM",              "(ROM Table)", },
 	{ ARM_ID, 0x490, "Cortex-A15 GIC",             "(Generic Interrupt Controller)", },
@@ -1192,6 +1193,19 @@ static const struct dap_part_nums {
 	{ ARM_ID, 0x9d7, "Cortex-A57 PMU",             "(Performance Monitor Unit)", },
 	{ ARM_ID, 0x9d8, "Cortex-A72 PMU",             "(Performance Monitor Unit)", },
 	{ ARM_ID, 0x9da, "Cortex-A35 PMU/CTI/ETM",     "(Performance Monitor Unit/Cross Trigger/ETM)", },
+	{ ARM_ID, 0x9e2, "SoC-600 APB-AP",             "(APB4 Memory Access Port)", },
+	{ ARM_ID, 0x9e3, "SoC-600 AHB-AP",             "(AHB5 Memory Access Port)", },
+	{ ARM_ID, 0x9e4, "SoC-600 AXI-AP",             "(AXI Memory Access Port)", },
+	{ ARM_ID, 0x9e5, "SoC-600 APv1 Adapter",       "(Access Port v1 Adapter)", },
+	{ ARM_ID, 0x9e6, "SoC-600 JTAG-AP",            "(JTAG Access Port)", },
+	{ ARM_ID, 0x9e7, "SoC-600 TPIU",               "(Trace Port Interface Unit)", },
+	{ ARM_ID, 0x9e8, "SoC-600 TMC ETR/ETS",        "(Embedded Trace Router/Streamer)", },
+	{ ARM_ID, 0x9e9, "SoC-600 TMC ETB",            "(Embedded Trace Buffer)", },
+	{ ARM_ID, 0x9ea, "SoC-600 TMC ETF",            "(Embedded Trace FIFO)", },
+	{ ARM_ID, 0x9eb, "SoC-600 ATB Funnel",         "(Trace Funnel)", },
+	{ ARM_ID, 0x9ec, "SoC-600 ATB Replicator",     "(Trace Replicator)", },
+	{ ARM_ID, 0x9ed, "SoC-600 CTI",                "(Cross Trigger)", },
+	{ ARM_ID, 0x9ee, "SoC-600 CATU",               "(Address Translation Unit)", },
 	{ ARM_ID, 0xc05, "Cortex-A5 Debug",            "(Debug Unit)", },
 	{ ARM_ID, 0xc07, "Cortex-A7 Debug",            "(Debug Unit)", },
 	{ ARM_ID, 0xc08, "Cortex-A8 Debug",            "(Debug Unit)", },

-----------------------------------------------------------------------

Summary of changes:
 src/target/arm_adi_v5.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)


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