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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.11.0-270-g45d5ec2ad
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From: OpenOCD-Gerrit <ope...@us...> - 2021-07-20 13:55:01
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- Log -----------------------------------------------------------------
commit 45d5ec2adeefe369d6a9999fcbcad546bf167241
Author: Antonio Borneo <bor...@gm...>
Date: Thu Apr 29 00:31:29 2021 +0200
flash: use lowercase for C variables
Change-Id: I1c3cb5d1c8c0d73adb3c7320a1b8e3940183cd17
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6347
Tested-by: jenkins
Reviewed-by: Marc Schink <de...@za...>
Reviewed-by: Xiang W <wx...@12...>
diff --git a/src/flash/nand/mxc.c b/src/flash/nand/mxc.c
index 90027070f..1fe7d30d2 100644
--- a/src/flash/nand/mxc.c
+++ b/src/flash/nand/mxc.c
@@ -207,9 +207,9 @@ static int mxc_init(struct nand_device *nand)
int validate_target_result;
uint16_t buffsize_register_content;
uint32_t sreg_content;
- uint32_t SREG = MX2_FMCR;
- uint32_t SEL_16BIT = MX2_FMCR_NF_16BIT_SEL;
- uint32_t SEL_FMS = MX2_FMCR_NF_FMS;
+ uint32_t sreg = MX2_FMCR;
+ uint32_t sel_16bit = MX2_FMCR_NF_16BIT_SEL;
+ uint32_t sel_fms = MX2_FMCR_NF_FMS;
int retval;
uint16_t nand_status_content;
/*
@@ -226,27 +226,27 @@ static int mxc_init(struct nand_device *nand)
mxc_nf_info->flags.one_kb_sram = 0;
if (mxc_nf_info->mxc_version == MXC_VERSION_MX31) {
- SREG = MX3_PCSR;
- SEL_16BIT = MX3_PCSR_NF_16BIT_SEL;
- SEL_FMS = MX3_PCSR_NF_FMS;
+ sreg = MX3_PCSR;
+ sel_16bit = MX3_PCSR_NF_16BIT_SEL;
+ sel_fms = MX3_PCSR_NF_FMS;
} else if (mxc_nf_info->mxc_version == MXC_VERSION_MX25) {
- SREG = MX25_RCSR;
- SEL_16BIT = MX25_RCSR_NF_16BIT_SEL;
- SEL_FMS = MX25_RCSR_NF_FMS;
+ sreg = MX25_RCSR;
+ sel_16bit = MX25_RCSR_NF_16BIT_SEL;
+ sel_fms = MX25_RCSR_NF_FMS;
} else if (mxc_nf_info->mxc_version == MXC_VERSION_MX35) {
- SREG = MX35_RCSR;
- SEL_16BIT = MX35_RCSR_NF_16BIT_SEL;
- SEL_FMS = MX35_RCSR_NF_FMS;
+ sreg = MX35_RCSR;
+ sel_16bit = MX35_RCSR_NF_16BIT_SEL;
+ sel_fms = MX35_RCSR_NF_FMS;
}
- target_read_u32(target, SREG, &sreg_content);
+ target_read_u32(target, sreg, &sreg_content);
if (!nand->bus_width) {
/* bus_width not yet defined. Read it from MXC_FMCR */
- nand->bus_width = (sreg_content & SEL_16BIT) ? 16 : 8;
+ nand->bus_width = (sreg_content & sel_16bit) ? 16 : 8;
} else {
/* bus_width forced in soft. Sync it to MXC_FMCR */
- sreg_content |= ((nand->bus_width == 16) ? SEL_16BIT : 0x00000000);
- target_write_u32(target, SREG, sreg_content);
+ sreg_content |= ((nand->bus_width == 16) ? sel_16bit : 0x00000000);
+ target_write_u32(target, sreg, sreg_content);
}
if (nand->bus_width == 16)
LOG_DEBUG("MXC_NF : bus is 16-bit width");
@@ -254,10 +254,10 @@ static int mxc_init(struct nand_device *nand)
LOG_DEBUG("MXC_NF : bus is 8-bit width");
if (!nand->page_size)
- nand->page_size = (sreg_content & SEL_FMS) ? 2048 : 512;
+ nand->page_size = (sreg_content & sel_fms) ? 2048 : 512;
else {
- sreg_content |= ((nand->page_size == 2048) ? SEL_FMS : 0x00000000);
- target_write_u32(target, SREG, sreg_content);
+ sreg_content |= ((nand->page_size == 2048) ? sel_fms : 0x00000000);
+ target_write_u32(target, sreg, sreg_content);
}
if (mxc_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) {
LOG_ERROR("NAND controller have only 1 kb SRAM, so "
@@ -649,18 +649,18 @@ static int mxc_read_page(struct nand_device *nand, uint32_t page,
}
if (nand->page_size > 512 && mxc_nf_info->flags.biswap_enabled) {
- uint32_t SPARE_BUFFER3;
+ uint32_t spare_buffer3;
/* BI-swap - work-around of mxc NFC for NAND device with page == 2k */
target_read_u16(target, MXC_NF_MAIN_BUFFER3 + 464, &swap1);
if (nfc_is_v1())
- SPARE_BUFFER3 = MXC_NF_V1_SPARE_BUFFER3 + 4;
+ spare_buffer3 = MXC_NF_V1_SPARE_BUFFER3 + 4;
else
- SPARE_BUFFER3 = MXC_NF_V2_SPARE_BUFFER3;
- target_read_u16(target, SPARE_BUFFER3, &swap2);
+ spare_buffer3 = MXC_NF_V2_SPARE_BUFFER3;
+ target_read_u16(target, spare_buffer3, &swap2);
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MXC_NF_MAIN_BUFFER3 + 464, new_swap1);
- target_write_u16(target, SPARE_BUFFER3, swap2);
+ target_write_u16(target, spare_buffer3, swap2);
}
if (data)
diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c
index 88f489f60..d3eadc786 100644
--- a/src/flash/nor/at91sam7.c
+++ b/src/flash/nor/at91sam7.c
@@ -104,11 +104,11 @@ static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode);
static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen);
-static const uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-static const uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-static const uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
+static const uint32_t mc_fmr[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
+static const uint32_t mc_fcr[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
+static const uint32_t mc_fsr[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
-static const char *EPROC[8] = {
+static const char *eproc[8] = {
"Unknown", "ARM946-E", "ARM7TDMI", "Unknown", "ARM920T", "ARM926EJ-S", "Unknown", "Unknown"
};
@@ -179,7 +179,7 @@ static long SRAMSIZ[16] = {
static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number)
{
uint32_t fsr;
- target_read_u32(target, MC_FSR[bank_number], &fsr);
+ target_read_u32(target, mc_fsr[bank_number], &fsr);
return fsr;
}
@@ -290,7 +290,7 @@ static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode)
LOG_DEBUG("fmcn[%i]: %i", bank->bank_number, (int)(fmcn));
fmr = fmcn << 16 | fws << 8;
- target_write_u32(target, MC_FMR[bank->bank_number], fmr);
+ target_write_u32(target, mc_fmr[bank->bank_number], fmr);
}
at91sam7_info->flashmode = mode;
@@ -329,7 +329,7 @@ static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t
struct target *target = bank->target;
fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd;
- target_write_u32(target, MC_FCR[bank->bank_number], fcr);
+ target_write_u32(target, mc_fcr[bank->bank_number], fcr);
LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u",
fcr,
bank->bank_number + 1,
@@ -993,7 +993,7 @@ static int get_at91sam7_info(struct flash_bank *bank, struct command_invocation
"Flashsize: 0x%8.8" PRIx32 "\n",
at91sam7_info->cidr,
at91sam7_info->cidr_arch,
- EPROC[at91sam7_info->cidr_eproc],
+ eproc[at91sam7_info->cidr_eproc],
at91sam7_info->cidr_version,
bank->size);
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 9598345c6..aa4171e0c 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1320,10 +1320,10 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
int retval;
/* try reading possible IDCODE registers, in the following order */
- uint32_t DBGMCU_IDCODE[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_G0, DBGMCU_IDCODE_L5};
+ uint32_t dbgmcu_idcode[] = {DBGMCU_IDCODE_L4_G4, DBGMCU_IDCODE_G0, DBGMCU_IDCODE_L5};
- for (unsigned int i = 0; i < ARRAY_SIZE(DBGMCU_IDCODE); i++) {
- retval = target_read_u32(bank->target, DBGMCU_IDCODE[i], id);
+ for (unsigned int i = 0; i < ARRAY_SIZE(dbgmcu_idcode); i++) {
+ retval = target_read_u32(bank->target, dbgmcu_idcode[i], id);
if ((retval == ERROR_OK) && ((*id & 0xfff) != 0) && ((*id & 0xfff) != 0xfff))
return ERROR_OK;
}
diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c
index 8284938f9..f1eba9cd3 100644
--- a/src/flash/nor/tms470.c
+++ b/src/flash/nor/tms470.c
@@ -39,7 +39,7 @@ struct tms470_flash_bank {
};
-static const struct flash_sector TMS470R1A256_SECTORS[] = {
+static const struct flash_sector tms470r1a256_sectors[] = {
{0x00000000, 0x00002000, -1, -1},
{0x00002000, 0x00002000, -1, -1},
{0x00004000, 0x00002000, -1, -1},
@@ -57,9 +57,9 @@ static const struct flash_sector TMS470R1A256_SECTORS[] = {
};
#define TMS470R1A256_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A256_SECTORS)
+ ARRAY_SIZE(tms470r1a256_sectors)
-static const struct flash_sector TMS470R1A288_BANK0_SECTORS[] = {
+static const struct flash_sector tms470r1a288_bank0_sectors[] = {
{0x00000000, 0x00002000, -1, -1},
{0x00002000, 0x00002000, -1, -1},
{0x00004000, 0x00002000, -1, -1},
@@ -67,9 +67,9 @@ static const struct flash_sector TMS470R1A288_BANK0_SECTORS[] = {
};
#define TMS470R1A288_BANK0_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A288_BANK0_SECTORS)
+ ARRAY_SIZE(tms470r1a288_bank0_sectors)
-static const struct flash_sector TMS470R1A288_BANK1_SECTORS[] = {
+static const struct flash_sector tms470r1a288_bank1_sectors[] = {
{0x00040000, 0x00010000, -1, -1},
{0x00050000, 0x00010000, -1, -1},
{0x00060000, 0x00010000, -1, -1},
@@ -77,9 +77,9 @@ static const struct flash_sector TMS470R1A288_BANK1_SECTORS[] = {
};
#define TMS470R1A288_BANK1_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A288_BANK1_SECTORS)
+ ARRAY_SIZE(tms470r1a288_bank1_sectors)
-static const struct flash_sector TMS470R1A384_BANK0_SECTORS[] = {
+static const struct flash_sector tms470r1a384_bank0_sectors[] = {
{0x00000000, 0x00002000, -1, -1},
{0x00002000, 0x00002000, -1, -1},
{0x00004000, 0x00004000, -1, -1},
@@ -93,9 +93,9 @@ static const struct flash_sector TMS470R1A384_BANK0_SECTORS[] = {
};
#define TMS470R1A384_BANK0_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A384_BANK0_SECTORS)
+ ARRAY_SIZE(tms470r1a384_bank0_sectors)
-static const struct flash_sector TMS470R1A384_BANK1_SECTORS[] = {
+static const struct flash_sector tms470r1a384_bank1_sectors[] = {
{0x00020000, 0x00008000, -1, -1},
{0x00028000, 0x00008000, -1, -1},
{0x00030000, 0x00008000, -1, -1},
@@ -103,9 +103,9 @@ static const struct flash_sector TMS470R1A384_BANK1_SECTORS[] = {
};
#define TMS470R1A384_BANK1_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A384_BANK1_SECTORS)
+ ARRAY_SIZE(tms470r1a384_bank1_sectors)
-static const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = {
+static const struct flash_sector tms470r1a384_bank2_sectors[] = {
{0x00040000, 0x00008000, -1, -1},
{0x00048000, 0x00008000, -1, -1},
{0x00050000, 0x00008000, -1, -1},
@@ -113,7 +113,7 @@ static const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = {
};
#define TMS470R1A384_BANK2_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A384_BANK2_SECTORS)
+ ARRAY_SIZE(tms470r1a384_bank2_sectors)
/* ---------------------------------------------------------------------- */
@@ -173,10 +173,10 @@ static int tms470_read_part_info(struct flash_bank *bank)
bank->base = 0x00000000;
bank->size = 256 * 1024;
bank->num_sectors = TMS470R1A256_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A256_SECTORS));
+ bank->sectors = malloc(sizeof(tms470r1a256_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A256_SECTORS, sizeof(TMS470R1A256_SECTORS));
+ (void)memcpy(bank->sectors, tms470r1a256_sectors, sizeof(tms470r1a256_sectors));
break;
case 0x2b:
@@ -187,21 +187,21 @@ static int tms470_read_part_info(struct flash_bank *bank)
bank->base = 0x00000000;
bank->size = 32 * 1024;
bank->num_sectors = TMS470R1A288_BANK0_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A288_BANK0_SECTORS));
+ bank->sectors = malloc(sizeof(tms470r1a288_bank0_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A288_BANK0_SECTORS,
- sizeof(TMS470R1A288_BANK0_SECTORS));
+ (void)memcpy(bank->sectors, tms470r1a288_bank0_sectors,
+ sizeof(tms470r1a288_bank0_sectors));
} else if ((bank->base >= 0x00040000) && (bank->base < 0x00080000)) {
tms470_info->ordinal = 1;
bank->base = 0x00040000;
bank->size = 256 * 1024;
bank->num_sectors = TMS470R1A288_BANK1_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A288_BANK1_SECTORS));
+ bank->sectors = malloc(sizeof(tms470r1a288_bank1_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A288_BANK1_SECTORS,
- sizeof(TMS470R1A288_BANK1_SECTORS));
+ (void)memcpy(bank->sectors, tms470r1a288_bank1_sectors,
+ sizeof(tms470r1a288_bank1_sectors));
} else {
LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".",
part_name, bank->base);
@@ -217,31 +217,31 @@ static int tms470_read_part_info(struct flash_bank *bank)
bank->base = 0x00000000;
bank->size = 128 * 1024;
bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS));
+ bank->sectors = malloc(sizeof(tms470r1a384_bank0_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS,
- sizeof(TMS470R1A384_BANK0_SECTORS));
+ (void)memcpy(bank->sectors, tms470r1a384_bank0_sectors,
+ sizeof(tms470r1a384_bank0_sectors));
} else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) {
tms470_info->ordinal = 1;
bank->base = 0x00020000;
bank->size = 128 * 1024;
bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS));
+ bank->sectors = malloc(sizeof(tms470r1a384_bank1_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS,
- sizeof(TMS470R1A384_BANK1_SECTORS));
+ (void)memcpy(bank->sectors, tms470r1a384_bank1_sectors,
+ sizeof(tms470r1a384_bank1_sectors));
} else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) {
tms470_info->ordinal = 2;
bank->base = 0x00040000;
bank->size = 128 * 1024;
bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS));
+ bank->sectors = malloc(sizeof(tms470r1a384_bank2_sectors));
if (!bank->sectors)
return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS,
- sizeof(TMS470R1A384_BANK2_SECTORS));
+ (void)memcpy(bank->sectors, tms470r1a384_bank2_sectors,
+ sizeof(tms470r1a384_bank2_sectors));
} else {
LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".",
part_name, bank->base);
@@ -325,37 +325,37 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
return ERROR_OK;
}
-static const uint32_t FLASH_KEYS_ALL_ONES[] = { 0xFFFFFFFF, 0xFFFFFFFF,
+static const uint32_t flash_keys_all_ones[] = { 0xFFFFFFFF, 0xFFFFFFFF,
0xFFFFFFFF, 0xFFFFFFFF,};
-static const uint32_t FLASH_KEYS_ALL_ZEROS[] = { 0x00000000, 0x00000000,
+static const uint32_t flash_keys_all_zeros[] = { 0x00000000, 0x00000000,
0x00000000, 0x00000000,};
-static const uint32_t FLASH_KEYS_MIX1[] = { 0xf0fff0ff, 0xf0fff0ff,
+static const uint32_t flash_keys_mix1[] = { 0xf0fff0ff, 0xf0fff0ff,
0xf0fff0ff, 0xf0fff0ff};
-static const uint32_t FLASH_KEYS_MIX2[] = { 0x0000ffff, 0x0000ffff,
+static const uint32_t flash_keys_mix2[] = { 0x0000ffff, 0x0000ffff,
0x0000ffff, 0x0000ffff};
/* ---------------------------------------------------------------------- */
-static int oscMHz = 12;
+static int osc_mhz = 12;
COMMAND_HANDLER(tms470_handle_osc_megahertz_command)
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
else if (CMD_ARGC == 1)
- sscanf(CMD_ARGV[0], "%d", &oscMHz);
+ sscanf(CMD_ARGV[0], "%d", &osc_mhz);
- if (oscMHz <= 0) {
+ if (osc_mhz <= 0) {
LOG_ERROR("osc_megahertz must be positive and non-zero!");
command_print(CMD, "osc_megahertz must be positive and non-zero!");
- oscMHz = 12;
+ osc_mhz = 12;
return ERROR_COMMAND_SYNTAX_ERROR;
}
- command_print(CMD, "osc_megahertz=%d", oscMHz);
+ command_print(CMD, "osc_megahertz=%d", osc_mhz);
return ERROR_OK;
}
@@ -474,16 +474,16 @@ static int tms470_unlock_flash(struct flash_bank *bank)
if (keys_set) {
key_set_count = 5;
p_key_sets[0] = flash_keys;
- p_key_sets[1] = FLASH_KEYS_ALL_ONES;
- p_key_sets[2] = FLASH_KEYS_ALL_ZEROS;
- p_key_sets[3] = FLASH_KEYS_MIX1;
- p_key_sets[4] = FLASH_KEYS_MIX2;
+ p_key_sets[1] = flash_keys_all_ones;
+ p_key_sets[2] = flash_keys_all_zeros;
+ p_key_sets[3] = flash_keys_mix1;
+ p_key_sets[4] = flash_keys_mix2;
} else {
key_set_count = 4;
- p_key_sets[0] = FLASH_KEYS_ALL_ONES;
- p_key_sets[1] = FLASH_KEYS_ALL_ZEROS;
- p_key_sets[2] = FLASH_KEYS_MIX1;
- p_key_sets[3] = FLASH_KEYS_MIX2;
+ p_key_sets[0] = flash_keys_all_ones;
+ p_key_sets[1] = flash_keys_all_zeros;
+ p_key_sets[2] = flash_keys_mix1;
+ p_key_sets[3] = flash_keys_mix2;
}
for (i = 0; i < key_set_count; i++) {
@@ -573,7 +573,7 @@ static int tms470_flash_initialize_internal_state_machine(struct flash_bank *ban
* the plldis global.
*/
target_read_u32(target, 0xFFFFFFDC, &glbctrl);
- sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * oscMHz / (1 + (glbctrl & 7));
+ sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * osc_mhz / (1 + (glbctrl & 7));
delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5;
target_write_u32(target, 0xFFE8A018, (delay << 4) | (delay << 8));
LOG_DEBUG("set fmpsetup = 0x%04" PRIx32 "", (delay << 4) | (delay << 8));
diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index 33f79f510..1220a1ef2 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -68,25 +68,25 @@ struct xcf_status {
* GLOBAL VARIABLES
******************************************************************************
*/
-static const uint8_t CMD_BYPASS[2] = {0xFF, 0xFF};
-
-static const uint8_t CMD_ISC_ADDRESS_SHIFT[2] = {0xEB, 0x00};
-static const uint8_t CMD_ISC_DATA_SHIFT[2] = {0xED, 0x00};
-static const uint8_t CMD_ISC_DISABLE[2] = {0xF0, 0x00};
-static const uint8_t CMD_ISC_ENABLE[2] = {0xE8, 0x00};
-static const uint8_t CMD_ISC_ERASE[2] = {0xEC, 0x00};
-static const uint8_t CMD_ISC_PROGRAM[2] = {0xEA, 0x00};
-
-static const uint8_t CMD_XSC_BLANK_CHECK[2] = {0x0D, 0x00};
-static const uint8_t CMD_XSC_CONFIG[2] = {0xEE, 0x00};
-static const uint8_t CMD_XSC_DATA_BTC[2] = {0xF2, 0x00};
-static const uint8_t CMD_XSC_DATA_CCB[2] = {0x0C, 0x00};
-static const uint8_t CMD_XSC_DATA_DONE[2] = {0x09, 0x00};
-static const uint8_t CMD_XSC_DATA_SUCR[2] = {0x0E, 0x00};
-static const uint8_t CMD_XSC_DATA_WRPT[2] = {0xF7, 0x00};
-static const uint8_t CMD_XSC_OP_STATUS[2] = {0xE3, 0x00};
-static const uint8_t CMD_XSC_READ[2] = {0xEF, 0x00};
-static const uint8_t CMD_XSC_UNLOCK[2] = {0x55, 0xAA};
+static const uint8_t cmd_bypass[2] = {0xFF, 0xFF};
+
+static const uint8_t cmd_isc_address_shift[2] = {0xEB, 0x00};
+static const uint8_t cmd_isc_data_shift[2] = {0xED, 0x00};
+static const uint8_t cmd_isc_disable[2] = {0xF0, 0x00};
+static const uint8_t cmd_isc_enable[2] = {0xE8, 0x00};
+static const uint8_t cmd_isc_erase[2] = {0xEC, 0x00};
+static const uint8_t cmd_isc_program[2] = {0xEA, 0x00};
+
+static const uint8_t cmd_xsc_blank_check[2] = {0x0D, 0x00};
+static const uint8_t cmd_xsc_config[2] = {0xEE, 0x00};
+static const uint8_t cmd_xsc_data_btc[2] = {0xF2, 0x00};
+static const uint8_t cmd_xsc_data_ccb[2] = {0x0C, 0x00};
+static const uint8_t cmd_xsc_data_done[2] = {0x09, 0x00};
+static const uint8_t cmd_xsc_data_sucr[2] = {0x0E, 0x00};
+static const uint8_t cmd_xsc_data_wrpt[2] = {0xF7, 0x00};
+static const uint8_t cmd_xsc_op_status[2] = {0xE3, 0x00};
+static const uint8_t cmd_xsc_read[2] = {0xEF, 0x00};
+static const uint8_t cmd_xsc_unlock[2] = {0x55, 0xAA};
/*
******************************************************************************
@@ -135,7 +135,7 @@ static struct xcf_status read_status(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
- scan.out_value = CMD_BYPASS;
+ scan.out_value = cmd_bypass;
scan.in_value = irdata;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@@ -162,7 +162,7 @@ static int isc_enter(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
- scan.out_value = CMD_ISC_ENABLE;
+ scan.out_value = cmd_isc_enable;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@@ -191,7 +191,7 @@ static int isc_leave(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
- scan.out_value = CMD_ISC_DISABLE;
+ scan.out_value = cmd_isc_disable;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@@ -252,7 +252,7 @@ static int isc_wait_erase_program(struct flash_bank *bank, int64_t timeout_ms)
int64_t dt;
do {
- isc_read_register(bank, CMD_XSC_OP_STATUS, &isc_default, 8);
+ isc_read_register(bank, cmd_xsc_op_status, &isc_default, 8);
if (((isc_default >> 2) & 1) == 1)
return ERROR_OK;
dt = timeval_ms() - t0;
@@ -307,7 +307,7 @@ static int isc_program_register(struct flash_bank *bank, const uint8_t *cmd,
jtag_add_dr_scan(bank->target->tap, 1, &scan, TAP_IRSHIFT);
scan.num_bits = 16;
- scan.out_value = CMD_ISC_PROGRAM;
+ scan.out_value = cmd_isc_program;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@@ -322,7 +322,7 @@ static int isc_clear_protect(struct flash_bank *bank, unsigned int first,
{
uint8_t select_block[3] = {0x0, 0x0, 0x0};
select_block[0] = fill_select_block(first, last);
- return isc_set_register(bank, CMD_XSC_UNLOCK, select_block, 24, 0);
+ return isc_set_register(bank, cmd_xsc_unlock, select_block, 24, 0);
}
static int isc_set_protect(struct flash_bank *bank, unsigned int first,
@@ -332,7 +332,7 @@ static int isc_set_protect(struct flash_bank *bank, unsigned int first,
for (unsigned int i = first; i <= last; i++)
wrpt[0] &= ~(1 << i);
- return isc_program_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16, 0);
+ return isc_program_register(bank, cmd_xsc_data_wrpt, wrpt, 16, 0);
}
static int isc_erase_sectors(struct flash_bank *bank, unsigned int first,
@@ -341,19 +341,19 @@ static int isc_erase_sectors(struct flash_bank *bank, unsigned int first,
uint8_t select_block[3] = {0, 0, 0};
select_block[0] = fill_select_block(first, last);
int64_t timeout = SECTOR_ERASE_TIMEOUT_MS * (last - first + 1);
- return isc_set_register(bank, CMD_ISC_ERASE, select_block, 24, timeout);
+ return isc_set_register(bank, cmd_isc_erase, select_block, 24, timeout);
}
static int isc_adr_shift(struct flash_bank *bank, int adr)
{
uint8_t adr_buf[3];
h_u24_to_le(adr_buf, adr);
- return isc_set_register(bank, CMD_ISC_ADDRESS_SHIFT, adr_buf, 24, 0);
+ return isc_set_register(bank, cmd_isc_address_shift, adr_buf, 24, 0);
}
static int isc_program_data_page(struct flash_bank *bank, const uint8_t *page_buf)
{
- return isc_program_register(bank, CMD_ISC_DATA_SHIFT, page_buf, 8 * XCF_PAGE_SIZE, 100);
+ return isc_program_register(bank, cmd_isc_data_shift, page_buf, 8 * XCF_PAGE_SIZE, 100);
}
static void isc_data_read_out(struct flash_bank *bank, uint8_t *buffer, uint32_t count)
@@ -366,7 +366,7 @@ static void isc_data_read_out(struct flash_bank *bank, uint8_t *buffer, uint32_t
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
- scan.out_value = CMD_XSC_READ;
+ scan.out_value = cmd_xsc_read;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
@@ -382,7 +382,7 @@ static int isc_set_data_done(struct flash_bank *bank, int sector)
{
uint8_t done = 0xFF;
done &= ~(1 << sector);
- return isc_program_register(bank, CMD_XSC_DATA_DONE, &done, 8, 100);
+ return isc_program_register(bank, cmd_xsc_data_done, &done, 8, 100);
}
static void flip_u8(uint8_t *out, const uint8_t *in, int len)
@@ -508,7 +508,7 @@ EXIT:
static uint16_t isc_read_ccb(struct flash_bank *bank)
{
uint8_t ccb[2];
- isc_read_register(bank, CMD_XSC_DATA_CCB, ccb, 16);
+ isc_read_register(bank, cmd_xsc_data_ccb, ccb, 16);
return le_to_h_u16(ccb);
}
@@ -526,13 +526,13 @@ static int isc_program_ccb(struct flash_bank *bank, uint16_t ccb)
{
uint8_t buf[2];
h_u16_to_le(buf, ccb);
- return isc_program_register(bank, CMD_XSC_DATA_CCB, buf, 16, 100);
+ return isc_program_register(bank, cmd_xsc_data_ccb, buf, 16, 100);
}
static int isc_program_singe_revision_sucr(struct flash_bank *bank)
{
uint8_t sucr[2] = {0xFC, 0xFF};
- return isc_program_register(bank, CMD_XSC_DATA_SUCR, sucr, 16, 100);
+ return isc_program_register(bank, cmd_xsc_data_sucr, sucr, 16, 100);
}
static int isc_program_single_revision_btc(struct flash_bank *bank)
@@ -543,7 +543,7 @@ static int isc_program_single_revision_btc(struct flash_bank *bank)
btc |= ((bank->num_sectors - 1) << 2);
btc &= ~(1 << 4);
h_u32_to_le(buf, btc);
- return isc_program_register(bank, CMD_XSC_DATA_BTC, buf, 32, 100);
+ return isc_program_register(bank, cmd_xsc_data_btc, buf, 32, 100);
}
static int fpga_configure(struct flash_bank *bank)
@@ -553,7 +553,7 @@ static int fpga_configure(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
- scan.out_value = CMD_XSC_CONFIG;
+ scan.out_value = cmd_xsc_config;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
jtag_execute_queue();
@@ -663,7 +663,7 @@ static int xcf_protect_check(struct flash_bank *bank)
uint8_t wrpt[2];
isc_enter(bank);
- isc_read_register(bank, CMD_XSC_DATA_WRPT, wrpt, 16);
+ isc_read_register(bank, cmd_xsc_data_wrpt, wrpt, 16);
isc_leave(bank);
for (unsigned int i = 0; i < bank->num_sectors; i++)
@@ -684,7 +684,7 @@ static int xcf_erase_check(struct flash_bank *bank)
scan.check_mask = NULL;
scan.check_value = NULL;
scan.num_bits = 16;
- scan.out_value = CMD_XSC_BLANK_CHECK;
+ scan.out_value = cmd_xsc_blank_check;
scan.in_value = NULL;
jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
jtag_execute_queue();
commit e4c0f45a5f01b202b916deb950485c67c4a6fb10
Author: Antonio Borneo <bor...@gm...>
Date: Sun Jun 6 18:17:01 2021 +0200
drivers/buspirate: use macros in place of const variables
Uppercase symbols are normally used for macro or enum's values.
Convert the uppercase const variables to macros.
Change-Id: I749544c2e5deba65583824a7c2a6023e697714df
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6346
Tested-by: jenkins
Reviewed-by: Marc Schink <de...@za...>
diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c
index 616832ea7..59819513b 100644
--- a/src/jtag/drivers/buspirate.c
+++ b/src/jtag/drivers/buspirate.c
@@ -58,6 +58,8 @@ static void buspirate_stableclocks(int num_cycles);
#define CMD_RAW_SPEED 0x60
#define CMD_RAW_MODE 0x80
+#define CMD_TAP_SHIFT_HEADER_LEN 3
+
/* raw-wire mode configuration */
#define CMD_RAW_CONFIG_HIZ 0x00
#define CMD_RAW_CONFIG_3V3 0x08
@@ -71,6 +73,9 @@ static void buspirate_stableclocks(int num_cycles);
#define B1000000 0010010
#endif
+#define SHORT_TIMEOUT 1 /* Must be at least 1. */
+#define NORMAL_TIMEOUT 10
+
enum {
MODE_HIZ = 0,
MODE_JTAG = 1, /* push-pull outputs */
@@ -107,9 +112,6 @@ static bool swd_mode;
static int queued_retval;
static char swd_features;
-static const cc_t SHORT_TIMEOUT = 1; /* Must be at least 1. */
-static const cc_t NORMAL_TIMEOUT = 10;
-
static int buspirate_fd = -1;
static int buspirate_pinmode = MODE_JTAG_OD;
static int buspirate_baudrate = SERIAL_NORMAL;
@@ -708,8 +710,6 @@ static void buspirate_tap_init(void)
static int buspirate_tap_execute(void)
{
- static const int CMD_TAP_SHIFT_HEADER_LEN = 3;
-
uint8_t tmp[4096];
uint8_t *in_buf;
int i;
commit fceb29d03ff9b2829be2cadd64d09d264c568349
Author: Antonio Borneo <bor...@gm...>
Date: Sun Jun 6 18:14:03 2021 +0200
jtag/aice: use macros in place of const variables
Uppercase symbols are normally used for macro or enum's values.
Convert the uppercase const variables to macros.
Change-Id: I4ba47ce2d3183b50730c5a9a265f274c7b802519
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6345
Tested-by: jenkins
Reviewed-by: Marc Schink <de...@za...>
Reviewed-by: Xiang W <wx...@12...>
diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c
index 3a0e48522..751fd135c 100644
--- a/src/jtag/aice/aice_usb.c
+++ b/src/jtag/aice/aice_usb.c
@@ -53,29 +53,29 @@ static enum aice_target_endian data_endian;
#define AICE_FORMAT_DTHMB (4)
/* Constants for AICE command */
-static const uint8_t AICE_CMD_SCAN_CHAIN = 0x00;
-static const uint8_t AICE_CMD_T_READ_MISC = 0x20;
-static const uint8_t AICE_CMD_T_READ_EDMSR = 0x21;
-static const uint8_t AICE_CMD_T_READ_DTR = 0x22;
-static const uint8_t AICE_CMD_T_READ_MEM_B = 0x24;
-static const uint8_t AICE_CMD_T_READ_MEM_H = 0x25;
-static const uint8_t AICE_CMD_T_READ_MEM = 0x26;
-static const uint8_t AICE_CMD_T_FASTREAD_MEM = 0x27;
-static const uint8_t AICE_CMD_T_WRITE_MISC = 0x28;
-static const uint8_t AICE_CMD_T_WRITE_EDMSR = 0x29;
-static const uint8_t AICE_CMD_T_WRITE_DTR = 0x2A;
-static const uint8_t AICE_CMD_T_WRITE_DIM = 0x2B;
-static const uint8_t AICE_CMD_T_WRITE_MEM_B = 0x2C;
-static const uint8_t AICE_CMD_T_WRITE_MEM_H = 0x2D;
-static const uint8_t AICE_CMD_T_WRITE_MEM = 0x2E;
-static const uint8_t AICE_CMD_T_FASTWRITE_MEM = 0x2F;
-static const uint8_t AICE_CMD_T_EXECUTE = 0x3E;
-static const uint8_t AICE_CMD_READ_CTRL = 0x50;
-static const uint8_t AICE_CMD_WRITE_CTRL = 0x51;
-static const uint8_t AICE_CMD_BATCH_BUFFER_READ = 0x60;
-static const uint8_t AICE_CMD_READ_DTR_TO_BUFFER = 0x61;
-static const uint8_t AICE_CMD_BATCH_BUFFER_WRITE = 0x68;
-static const uint8_t AICE_CMD_WRITE_DTR_FROM_BUFFER = 0x69;
+#define AICE_CMD_SCAN_CHAIN 0x00
+#define AICE_CMD_T_READ_MISC 0x20
+#define AICE_CMD_T_READ_EDMSR 0x21
+#define AICE_CMD_T_READ_DTR 0x22
+#define AICE_CMD_T_READ_MEM_B 0x24
+#define AICE_CMD_T_READ_MEM_H 0x25
+#define AICE_CMD_T_READ_MEM 0x26
+#define AICE_CMD_T_FASTREAD_MEM 0x27
+#define AICE_CMD_T_WRITE_MISC 0x28
+#define AICE_CMD_T_WRITE_EDMSR 0x29
+#define AICE_CMD_T_WRITE_DTR 0x2A
+#define AICE_CMD_T_WRITE_DIM 0x2B
+#define AICE_CMD_T_WRITE_MEM_B 0x2C
+#define AICE_CMD_T_WRITE_MEM_H 0x2D
+#define AICE_CMD_T_WRITE_MEM 0x2E
+#define AICE_CMD_T_FASTWRITE_MEM 0x2F
+#define AICE_CMD_T_EXECUTE 0x3E
+#define AICE_CMD_READ_CTRL 0x50
+#define AICE_CMD_WRITE_CTRL 0x51
+#define AICE_CMD_BATCH_BUFFER_READ 0x60
+#define AICE_CMD_READ_DTR_TO_BUFFER 0x61
+#define AICE_CMD_BATCH_BUFFER_WRITE 0x68
+#define AICE_CMD_WRITE_DTR_FROM_BUFFER 0x69
/***************************************************************************/
/* AICE commands' pack/unpack functions */
-----------------------------------------------------------------------
Summary of changes:
src/flash/nand/mxc.c | 48 +++++++++++-----------
src/flash/nor/at91sam7.c | 16 ++++----
src/flash/nor/stm32l4x.c | 6 +--
src/flash/nor/tms470.c | 94 ++++++++++++++++++++++----------------------
src/flash/nor/xcf.c | 76 +++++++++++++++++------------------
src/jtag/aice/aice_usb.c | 46 +++++++++++-----------
src/jtag/drivers/buspirate.c | 10 ++---
7 files changed, 148 insertions(+), 148 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
