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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.11.0-194-g3bd26ebb5
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From: OpenOCD-Gerrit <ope...@us...> - 2021-06-03 22:28:05
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via 0c64bb2583a67b551a482ddc13a08dc71a143da3 (commit)
via ffaef5809c68d81359de5573d3971a4b6bb521c3 (commit)
from 1fb736f6c5a69f743dd90e68045f7b4e6a0f8c78 (commit)
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- Log -----------------------------------------------------------------
commit 3bd26ebb59e2932b361b40176b818174f561f901
Author: Antonio Borneo <bor...@gm...>
Date: Fri May 7 16:17:32 2021 +0200
target/cortex_a: fix memory leak on watchpoints
The memory allocated to hold the watchpoints is not freed at
OpenOCD exit.
Free the watchpoint memory at OpenOCD exit.
Change-Id: I518c9ce0dc901cde2913d752e3154734f878b854
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6210
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <mat...@we...>
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 9a48cc8b1..35f149970 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -3181,6 +3181,7 @@ static void cortex_a_deinit_target(struct target *target)
dscr & ~DSCR_HALT_DBG_MODE);
}
+ free(cortex_a->wrp_list);
free(cortex_a->brp_list);
arm_free_reg_cache(dpm->arm);
free(dpm->dbp);
commit 0c64bb2583a67b551a482ddc13a08dc71a143da3
Author: Antonio Borneo <bor...@gm...>
Date: Thu Apr 29 10:49:50 2021 +0200
target/cortex_a: add support for watchpoint length of 1, 2 and 4 bytes
Use byte address select for 1 and 2 bytes length.
Use normal mode for 4 bytes length.
Change-Id: I28d182f25145d0635de64d0361d456f1ad96640e
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6197
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <mat...@we...>
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 78daed398..9a48cc8b1 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -61,6 +61,7 @@
#include "jtag/interface.h"
#include "transport/transport.h"
#include "smp.h"
+#include <helper/bits.h>
#include <helper/time_support.h>
static int cortex_a_poll(struct target *target);
@@ -1686,8 +1687,9 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
int retval = ERROR_OK;
int wrp_i = 0;
uint32_t control;
- uint8_t address_mask = ilog2(watchpoint->length);
- uint8_t byte_address_select = 0xFF;
+ uint32_t address;
+ uint8_t address_mask;
+ uint8_t byte_address_select;
uint8_t load_store_access_control = 0x3;
struct cortex_a_common *cortex_a = target_to_cortex_a(target);
struct armv7a_common *armv7a = &cortex_a->armv7a_common;
@@ -1707,18 +1709,52 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
return ERROR_FAIL;
}
- if (address_mask == 0x1 || address_mask == 0x2) {
- LOG_WARNING("length must be a power of 2 and different than 2 and 4");
+ if (watchpoint->length == 0 || watchpoint->length > 0x80000000U ||
+ (watchpoint->length & (watchpoint->length - 1))) {
+ LOG_WARNING("watchpoint length must be a power of 2");
return ERROR_FAIL;
}
+ if (watchpoint->address & (watchpoint->length - 1)) {
+ LOG_WARNING("watchpoint address must be aligned at length");
+ return ERROR_FAIL;
+ }
+
+ /* FIXME: ARM DDI 0406C: address_mask is optional. What to do if it's missing? */
+ /* handle wp length 1 and 2 through byte select */
+ switch (watchpoint->length) {
+ case 1:
+ byte_address_select = BIT(watchpoint->address & 0x3);
+ address = watchpoint->address & ~0x3;
+ address_mask = 0;
+ break;
+
+ case 2:
+ byte_address_select = 0x03 << (watchpoint->address & 0x2);
+ address = watchpoint->address & ~0x3;
+ address_mask = 0;
+ break;
+
+ case 4:
+ byte_address_select = 0x0f;
+ address = watchpoint->address;
+ address_mask = 0;
+ break;
+
+ default:
+ byte_address_select = 0xff;
+ address = watchpoint->address;
+ address_mask = ilog2(watchpoint->length);
+ break;
+ }
+
watchpoint->set = wrp_i + 1;
control = (address_mask << 24) |
(byte_address_select << 5) |
(load_store_access_control << 3) |
(0x3 << 1) | 1;
wrp_list[wrp_i].used = 1;
- wrp_list[wrp_i].value = (watchpoint->address & 0xFFFFFFFC);
+ wrp_list[wrp_i].value = address;
wrp_list[wrp_i].control = control;
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
commit ffaef5809c68d81359de5573d3971a4b6bb521c3
Author: Antonio Borneo <bor...@gm...>
Date: Thu Apr 29 09:22:00 2021 +0200
target/cortex_a: fix number of watchpoints
Decrement the available watchpoints only when succeed setting it.
Initialize the available watchpoint with the correct value.
Change-Id: I0f93b347300b8ebedbcd9e718d4ba32b26cf6846
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6196
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <mat...@we...>
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 9e8248a74..78daed398 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1802,8 +1802,12 @@ static int cortex_a_add_watchpoint(struct target *target, struct watchpoint *wat
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
+ int retval = cortex_a_set_watchpoint(target, watchpoint);
+ if (retval != ERROR_OK)
+ return retval;
+
cortex_a->wrp_num_available--;
- return cortex_a_set_watchpoint(target, watchpoint);
+ return ERROR_OK;
}
/**
@@ -3007,7 +3011,7 @@ static int cortex_a_examine_first(struct target *target)
/* Setup Watchpoint Register Pairs */
cortex_a->wrp_num = ((didr >> 28) & 0x0F) + 1;
- cortex_a->wrp_num_available = cortex_a->brp_num;
+ cortex_a->wrp_num_available = cortex_a->wrp_num;
free(cortex_a->wrp_list);
cortex_a->wrp_list = calloc(cortex_a->wrp_num, sizeof(struct cortex_a_wrp));
for (i = 0; i < cortex_a->wrp_num; i++) {
-----------------------------------------------------------------------
Summary of changes:
src/target/cortex_a.c | 55 ++++++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 48 insertions(+), 7 deletions(-)
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