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- Log -----------------------------------------------------------------
commit 229c4c6a71ce6540917cbc10629d8f51c98c7e7b
Author: R. Diez <rdi...@ya...>
Date:   Thu May 13 14:19:13 2021 +0200

    Warn on undefined preprocessor symbols
    
    Preprocessor directives like "#if SYMBOL" silently replace undefined or
    misspelt symbols with 0, which makes configuration bugs hard to spot.
    Compiler flag "-Wundef" prevents such errors.
    
    Change-Id: I91b7ba2db02ef0c3c452d334601c53aebda4660e
    Signed-off-by: R. Diez <rdi...@ya...>
    Reviewed-on: http://openocd.zylin.com/6238
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/configure.ac b/configure.ac
index e343875d8..139598e15 100644
--- a/configure.ac
+++ b/configure.ac
@@ -637,6 +637,7 @@ m4_define([PROCESS_ADAPTERS], [
 			AC_MSG_ERROR([$3 is required for the ADAPTER_DESC([adapter])])
 		])
 		ADAPTER_VAR([adapter])=no
+		AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [0], [0 if you do not want the ]ADAPTER_DESC([adapter]).)
 	])
 	AM_CONDITIONAL(ADAPTER_SYM([adapter]), [test "x$ADAPTER_VAR([adapter])" != "xno"])
   ])
@@ -756,6 +757,7 @@ AS_IF([test "x${gcc_wextra}" = "xyes"], [
   GCC_WARNINGS="${GCC_WARNINGS} -Wcast-align"
   GCC_WARNINGS="${GCC_WARNINGS} -Wredundant-decls"
   GCC_WARNINGS="${GCC_WARNINGS} -Wpointer-arith"
+  GCC_WARNINGS="${GCC_WARNINGS} -Wundef"
 ])
 AS_IF([test "x${gcc_werror}" = "xyes"], [
   GCC_WARNINGS="${GCC_WARNINGS} -Werror"

commit 1f54a0860fb23f3a63a661ac6eeb68e3081ff1b7
Author: R. Diez <rdi...@ya...>
Date:   Mon May 10 18:10:30 2021 +0200

    Document the buspirate interface driver.
    
    Change-Id: Iaff13fc5187041a840f4f00eb6b4ee52880cf47e
    Signed-off-by: R. Diez <rdi...@ya...>
    Reviewed-on: http://openocd.zylin.com/6231
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 4ca7be8d9..361ceb43f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3264,6 +3264,68 @@ Specifies the TCP/IP address of the SystemVerilog DPI server interface.
 @end deffn
 
 
+@deffn {Interface Driver} {buspirate}
+
+This driver is for the Bus Pirate (see @url{http://dangerousprototypes.com/docs/Bus_Pirate}) and compatible devices.
+It uses a simple data protocol over a serial port connection.
+
+Most hardware development boards have a UART, a real serial port, or a virtual USB serial device, so this driver
+allows you to start building your own JTAG adapter without the complexity of a custom USB connection.
+
+@deffn {Config Command} {buspirate_port} serial_port
+Specify the serial port's filename. For example:
+@example
+buspirate_port /dev/ttyUSB0
+@end example
+@end deffn
+
+@deffn {Config Command} {buspirate_speed} (normal|fast)
+Set the communication speed to 115k (normal) or 1M (fast). For example:
+@example
+buspirate_mode normal
+@end example
+@end deffn
+
+@deffn {Config Command} {buspirate_mode} (normal|open-drain)
+Set the Bus Pirate output mode.
+@itemize @minus
+@item In normal mode (push/pull), do not enable the pull-ups, and do not connect I/O header pin VPU to JTAG VREF.
+@item In open drain mode, you will then need to enable the pull-ups.
+@end itemize
+For example:
+@example
+buspirate_mode normal
+@end example
+@end deffn
+
+@deffn {Config Command} {buspirate_pullup} (0|1)
+Whether to connect (1) or not (0) the I/O header pin VPU (JTAG VREF)
+to the pull-up/pull-down resistors on MOSI (JTAG TDI), CLK (JTAG TCK), MISO (JTAG TDO) and CS (JTAG TMS).
+For example:
+@example
+buspirate_pullup 0
+@end example
+@end deffn
+
+@deffn {Config Command} {buspirate_vreg} (0|1)
+Whether to enable (1) or disable (0) the built-in voltage regulator,
+which can be used to supply power to a test circuit through
+I/O header pins +3V3 and +5V. For example:
+@example
+buspirate_vreg 0
+@end example
+@end deffn
+
+@deffn {Command} {buspirate_led} (0|1)
+Turns the Bus Pirate's LED on (1) or off (0). For example:
+@end deffn
+@example
+buspirate_led 1
+@end example
+
+@end deffn
+
+
 @section Transport Configuration
 @cindex Transport
 As noted earlier, depending on the version of OpenOCD you use,

commit 3c4206936d541db512ed39ce5ff4d3a0ab9ef33c
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Jan 28 13:34:51 2021 +0100

    openocd: fix some minor typo
    
    Minor typos found by the new checkpatch boosted by the dictionary
    provided by 'codespell'.
    
    Change-Id: I7b4cae1798ff5ea048fcbc671a397af763fdc605
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6218
    Tested-by: jenkins

diff --git a/doc/manual/style.txt b/doc/manual/style.txt
index 91088994f..58f39807e 100644
--- a/doc/manual/style.txt
+++ b/doc/manual/style.txt
@@ -406,7 +406,7 @@ For technical reference material:
      vice versa.
 - Alphabetize the \@defn declarations for all commands in each
   section.
-- Keep the per-command documentation focussed on exactly what that
+- Keep the per-command documentation focused on exactly what that
   command does, not motivation, advice, suggestions, or big examples.
   When commands deserve such expanded text, it belongs elsewhere.
   Solutions might be using a \@section explaining a cluster of related
diff --git a/doc/openocd.texi b/doc/openocd.texi
index fc448339f..4ca7be8d9 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -315,7 +315,7 @@ There are several things you should keep in mind when choosing a dongle.
 
 @enumerate
 @item @b{Transport} Does it support the kind of communication that you need?
-OpenOCD focusses mostly on JTAG. Your version may also support
+OpenOCD focuses mostly on JTAG. Your version may also support
 other ways to communicate with target devices.
 @item @b{Voltage} What voltage is your target - 1.8, 2.8, 3.3, or 5V?
 Does your dongle support it? You might need a level converter.
@@ -5577,7 +5577,7 @@ flash driver infers all parameters from current controller register values when
 'flash probe @var{bank_id}' is executed.
 
 Normal OpenOCD commands like @command{mdw} can be used to display the flash content,
-but only after proper controller initialization as decribed above. However,
+but only after proper controller initialization as described above. However,
 due to a silicon bug in some devices, attempting to access the very last word
 should be avoided.
 
@@ -11392,7 +11392,7 @@ your C code, do the same - artificially push some zeros onto the stack,
 remember to pop them off when the ISR is done.
 
 @b{Also note:} If you have a multi-threaded operating system, they
-often do not @b{in the intrest of saving memory} waste these few
+often do not @b{in the interest of saving memory} waste these few
 bytes. Painful...
 
 
diff --git a/src/helper/time_support.h b/src/helper/time_support.h
index 3c7d4255b..b83c0ac77 100644
--- a/src/helper/time_support.h
+++ b/src/helper/time_support.h
@@ -46,7 +46,7 @@ struct duration {
 
 /** Update the duration->start field to start the @a duration measurement. */
 int duration_start(struct duration *duration);
-/** Update the duration->elapsed field to finish the @a duration measurment. */
+/** Update the duration->elapsed field to finish the @a duration measurement. */
 int duration_measure(struct duration *duration);
 
 /** @returns Elapsed time in seconds. */
diff --git a/src/rtos/mqx.c b/src/rtos/mqx.c
index 0914e3104..22cd721ac 100644
--- a/src/rtos/mqx.c
+++ b/src/rtos/mqx.c
@@ -222,7 +222,7 @@ static int mqx_is_scheduler_running(
 		return ERROR_FAIL;
 	}
 	/* check first member, the '_mqx_kernel_data->ADDRESSING_CAPABILITY'.
-	   it supose to be set to value 8 */
+	   it suppose to be set to value 8 */
 	if (capability_value != 8) {
 		LOG_WARNING("MQX RTOS - value of '_mqx_kernel_data->ADDRESSING_CAPABILITY' contains invalid value");
 		return ERROR_FAIL;
diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c
index 2a7b56dbf..823784908 100644
--- a/src/xsvf/xsvf.c
+++ b/src/xsvf/xsvf.c
@@ -1057,7 +1057,7 @@ int xsvf_register_commands(struct command_context *cmd_ctx)
 
 /*
 
-PSUEDO-Code from Xilinx Appnote XAPP067.pdf :
+PSEUDO-Code from Xilinx Appnote XAPP067.pdf :
 
 the following pseudo code clarifies the intent of the xrepeat support.The
 flow given is for the entire processing of an SVF file, not an XSVF file.

commit f1bc46c78a8d0d76e48c83daf1b0f3d6895aa59e
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Jan 28 13:32:41 2021 +0100

    target: fix some minor typo
    
    Minor typos found by the new checkpatch boosted by the dictionary
    provided by 'codespell'.
    
    Change-Id: I548581247db72e683249749d1b8725035530b06e
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6217
    Tested-by: jenkins

diff --git a/src/target/arc.c b/src/target/arc.c
index 694ac6f85..e11cd7d79 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -1467,7 +1467,7 @@ static int arc_configure_actionpoint(struct target *target, uint32_t ap_num,
 	if (control_tt != AP_AC_TT_DISABLE) {
 
 		if (arc->actionpoints_num_avail < 1) {
-			LOG_ERROR("No free actionpoints, maximim amount is %u",
+			LOG_ERROR("No free actionpoints, maximum amount is %u",
 					arc->actionpoints_num);
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
diff --git a/src/target/arc.h b/src/target/arc.h
index 8d44bfa41..f0351bdf3 100644
--- a/src/target/arc.h
+++ b/src/target/arc.h
@@ -206,7 +206,7 @@ struct arc_common {
 	bool dcache_invalidated;
 	bool l2cache_invalidated;
 
-	/* Indicate if cach was built (for deinit function) */
+	/* Indicate if cache was built (for deinit function) */
 	bool core_aux_cache_built;
 	bool bcr_cache_built;
 	/* Closely Coupled memory(CCM) regions for performance-critical
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 8f5ad59c3..6569fccfd 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -32,7 +32,7 @@
  * This file implements support for the ARM Debug Interface version 5 (ADIv5)
  * debugging architecture.  Compared with previous versions, this includes
  * a low pin-count Serial Wire Debug (SWD) alternative to JTAG for message
- * transport, and focusses on memory mapped resources as defined by the
+ * transport, and focuses on memory mapped resources as defined by the
  * CoreSight architecture.
  *
  * A key concept in ADIv5 is the Debug Access Port, or DAP.  A DAP has two
diff --git a/src/target/avr32_mem.c b/src/target/avr32_mem.c
index 71ec0b431..8f38a1844 100644
--- a/src/target/avr32_mem.c
+++ b/src/target/avr32_mem.c
@@ -176,7 +176,7 @@ int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info,
 	 */
 	if (addr & 3) {
 		/*
-		 * mwa_read will read whole world, no nead to fiddle
+		 * mwa_read will read whole world, no need to fiddle
 		 * with address. It will be truncated in set_addr
 		 */
 		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
@@ -248,7 +248,7 @@ int avr32_jtag_write_memory8(struct avr32_jtag *jtag_info,
 	 */
 	if (addr & 3) {
 		/*
-		 * mwa_read will read whole world, no nead to fiddle
+		 * mwa_read will read whole world, no need to fiddle
 		 * with address. It will be truncated in set_addr
 		 */
 		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 4b5c816a6..4a62cefaa 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -106,7 +106,7 @@ int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
 
 int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout);
 
-/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be
+/* If many embeddedice_write_reg() follow each other, then the >1 invocations can be
  * this faster version of embeddedice_write_reg
  */
 static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value)
diff --git a/src/target/target.c b/src/target/target.c
index e9d67702e..d60e642c9 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5173,7 +5173,7 @@ no_params:
 			if (goi->isconfigure) {
 				struct command_context *cmd_ctx = current_command_context(goi->interp);
 				if (cmd_ctx->mode != COMMAND_CONFIG) {
-					Jim_SetResultString(goi->interp, "-gdb-max-conenctions must be configured before 'init'", -1);
+					Jim_SetResultString(goi->interp, "-gdb-max-connections must be configured before 'init'", -1);
 					return JIM_ERR;
 				}
 
diff --git a/src/target/target_type.h b/src/target/target_type.h
index 0f3df0002..1948121fa 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -79,7 +79,7 @@ struct target_type {
 	 * state correctly.
 	 *
 	 * Otherwise the following would fail, as there will not
-	 * be any "poll" invoked inbetween the "reset run" and
+	 * be any "poll" invoked between the "reset run" and
 	 * "halt".
 	 *
 	 * reset run; halt

commit 8e337052b6b808d3b6b3833ef74f9089ab1b9fd1
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Jan 28 13:05:53 2021 +0100

    jtag: fix some minor typo
    
    Minor typos found by the new checkpatch boosted by the dictionary
    provided by 'codespell'.
    
    Change-Id: I101c76a638805d77c1ff356cf0f027552389e5d3
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6216
    Tested-by: jenkins

diff --git a/src/jtag/aice/aice_interface.c b/src/jtag/aice/aice_interface.c
index 160eb1105..86e9d16c1 100644
--- a/src/jtag/aice/aice_interface.c
+++ b/src/jtag/aice/aice_interface.c
@@ -436,7 +436,7 @@ static const struct command_registration aice_subcommand_handlers[] = {
 		.handler = &aice_handle_aice_desc_command,
 		.mode = COMMAND_CONFIG,
 		.help = "set the aice device description",
-		.usage = "[desciption string]",
+		.usage = "[description string]",
 	},
 	{
 		.name = "serial",
diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c
index 6c452a327..3a0e48522 100644
--- a/src/jtag/aice/aice_usb.c
+++ b/src/jtag/aice/aice_usb.c
@@ -2627,7 +2627,7 @@ static int aice_usb_halt(uint32_t coreid)
 
 	if (core_info[coreid].debug_under_dex_on) {
 		if (core_info[coreid].dex_use_psw_on == false) {
-			/* under debug 'debug mode', force $psw to 'debug mode' bahavior */
+			/* under debug 'debug mode', force $psw to 'debug mode' behavior */
 			/* !!!NOTICE!!! this is workaround for debug 'debug mode'.
 			 * it is only for debugging 'debug exception handler' purpose.
 			 * after openocd detaches from target, target behavior is
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 147df2854..2166374cc 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -490,7 +490,7 @@ void jtag_add_tlr(void)
 
 /**
  * If supported by the underlying adapter, this clocks a raw bit sequence
- * onto TMS for switching betwen JTAG and SWD modes.
+ * onto TMS for switching between JTAG and SWD modes.
  *
  * DO NOT use this to bypass the integrity checks and logging provided
  * by the jtag_add_pathmove() and jtag_add_statemove() calls.
@@ -1343,7 +1343,7 @@ static int jtag_validate_ircapture(void)
 	int chain_pos = 0;
 	int retval;
 
-	/* when autoprobing, accomodate huge IR lengths */
+	/* when autoprobing, accommodate huge IR lengths */
 	for (tap = NULL, total_ir_length = 0;
 			(tap = jtag_tap_next_enabled(tap)) != NULL;
 			total_ir_length += tap->ir_length) {
diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c
index a588b1bd8..c42bab28f 100644
--- a/src/jtag/drivers/cmsis_dap_usb_bulk.c
+++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c
@@ -262,7 +262,7 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p
 				 * - config asked explicitly for an interface number
 				 * - the device has only one interface
 				 * The later two cases should be honored only if we know
-				 * we are on the rigt device */
+				 * we are on the right device */
 				bool intf_identified_reliably = cmsis_dap_in_interface_str
 							|| (device_identified_reliably &&
 									(cmsis_dap_usb_interface != -1
diff --git a/src/jtag/drivers/jtag_dpi.c b/src/jtag/drivers/jtag_dpi.c
index 7cac20051..f5a67dd11 100644
--- a/src/jtag/drivers/jtag_dpi.c
+++ b/src/jtag/drivers/jtag_dpi.c
@@ -301,7 +301,7 @@ static int jtag_dpi_init(void)
 	serv_addr.sin_addr.s_addr = inet_addr(server_address);
 
 	if (serv_addr.sin_addr.s_addr == INADDR_NONE) {
-		LOG_ERROR("inet_addr error occured");
+		LOG_ERROR("inet_addr error occurred");
 		return ERROR_FAIL;
 	}
 
diff --git a/src/jtag/drivers/nulink_usb.c b/src/jtag/drivers/nulink_usb.c
index 48a5c792e..3eea9de58 100644
--- a/src/jtag/drivers/nulink_usb.c
+++ b/src/jtag/drivers/nulink_usb.c
@@ -844,11 +844,11 @@ static int nulink_usb_read_mem(void *handle, uint32_t addr, uint32_t size,
 		/* the nulink only supports 8/32bit memory read/writes
 		 * honour 32bit, all others will be handled as 8bit access */
 		if (size == 4) {
-			/* When in jtag mode the nulink uses the auto-increment functinality.
+			/* When in jtag mode the nulink uses the auto-increment functionality.
 			 * However it expects us to pass the data correctly, this includes
 			 * alignment and any page boundaries. We already do this as part of the
 			 * adi_v5 implementation, but the nulink is a hla adapter and so this
-			 * needs implementiong manually.
+			 * needs implementing manually.
 			 * currently this only affects jtag mode, they do single
 			 * access in SWD mode - but this may change and so we do it for both modes */
 
@@ -909,11 +909,11 @@ static int nulink_usb_write_mem(void *handle, uint32_t addr, uint32_t size,
 		/* the nulink only supports 8/32bit memory read/writes
 		 * honour 32bit, all others will be handled as 8bit access */
 		if (size == 4) {
-			/* When in jtag mode the nulink uses the auto-increment functinality.
+			/* When in jtag mode the nulink uses the auto-increment functionality.
 			 * However it expects us to pass the data correctly, this includes
 			 * alignment and any page boundaries. We already do this as part of the
 			 * adi_v5 implementation, but the nulink is a hla adapter and so this
-			 * needs implementiong manually.
+			 * needs implementing manually.
 			 * currently this only affects jtag mode, do single
 			 * access in SWD mode - but this may change and so we do it for both modes */
 
diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c
index c312468b4..aa7c240ee 100644
--- a/src/jtag/drivers/usb_blaster/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster/usb_blaster.c
@@ -561,8 +561,8 @@ static int ublast_read_byteshifted_tdos(uint8_t *buf, int nb_bytes)
  *  - first bit is stored in byte0, bit0 (LSB)
  *  - second bit is stored in byte0, bit 1
  *  ...
- *  - eight bit is sotred in byte0, bit 7
- *  - ninth bit is sotred in byte1, bit 0
+ *  - eight bit is stored in byte0, bit 7
+ *  - ninth bit is stored in byte1, bit 0
  *  - etc ...
  *
  * Returns ERROR_OK if OK, ERROR_xxx if a read error occurred
diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h
index c6fdfafd3..0624c55fb 100644
--- a/src/jtag/minidriver.h
+++ b/src/jtag/minidriver.h
@@ -32,7 +32,7 @@
  * interface functions, instead of the built-in asynchronous driver
  * module that is used by the standard JTAG interface drivers.
  *
- * In addtion to the functions defined in the @c minidriver.h file, the
+ * In addition to the functions defined in the @c minidriver.h file, the
  * @c jtag_minidriver.h file must declare the following functions (or
  * define static inline versions of them):
  * - jtag_add_callback

commit 583be907cf56162123cd1d4ecf6ceace09922211
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Jan 28 12:51:44 2021 +0100

    flash: fix some minor typo
    
    Minor typos found by the new checkpatch boosted by the dictionary
    provided by 'codespell'.
    
    Change-Id: Ia5f134c91beb483fd865df9e4877e0ec3e789478
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6215
    Tested-by: jenkins

diff --git a/src/flash/nand/core.h b/src/flash/nand/core.h
index 5bf9fb3d1..12fc2b768 100644
--- a/src/flash/nand/core.h
+++ b/src/flash/nand/core.h
@@ -100,7 +100,7 @@ struct nand_info {
 	const char *name;
 };
 
-/* Option constants for bizarre disfunctionality and real features
+/* Option constants for bizarre dysfunctionality and real features
  */
 enum {
 	/* Chip can not auto increment pages */
diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c
index e6b452e05..1fee6eb2e 100644
--- a/src/flash/nor/kinetis.c
+++ b/src/flash/nor/kinetis.c
@@ -2803,7 +2803,7 @@ static int kinetis_blank_check(struct flash_bank *bank)
 	struct kinetis_chip *k_chip = k_bank->k_chip;
 	int result;
 
-	/* suprisingly blank check does not work in VLPR and HSRUN modes */
+	/* surprisingly blank check does not work in VLPR and HSRUN modes */
 	result = kinetis_check_run_mode(k_chip);
 	if (result != ERROR_OK)
 		return result;
diff --git a/src/flash/nor/mrvlqspi.c b/src/flash/nor/mrvlqspi.c
index 3f5ce2c66..b98c49dbc 100644
--- a/src/flash/nor/mrvlqspi.c
+++ b/src/flash/nor/mrvlqspi.c
@@ -37,7 +37,7 @@
 #define QSPI_W_EN (0x1)
 #define QSPI_SS_DISABLE (0x0)
 #define QSPI_SS_ENABLE (0x1)
-#define WRITE_DISBALE (0x0)
+#define WRITE_DISABLE (0x0)
 #define WRITE_ENABLE (0x1)
 
 #define QSPI_TIMEOUT (1000)
diff --git a/src/flash/nor/msp432.h b/src/flash/nor/msp432.h
index 663393b79..af1d40c3c 100644
--- a/src/flash/nor/msp432.h
+++ b/src/flash/nor/msp432.h
@@ -43,7 +43,7 @@
 #define P4_SECTOR_LENGTH   0x1000
 #define P4_ALGO_ENTRY_ADDR 0x01000110
 
-/* MSP432E4 flash paramters */
+/* MSP432E4 flash parameters */
 #define E4_FLASH_BASE      FLASH_BASE
 #define E4_FLASH_SIZE      0x100000
 #define E4_SECTOR_LENGTH   0x4000
diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index 12bbac64f..5e17a8c7b 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -1038,7 +1038,7 @@ static int nrf5_write(struct flash_bank *bank, const uint8_t *buffer,
 	 * RM reads: Code running from code region 1 will not be able to write
 	 * to code region 0.
 	 * Unfortunately the flash loader running from RAM can write to both
-	 * code regions whithout any hint the protection is violated.
+	 * code regions without any hint the protection is violated.
 	 *
 	 * Update protection state and check if any flash sector to be written
 	 * is protected. */
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c
index 11aa43898..a3555a4a6 100644
--- a/src/flash/nor/stmqspi.c
+++ b/src/flash/nor/stmqspi.c
@@ -175,7 +175,7 @@ struct stmqspi_flash_bank {
 	bool octo;
 	struct flash_device dev;
 	uint32_t io_base;
-	uint32_t saved_cr;	/* in particalar FSEL, DFM bit mask in QUADSPI_CR *AND* OCTOSPI_CR */
+	uint32_t saved_cr;	/* in particular FSEL, DFM bit mask in QUADSPI_CR *AND* OCTOSPI_CR */
 	uint32_t saved_ccr; /* different meaning for QUADSPI and OCTOSPI */
 	uint32_t saved_tcr;	/* only for OCTOSPI */
 	uint32_t saved_ir;	/* only for OCTOSPI */

commit 2a1f3b2574ef8b046d29f7321f74e59cc0b40e8b
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Jan 28 12:27:53 2021 +0100

    tcl: fix some minor typo
    
    Minor typos found by the new checkpatch boosted by the dictionary
    provided by 'codespell'.
    While there, fix one indentation.
    
    Change-Id: I72369ed26f363bacd760b40b8c83dd95e89d28a4
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6214
    Tested-by: jenkins

diff --git a/tcl/bitsbytes.tcl b/tcl/bitsbytes.tcl
index 01cc50926..756c725df 100644
--- a/tcl/bitsbytes.tcl
+++ b/tcl/bitsbytes.tcl
@@ -2,7 +2,7 @@
 # Purpose - Create some $BIT variables
 #           Create $K and $M variables
 #          and some bit field extraction variables.
-# Creat helper variables ...
+# Create helper variables ...
 #    BIT0.. BIT31
 
 for { set x 0  } { $x < 32 } { set x [expr {$x + 1}]} {
diff --git a/tcl/board/arm_evaluator7t.cfg b/tcl/board/arm_evaluator7t.cfg
index 96d859cd3..ef4b7821f 100644
--- a/tcl/board/arm_evaluator7t.cfg
+++ b/tcl/board/arm_evaluator7t.cfg
@@ -5,5 +5,5 @@ source [find target/samsung_s3c4510.cfg]
 #
 # FIXME:
 #  Add (A) sdram configuration
-#  Add (B) flash cfi programing configuration
+#  Add (B) flash cfi programming configuration
 #
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index 59ee4d2a3..e1cbb9120 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -153,7 +153,7 @@ proc at91sam9g20_reset_init { } {
 
 	nand probe nandflash_cs3
 
-	# The AT91SAM9G20-EK evaluation board has build-in serial data flash also.
+	# The AT91SAM9G20-EK evaluation board has built-in serial data flash also.
 
 	# Now setup SDRAM.  This is tricky and configuration is very important for reliability!  The current calculations
 	# are based on 2 x Micron MT48LC16M16A2-75 memory (4 M x 16 bit x 4 banks).  If you use this file as a reference
diff --git a/tcl/board/digilent_atlys.cfg b/tcl/board/digilent_atlys.cfg
index f298e3d73..3eb6219fd 100644
--- a/tcl/board/digilent_atlys.cfg
+++ b/tcl/board/digilent_atlys.cfg
@@ -5,7 +5,7 @@
 #   ID 1443:0007 Digilent Development board JTAG
 #
 # However, the ixo-usb-jtag project provides an alternative open firmware for
-# the on board programmer. When using thie firmware the board will then
+# the on board programmer. When using this firmware the board will then
 # enumerate as:
 #   ID 16c0:06ad Van Ooijen Technische Informatica
 # (With SerialNumber == hw_nexys)
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 2fe1f3cda..826830669 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -34,7 +34,7 @@ flash bank $_FLASHNAME cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
 
 $_TARGETNAME configure -event reset-init {
   # Flash
-  mww 0x20200010 0x00000007     ;# FBWST: 7 wait states, not chached
+  mww 0x20200010 0x00000007     ;# FBWST: 7 wait states, not cached
 
   # Use PLL
   mww 0xFFFF8020 0x00000001     ;# XTAL_OSC_CONTROL: enable, 1-20 MHz
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index 9dca5a37c..3d01b38a2 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -38,7 +38,7 @@
 #     it's apt-get install libusb-dev.  When I made my config I only included
 #     --enable-jlink and --enable-usbdevs
 #
-#     I HAVE NOT Tested this throughly, so there could still be problems.
+#     I HAVE NOT Tested this thoroughly, so there could still be problems.
 #     But it should get you way ahead of the game from where I started.
 #     If you find problems (and fixes) please post them to
 #     ope...@li... and join the developers and
diff --git a/tcl/board/uptech_2410.cfg b/tcl/board/uptech_2410.cfg
index 227cf42f6..0a2c475f7 100644
--- a/tcl/board/uptech_2410.cfg
+++ b/tcl/board/uptech_2410.cfg
@@ -1,5 +1,5 @@
 # Target Configuration for the Uptech 2410 board.
-# This configuration hould also work on smdk2410, but I havn't tested it yet.
+# This configuration should also work on smdk2410, but I haven't tested it yet.
 # Author: xio...@Gm...
 
 source [find target/samsung_s3c2410.cfg]
diff --git a/tcl/interface/ftdi/swd-resistor-hack.cfg b/tcl/interface/ftdi/swd-resistor-hack.cfg
index 04f3a7397..26eb44c5f 100644
--- a/tcl/interface/ftdi/swd-resistor-hack.cfg
+++ b/tcl/interface/ftdi/swd-resistor-hack.cfg
@@ -5,7 +5,7 @@
 #
 # You also need to have reliable GND connection between the target and
 # adapter. Vref of the adapter should be supplied with a voltage equal
-# to the target's (preferrably connect it to Vcc). You can also
+# to the target's (preferably connect it to Vcc). You can also
 # optionally connect nSRST. Leave everything else unconnected.
 #
 # FTDI                          Target
diff --git a/tcl/target/c100config.tcl b/tcl/target/c100config.tcl
index f252360c5..e9372195a 100644
--- a/tcl/target/c100config.tcl
+++ b/tcl/target/c100config.tcl
@@ -43,7 +43,7 @@ proc setupTelo {} {
 
     # setup GPIO used as control signals for C100
     setupGPIO
-    # This will allow acces to lower 8MB or NOR
+    # This will allow access to lower 8MB or NOR
     lowGPIO5
     # setup NOR size,timing,etc.
     setupNOR
@@ -79,7 +79,7 @@ proc setupNOR {} {
     #mww $EX_CS0_TMG3_REG
     # set EBUS clock 165/5=33MHz
     mww $EX_CLOCK_DIV_REG 0x5
-    # everthing else is OK with default
+    # everything else is OK with default
 }
 
 proc bootNOR {} {
@@ -159,7 +159,7 @@ proc boardID {id} {
 proc ooma_board_detect {} {
     set GPIO_BOOTSTRAP_REG	[regs GPIO_BOOTSTRAP_REG]
 
-    # read the current value of the BOOTSRAP pins
+    # read the current value of the BOOTSTRAP pins
     set tmp [mrw $GPIO_BOOTSTRAP_REG]
     echo [format "GPIO_BOOTSTRAP_REG  (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG $tmp]
     # extract the GPBP bits
diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl
index 2199b7afd..bdcfd8cf5 100644
--- a/tcl/target/c100helper.tcl
+++ b/tcl/target/c100helper.tcl
@@ -13,16 +13,16 @@ proc helpC100 {} {
     echo "10) showArmClk:        will show current config registers for Arm Bus Clock"
     echo "11) setupArmClk:       will setup Amba Bus Clock=450MHz"
     echo "12) ooma_board_detect: will show which version of Telo you have"
-    echo "13) setupDDR2:         will configure DDR2 controller, you must have PLLs configureg"
+    echo "13) setupDDR2:         will configure DDR2 controller, you must have PLLs configured"
     echo "14) showDDR2:          will show DDR2 config registers"
     echo "15) showWatchdog:      will show current register config for watchdog"
     echo "16) reboot:            will trigger watchdog and reboot Telo (hw reset)"
     echo "17) bootNOR:           will boot Telo from NOR"
-    echo "18) setupUART0:        will configure UART0 for 115200 8N1, PLLs have to be confiured"
+    echo "18) setupUART0:        will configure UART0 for 115200 8N1, PLLs have to be configured"
     echo "19) putcUART0:         will print a character on UART0"
     echo "20) putsUART0:         will print a string on UART0"
-    echo "21) trainDDR2:          will run DDR2 training program"
-    echo "22) flashUBOOT:        will prgram NOR sectors 0-3 with u-boot.bin"
+    echo "21) trainDDR2:         will run DDR2 training program"
+    echo "22) flashUBOOT:        will program NOR sectors 0-3 with u-boot.bin"
 }
 
 source [find mem_helper.tcl]
diff --git a/tcl/target/davinci.cfg b/tcl/target/davinci.cfg
index d2ed5928b..5ca54aed4 100644
--- a/tcl/target/davinci.cfg
+++ b/tcl/target/davinci.cfg
@@ -267,7 +267,7 @@ proc pll_v03_setup {pll_addr mult config} {
 	if {$aln != 0} {
 		# clear pllcmd.GO
 		mww [expr {$pll_addr + 0x0138}] 0x00
-		# write alingment flags
+		# write alignment flags
 		mww [expr {$pll_addr + 0x0140}] $aln
 		# write pllcmd.GO; poll pllstat.GO
 		mww [expr {$pll_addr + 0x0138}] 0x01
diff --git a/tcl/target/lpc8nxx.cfg b/tcl/target/lpc8nxx.cfg
index 1bc77b20d..4db78cbfc 100644
--- a/tcl/target/lpc8nxx.cfg
+++ b/tcl/target/lpc8nxx.cfg
@@ -56,7 +56,7 @@ proc set_sysclk_500khz {} {
 	echo "Notice: sysclock set to 500kHz."
 }
 
-# Do not remap the ARM interrupt vectors to anything but the beginning ot the flash.
+# Do not remap the ARM interrupt vectors to anything but the beginning of the flash.
 # Table System memory remap register (SYSMEMREMAP, address 0x4004 8000) bit description
 # Bit Symbol  Value   Description
 # 0   map         -   interrupt vector remap. 0 after boot.
diff --git a/tcl/target/psoc4.cfg b/tcl/target/psoc4.cfg
index d4ee79ff2..cffcbc753 100644
--- a/tcl/target/psoc4.cfg
+++ b/tcl/target/psoc4.cfg
@@ -60,7 +60,7 @@ adapter speed 1500
 #
 # Newer families like PSoC 4000, 4100M, 4200M, 4100L, 4200L and PSoC 4 BLE
 # clear TEST_MODE flag during device reset so workaround is not possible.
-# Use a KitProg adapter for theese devices or "reset halt" will not stop
+# Use a KitProg adapter for these devices or "reset halt" will not stop
 # before executing user code.
 #
 # 3) SWD cannot be connected during system initialization after reset.

-----------------------------------------------------------------------

Summary of changes:
 configure.ac                               |  2 +
 doc/manual/style.txt                       |  2 +-
 doc/openocd.texi                           | 68 ++++++++++++++++++++++++++++--
 src/flash/nand/core.h                      |  2 +-
 src/flash/nor/kinetis.c                    |  2 +-
 src/flash/nor/mrvlqspi.c                   |  2 +-
 src/flash/nor/msp432.h                     |  2 +-
 src/flash/nor/nrf5.c                       |  2 +-
 src/flash/nor/stmqspi.c                    |  2 +-
 src/helper/time_support.h                  |  2 +-
 src/jtag/aice/aice_interface.c             |  2 +-
 src/jtag/aice/aice_usb.c                   |  2 +-
 src/jtag/core.c                            |  4 +-
 src/jtag/drivers/cmsis_dap_usb_bulk.c      |  2 +-
 src/jtag/drivers/jtag_dpi.c                |  2 +-
 src/jtag/drivers/nulink_usb.c              |  8 ++--
 src/jtag/drivers/usb_blaster/usb_blaster.c |  4 +-
 src/jtag/minidriver.h                      |  2 +-
 src/rtos/mqx.c                             |  2 +-
 src/target/arc.c                           |  2 +-
 src/target/arc.h                           |  2 +-
 src/target/arm_adi_v5.c                    |  2 +-
 src/target/avr32_mem.c                     |  4 +-
 src/target/embeddedice.h                   |  2 +-
 src/target/target.c                        |  2 +-
 src/target/target_type.h                   |  2 +-
 src/xsvf/xsvf.c                            |  2 +-
 tcl/bitsbytes.tcl                          |  2 +-
 tcl/board/arm_evaluator7t.cfg              |  2 +-
 tcl/board/at91sam9g20-ek.cfg               |  2 +-
 tcl/board/digilent_atlys.cfg               |  2 +-
 tcl/board/hitex_lpc2929.cfg                |  2 +-
 tcl/board/mini2440.cfg                     |  2 +-
 tcl/board/uptech_2410.cfg                  |  2 +-
 tcl/interface/ftdi/swd-resistor-hack.cfg   |  2 +-
 tcl/target/c100config.tcl                  |  6 +--
 tcl/target/c100helper.tcl                  |  8 ++--
 tcl/target/davinci.cfg                     |  2 +-
 tcl/target/lpc8nxx.cfg                     |  2 +-
 tcl/target/psoc4.cfg                       |  2 +-
 40 files changed, 116 insertions(+), 52 deletions(-)


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