From: OpenOCD-Gerrit <ope...@us...> - 2021-03-19 22:00:49
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 84af95bb54926f9cec10673362457aa99415c0cd (commit) via 7bc687ade5b338bc182c4e69f35e05a2db00ca9f (commit) from 78462af05feec1627474d26a2c91fcdada5b180e (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 84af95bb54926f9cec10673362457aa99415c0cd Author: Tarek BOCHKATI <tar...@gm...> Date: Wed Oct 14 18:07:14 2020 +0100 aarch64: handle semihosting in aarch32 state Change-Id: I0e868d617db126a2b258e27b11979b75b5bb72f5 Signed-off-by: Tarek BOCHKATI <tar...@gm...> Reviewed-on: http://openocd.zylin.com/5860 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <mat...@we...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c index 723be577e..9de7048f4 100644 --- a/src/target/arm_semihosting.c +++ b/src/target/arm_semihosting.c @@ -123,6 +123,22 @@ static int post_result(struct target *target) uint64_t pc = buf_get_u64(arm->core_cache->reg_list[32].value, 0, 64); buf_set_u64(arm->pc->value, 0, 64, pc + 4); arm->pc->dirty = true; + } else if (arm->core_state == ARM_STATE_ARM) { + /* return value in R0 */ + buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, target->semihosting->result); + arm->core_cache->reg_list[0].dirty = true; + + uint32_t pc = buf_get_u32(arm->core_cache->reg_list[32].value, 0, 32); + buf_set_u32(arm->pc->value, 0, 32, pc + 4); + arm->pc->dirty = true; + } else if (arm->core_state == ARM_STATE_THUMB) { + /* return value in R0 */ + buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, target->semihosting->result); + arm->core_cache->reg_list[0].dirty = true; + + uint32_t pc = buf_get_u32(arm->core_cache->reg_list[32].value, 0, 32); + buf_set_u32(arm->pc->value, 0, 32, pc + 2); + arm->pc->dirty = true; } } else { /* resume execution, this will be pc+2 to skip over the @@ -275,6 +291,16 @@ int arm_semihosting(struct target *target, int *retval) if (target->debug_reason != DBG_REASON_BREAKPOINT) return 0; + /* According to ARM Semihosting for AArch32 and AArch64: + * The HLT encodings are new in version 2.0 of the semihosting specification. + * Where possible, have semihosting callers continue to use the previously + * existing trap instructions to ensure compatibility with legacy semihosting + * implementations. + * These trap instructions are HLT for A64, SVC on A+R profile A32 or T32, + * and BKPT on M profile. + * However, it is necessary to change from SVC to HLT instructions to support + * AArch32 semihosting properly in a mixed AArch32/AArch64 system. */ + if (arm->core_state == ARM_STATE_AARCH64) { uint32_t insn = 0; r = arm->pc; @@ -284,9 +310,38 @@ int arm_semihosting(struct target *target, int *retval) if (*retval != ERROR_OK) return 1; - /* bkpt 0xAB */ + /* HLT 0xF000 */ if (insn != 0xD45E0000) return 0; + } else if (arm->core_state == ARM_STATE_ARM) { + r = arm->pc; + pc = buf_get_u32(arm->pc->value, 0, 32); + + /* A32 instruction => check for HLT 0xF000 (0xE10F0070) */ + uint32_t insn = 0; + + *retval = target_read_u32(target, pc, &insn); + + if (*retval != ERROR_OK) + return 1; + + /* HLT 0xF000*/ + if (insn != 0xE10F0070) + return 0; + } else if (arm->core_state == ARM_STATE_THUMB) { + r = arm->pc; + pc = buf_get_u32(arm->pc->value, 0, 32); + + /* T32 instruction => check for HLT 0x3C (0xBABC) */ + uint16_t insn = 0; + *retval = target_read_u16(target, pc, &insn); + + if (*retval != ERROR_OK) + return 1; + + /* HLT 0x3C*/ + if (insn != 0xBABC) + return 0; } else return 1; } else { diff --git a/src/target/armv8.c b/src/target/armv8.c index 95efdc90b..6bf3b110d 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -1098,13 +1098,6 @@ int armv8_handle_cache_info_command(struct command_invocation *cmd, static int armv8_setup_semihosting(struct target *target, int enable) { - struct arm *arm = target_to_arm(target); - - if (arm->core_state != ARM_STATE_AARCH64) { - LOG_ERROR("semihosting only supported in AArch64 state\n"); - return ERROR_FAIL; - } - return ERROR_OK; } commit 7bc687ade5b338bc182c4e69f35e05a2db00ca9f Author: Andrew Wesie <aw...@gm...> Date: Wed Mar 17 10:23:16 2021 -0500 tcl/interface/ftdi: Add miniWiggler debugger config Change-Id: I91f73a377cd9525008d09fda7a7c58d498014b74 Signed-off-by: Andrew Wesie <aw...@gm...> Reviewed-on: http://openocd.zylin.com/6111 Reviewed-by: Antonio Borneo <bor...@gm...> Tested-by: jenkins diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules index e0864b827..36bdb5318 100644 --- a/contrib/60-openocd.rules +++ b/contrib/60-openocd.rules @@ -90,6 +90,9 @@ ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f139", MODE="660", GROUP="plugdev", # Cypress KitProg in CMSIS-DAP mode ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f138", MODE="660", GROUP="plugdev", TAG+="uaccess" +# Infineon DAP miniWiggler v3 +ATTRS{idVendor}=="058b", ATTRS{idProduct}=="0043", MODE="660", GROUP="plugdev", TAG+="uaccess" + # Hilscher NXHX Boards ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="660", GROUP="plugdev", TAG+="uaccess" diff --git a/tcl/interface/ftdi/miniwiggler.cfg b/tcl/interface/ftdi/miniwiggler.cfg new file mode 100644 index 000000000..6e53daede --- /dev/null +++ b/tcl/interface/ftdi/miniwiggler.cfg @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Infineon DAP miniWiggler V3 +# +# https://www.infineon.com/cms/en/product/evaluation-boards/kit_miniwiggler_3_usb/ +# +# Layout: FTDI FT2232 +# ADBUS0 TCK +# ADBUS1 TDI +# ADBUS2 TDO +# ADBUS3 TMS +# ADBUS4 nOE (output enable) +# ADBUS5 +# ADBUS6 +# ADBUS7 Blue LED +# +# ACBUS0 nTRST +# ACBUS1 nSRST +# ACUBS2 +# ACBUS3 +# ACBUS4 +# ACBUS5 +# ACBUS6 +# ACBUS7 +# + +adapter driver ftdi +ftdi_device_desc "DAS JDS miniWiggler V3.1" +ftdi_vid_pid 0x058b 0x0043 + +ftdi_channel 0 +ftdi_layout_init 0x0008 0x001b +ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 +ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 ----------------------------------------------------------------------- Summary of changes: contrib/60-openocd.rules | 3 ++ src/target/arm_semihosting.c | 57 +++++++++++++++++++++++++++++++++++++- src/target/armv8.c | 7 ----- tcl/interface/ftdi/miniwiggler.cfg | 34 +++++++++++++++++++++++ 4 files changed, 93 insertions(+), 8 deletions(-) create mode 100644 tcl/interface/ftdi/miniwiggler.cfg hooks/post-receive -- Main OpenOCD repository |