From: OpenOCD-Gerrit <ope...@us...> - 2021-01-18 15:32:41
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 2dc9c1df81b6458875233fc3710ab9d3e871743d (commit) via 404993b29f1304fb53202fb88147298465bfb525 (commit) via 310c9800c72f37dd50e855513badc908fcfbafcf (commit) from aaa6110d9b027acd1d027ef27c723ec9cf2381a0 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 2dc9c1df81b6458875233fc3710ab9d3e871743d Author: Tarek BOCHKATI <tar...@st...> Date: Tue Jan 12 11:57:18 2021 +0100 cortex_m: [FIX] ARMv8-M does not support VECTRESET ref: Arm®v8-M Architecture Reference Manual (DDI0553B.m) D1.2.3: AIRCR, Application Interrupt and Reset Control Register Bit [0] is RES0 Change-Id: I6ef451b2c114487e2732852a60e86c292ffa6a50 Signed-off-by: Tarek BOCHKATI <tar...@st...> Reviewed-on: http://openocd.zylin.com/6014 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index ac308b43b..ce2c426ce 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -2011,8 +2011,8 @@ int cortex_m_examine(struct target *target) } LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid); - /* VECTRESET is not supported on Cortex-M0, M0+ and M1 */ - cortex_m->vectreset_supported = i > 1; + /* VECTRESET is supported only on ARMv7-M cores */ + cortex_m->vectreset_supported = !armv7m->arm.is_armv8m && !armv7m->arm.is_armv6m; if (i == 4) { target_read_u32(target, MVFR0, &mvfr0); commit 404993b29f1304fb53202fb88147298465bfb525 Author: Tarek BOCHKATI <tar...@st...> Date: Mon Jan 11 19:23:58 2021 +0100 target/riscv: fix build error with -Werror=maybe-uninitialized using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized we get this error: /src/target/riscv/riscv.c: In function âriscv_address_translateâ: /src/target/riscv/riscv.c:1536:13: error: âpteâ may be used uninitialized Change-Id: I51e180b43f9b6996e4e4058db49c179b9f81bcdc Signed-off-by: Tarek BOCHKATI <tar...@st...> Reviewed-on: http://openocd.zylin.com/6013 Tested-by: jenkins Reviewed-by: Tim Newsome <ti...@si...> Reviewed-by: Tarek BOCHKATI <tar...@gm...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 0d1cee1bf..c26e6358f 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1446,7 +1446,7 @@ static int riscv_address_translate(struct target *target, uint64_t ppn_value; target_addr_t table_address; virt2phys_info_t *info; - uint64_t pte; + uint64_t pte = 0; int i; if (riscv_rtos_enabled(target)) commit 310c9800c72f37dd50e855513badc908fcfbafcf Author: Tarek BOCHKATI <tar...@st...> Date: Mon Jan 11 19:21:06 2021 +0100 flash/stmqspi: fix build error with -Werror=maybe-uninitialized using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized we get this error: /src/flash/nor/stmqspi.c: In function âread_flash_idâ: /src/flash/nor/stmqspi.c:1948:6: error: âretvalâ may be used uninitialized Change-Id: Ifd8ae60df847fc61e22ca100c008e3914c9af79b Signed-off-by: Tarek BOCHKATI <tar...@st...> Reviewed-on: http://openocd.zylin.com/6012 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tar...@gm...> Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c index f54e4975d..a013336a0 100644 --- a/src/flash/nor/stmqspi.c +++ b/src/flash/nor/stmqspi.c @@ -1945,7 +1945,7 @@ static int read_flash_id(struct flash_bank *bank, uint32_t *id1, uint32_t *id2) uint32_t io_base = stmqspi_info->io_base; uint8_t byte; unsigned int type, count, len1, len2; - int retval; + int retval = ERROR_OK; /* invalidate both ids */ *id1 = 0; ----------------------------------------------------------------------- Summary of changes: src/flash/nor/stmqspi.c | 2 +- src/target/cortex_m.c | 4 ++-- src/target/riscv/riscv.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) hooks/post-receive -- Main OpenOCD repository |