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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1397-gd3249fd45
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From: OpenOCD-Gerrit <ope...@us...> - 2020-09-05 16:13:48
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- Log -----------------------------------------------------------------
commit d3249fd45a7832ed922ed4227c867c3c674b4812
Author: Antonio Borneo <bor...@gm...>
Date: Tue Aug 18 18:56:53 2020 +0200
openocd: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.
Change-Id: I4de49bf02c9e37b72240224c23fc83abe8a4fa83
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5819
Tested-by: jenkins
diff --git a/src/pld/xilinx_bit.c b/src/pld/xilinx_bit.c
index a975a7a0c..f83d8942d 100644
--- a/src/pld/xilinx_bit.c
+++ b/src/pld/xilinx_bit.c
@@ -119,7 +119,7 @@ int xilinx_read_bit_file(struct xilinx_bit_file *bit_file, const char *filename)
if (read_section(input_file, 4, 'e', &bit_file->length, &bit_file->data) != ERROR_OK)
return ERROR_PLD_FILE_LOAD_FAILED;
- LOG_DEBUG("bit_file: %s %s %s,%s %" PRIi32 "", bit_file->source_file, bit_file->part_name,
+ LOG_DEBUG("bit_file: %s %s %s,%s %" PRIu32 "", bit_file->source_file, bit_file->part_name,
bit_file->date, bit_file->time, bit_file->length);
fclose(input_file);
diff --git a/src/rtos/ThreadX.c b/src/rtos/ThreadX.c
index 9605533aa..302641bae 100644
--- a/src/rtos/ThreadX.c
+++ b/src/rtos/ThreadX.c
@@ -248,7 +248,7 @@ static const struct rtos_register_stacking *get_stacking_info_arm926ejs(const st
LOG_DEBUG(" solicited stack");
return param->stacking_info + 0;
} else {
- LOG_DEBUG(" interrupt stack: %u", flag);
+ LOG_DEBUG(" interrupt stack: %" PRIu32, flag);
return param->stacking_info + 1;
}
}
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index 38e42a041..e0789aa63 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -281,7 +281,7 @@ static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id,
struct reg *reg = register_get_by_number(curr->reg_cache, reg_num, true);
if (!reg) {
- LOG_ERROR("Couldn't find register %d in thread %" PRId64 ".", reg_num,
+ LOG_ERROR("Couldn't find register %" PRIu32 " in thread %" PRId64 ".", reg_num,
thread_id);
return ERROR_FAIL;
}
diff --git a/src/rtos/linux.c b/src/rtos/linux.c
index dbbf97b44..44e132d36 100644
--- a/src/rtos/linux.c
+++ b/src/rtos/linux.c
@@ -1483,13 +1483,13 @@ static char *linux_ps_command(struct target *target)
if (temp->context)
tmp +=
sprintf(tmp,
- "%" PRId32 "\t\t%" PRId32 "\t\t%" PRIx32 "\t\t%s\n",
+ "%" PRIu32 "\t\t%" PRIu32 "\t\t%" PRIx32 "\t\t%s\n",
temp->pid, temp->oncpu,
temp->asid, temp->name);
else
tmp +=
sprintf(tmp,
- "%" PRId32 "\t\t%" PRId32 "\t\t%" PRIx32 "\t\t%s\n",
+ "%" PRIu32 "\t\t%" PRIu32 "\t\t%" PRIx32 "\t\t%s\n",
temp->pid, temp->oncpu,
temp->asid, temp->name);
}
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 85d3c14b1..c36966554 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1388,8 +1388,8 @@ static int gdb_set_register_packet(struct connection *connection,
}
if (chars != (DIV_ROUND_UP(reg_list[reg_num]->size, 8) * 2)) {
- LOG_ERROR("gdb sent %d bits for a %d-bit register (%s)",
- (int) chars * 4, reg_list[reg_num]->size, reg_list[reg_num]->name);
+ LOG_ERROR("gdb sent %zu bits for a %" PRIu32 "-bit register (%s)",
+ chars * 4, reg_list[reg_num]->size, reg_list[reg_num]->name);
free(bin_buf);
free(reg_list);
return ERROR_SERVER_REMOTE_CLOSED;
@@ -2050,7 +2050,7 @@ static int gdb_generate_reg_type_description(struct target *target,
}
/* <vector id="id" type="type" count="count"/> */
xml_printf(&retval, tdesc, pos, size,
- "<vector id=\"%s\" type=\"%s\" count=\"%d\"/>\n",
+ "<vector id=\"%s\" type=\"%s\" count=\"%" PRIu32 "\"/>\n",
type->id, type->reg_type_vector->type->id,
type->reg_type_vector->count);
@@ -2097,11 +2097,11 @@ static int gdb_generate_reg_type_description(struct target *target,
* <field name="name" start="start" end="end"/> ...
* </struct> */
xml_printf(&retval, tdesc, pos, size,
- "<struct id=\"%s\" size=\"%d\">\n",
+ "<struct id=\"%s\" size=\"%" PRIu32 "\">\n",
type->id, type->reg_type_struct->size);
while (field != NULL) {
xml_printf(&retval, tdesc, pos, size,
- "<field name=\"%s\" start=\"%d\" end=\"%d\" type=\"%s\" />\n",
+ "<field name=\"%s\" start=\"%" PRIu32 "\" end=\"%" PRIu32 "\" type=\"%s\" />\n",
field->name, field->bitfield->start, field->bitfield->end,
gdb_get_reg_type_name(field->bitfield->type));
@@ -2142,14 +2142,14 @@ static int gdb_generate_reg_type_description(struct target *target,
* <field name="name" start="start" end="end"/> ...
* </flags> */
xml_printf(&retval, tdesc, pos, size,
- "<flags id=\"%s\" size=\"%d\">\n",
+ "<flags id=\"%s\" size=\"%" PRIu32 "\">\n",
type->id, type->reg_type_flags->size);
struct reg_data_type_flags_field *field;
field = type->reg_type_flags->fields;
while (field != NULL) {
xml_printf(&retval, tdesc, pos, size,
- "<field name=\"%s\" start=\"%d\" end=\"%d\" type=\"%s\" />\n",
+ "<field name=\"%s\" start=\"%" PRIu32 "\" end=\"%" PRIu32 "\" type=\"%s\" />\n",
field->name, field->bitfield->start, field->bitfield->end,
gdb_get_reg_type_name(field->bitfield->type));
@@ -2302,9 +2302,9 @@ static int gdb_generate_target_description(struct target *target, char **tdesc_o
xml_printf(&retval, &tdesc, &pos, &size,
"<reg name=\"%s\"", reg_list[i]->name);
xml_printf(&retval, &tdesc, &pos, &size,
- " bitsize=\"%d\"", reg_list[i]->size);
+ " bitsize=\"%" PRIu32 "\"", reg_list[i]->size);
xml_printf(&retval, &tdesc, &pos, &size,
- " regnum=\"%d\"", reg_list[i]->number);
+ " regnum=\"%" PRIu32 "\"", reg_list[i]->number);
if (reg_list[i]->caller_save)
xml_printf(&retval, &tdesc, &pos, &size,
" save-restore=\"yes\"");
commit 99add6227fe0a3be536f9b83ff6aa7dd63a8d2dc
Author: Antonio Borneo <bor...@gm...>
Date: Tue Aug 18 18:56:27 2020 +0200
target: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.
While there, fix prototype mismatch between header and C file of
the function armv7a_l1_d_cache_inval_virt().
Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5818
Tested-by: jenkins
diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index e6b1cc007..4febc8c96 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -105,7 +105,7 @@ static int aarch64_restore_system_control_reg(struct target *target)
break;
default:
- LOG_ERROR("cannot read system control register in this mode: (%s : 0x%" PRIx32 ")",
+ LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)",
armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode);
return ERROR_FAIL;
}
@@ -180,7 +180,7 @@ static int aarch64_mmu_modify(struct target *target, int enable)
break;
default:
- LOG_DEBUG("unknown cpu state 0x%" PRIx32, armv8->arm.core_mode);
+ LOG_DEBUG("unknown cpu state 0x%x", armv8->arm.core_mode);
break;
}
@@ -1042,7 +1042,7 @@ static int aarch64_post_debug_entry(struct target *target)
break;
default:
- LOG_ERROR("cannot read system control register in this mode: (%s : 0x%" PRIx32 ")",
+ LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)",
armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode);
return ERROR_FAIL;
}
diff --git a/src/target/arc.c b/src/target/arc.c
index ba8903d48..e1b576436 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -197,7 +197,7 @@ int arc_reg_add(struct target *target, struct arc_reg_desc *arc_reg,
arc->num_regs += 1;
LOG_DEBUG(
- "added register {name=%s, num=0x%x, type=%s%s%s%s}",
+ "added register {name=%s, num=0x%" PRIx32 ", type=%s%s%s%s}",
arc_reg->name, arc_reg->arch_num, arc_reg->data_type->id,
arc_reg->is_core ? ", core" : "", arc_reg->is_bcr ? ", bcr" : "",
arc_reg->is_general ? ", general" : ""
@@ -889,7 +889,7 @@ static int arc_save_context(struct target *target)
core_cnt += 1;
reg->valid = true;
reg->dirty = false;
- LOG_DEBUG("Get core register regnum=%" PRIu32 ", name=%s, value=0x%08" PRIx32,
+ LOG_DEBUG("Get core register regnum=%u, name=%s, value=0x%08" PRIx32,
i, arc_reg->name, core_values[core_cnt]);
}
}
@@ -904,7 +904,7 @@ static int arc_save_context(struct target *target)
aux_cnt += 1;
reg->valid = true;
reg->dirty = false;
- LOG_DEBUG("Get aux register regnum=%" PRIu32 ", name=%s, value=0x%08" PRIx32,
+ LOG_DEBUG("Get aux register regnum=%u, name=%s, value=0x%08" PRIx32,
i, arc_reg->name, aux_values[aux_cnt]);
}
}
@@ -1464,7 +1464,7 @@ static int arc_configure_actionpoint(struct target *target, uint32_t ap_num,
if (control_tt != AP_AC_TT_DISABLE) {
if (arc->actionpoints_num_avail < 1) {
- LOG_ERROR("No free actionpoints, maximim amount is %" PRIu32,
+ LOG_ERROR("No free actionpoints, maximim amount is %u",
arc->actionpoints_num);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@@ -1551,7 +1551,7 @@ static int arc_set_breakpoint(struct target *target,
}
if (bp_num >= arc->actionpoints_num) {
- LOG_ERROR("No free actionpoints, maximum amount is %" PRIu32,
+ LOG_ERROR("No free actionpoints, maximum amount is %u",
arc->actionpoints_num);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@@ -1607,7 +1607,7 @@ static int arc_unset_breakpoint(struct target *target,
} else {
LOG_WARNING("Software breakpoint @0x%" TARGET_PRIxADDR
" has been overwritten outside of debugger."
- "Expected: @0x%" PRIx32 ", got: @0x%" PRIx32,
+ "Expected: @0x%x, got: @0x%" PRIx32,
breakpoint->address, ARC_SDBBP_32, current_instr);
}
} else if (breakpoint->length == 2) {
diff --git a/src/target/arc.h b/src/target/arc.h
index f9ee5b45e..aeb326cb5 100644
--- a/src/target/arc.h
+++ b/src/target/arc.h
@@ -55,7 +55,7 @@
#define REG_TYPE_MAX_NAME_LENGTH 20
/* ARC 32bits opcodes */
-#define ARC_SDBBP_32 0x256F003F /* BRK */
+#define ARC_SDBBP_32 0x256F003FU /* BRK */
/* ARC 16bits opcodes */
#define ARC_SDBBP_16 0x7FFF /* BRK_S */
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index b1b9aedd5..d70d27377 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -102,7 +102,7 @@ static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, struct breakpoint *br
} else
LOG_ERROR("BUG: no hardware comparator available");
- LOG_DEBUG("BPID: %" PRId32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %d",
+ LOG_DEBUG("BPID: %" PRIu32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %d",
breakpoint->unique_id,
breakpoint->address,
breakpoint->set);
@@ -188,7 +188,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
int retval = ERROR_OK;
- LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d",
+ LOG_DEBUG("BPID: %" PRIu32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d",
breakpoint->unique_id,
breakpoint->address,
breakpoint->type);
@@ -300,7 +300,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR,
+ LOG_DEBUG("BPID: %" PRIu32 ", Address: 0x%08" TARGET_PRIxADDR,
breakpoint->unique_id,
breakpoint->address);
@@ -310,7 +310,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
}
if (breakpoint->type == BKPT_HARD) {
- LOG_DEBUG("BPID: %" PRId32 " Releasing hw wp: %d",
+ LOG_DEBUG("BPID: %" PRIu32 " Releasing hw wp: %d",
breakpoint->unique_id,
breakpoint->set);
if (breakpoint->set == 1) {
@@ -1725,7 +1725,7 @@ int arm7_9_resume(struct target *target,
breakpoint = breakpoint_find(target,
buf_get_u32(arm->pc->value, 0, 32));
if (breakpoint != NULL) {
- LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRId32,
+ LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRIu32,
breakpoint->address,
breakpoint->unique_id);
retval = arm7_9_unset_breakpoint(target, breakpoint);
diff --git a/src/target/arm946e.c b/src/target/arm946e.c
index 33da4a4f3..8754c861c 100644
--- a/src/target/arm946e.c
+++ b/src/target/arm946e.c
@@ -596,7 +596,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
uint32_t value;
retval = arm946e_read_cp15(target, address, &value);
if (retval != ERROR_OK) {
- command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
+ command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address);
return retval;
}
retval = jtag_execute_queue();
@@ -611,7 +611,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
retval = arm946e_write_cp15(target, address, value);
if (retval != ERROR_OK) {
- command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
+ command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address);
return retval;
}
if (address == CP15_CTL)
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 8ddcb3c79..b6d3e50e3 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -199,7 +199,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
retval = arm966e_read_cp15(target, address, &value);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access reg %" PRIi32,
+ "couldn't access reg %" PRIu32,
address);
return ERROR_OK;
}
@@ -207,7 +207,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
if (retval != ERROR_OK)
return retval;
- command_print(CMD, "%" PRIi32 ": %8.8" PRIx32,
+ command_print(CMD, "%" PRIu32 ": %8.8" PRIx32,
address, value);
} else if (CMD_ARGC == 2) {
uint32_t value;
@@ -215,11 +215,11 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
retval = arm966e_write_cp15(target, address, value);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access reg %" PRIi32,
+ "couldn't access reg %" PRIu32,
address);
return ERROR_OK;
}
- command_print(CMD, "%" PRIi32 ": %8.8" PRIx32,
+ command_print(CMD, "%" PRIu32 ": %8.8" PRIx32,
address, value);
}
}
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 058484471..a09e2698a 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1682,7 +1682,7 @@ COMMAND_HANDLER(dap_memaccess_command)
}
dap->ap[dap->apsel].memaccess_tck = memaccess_tck;
- command_print(CMD, "memory bus access delay set to %" PRIi32 " tck",
+ command_print(CMD, "memory bus access delay set to %" PRIu32 " tck",
dap->ap[dap->apsel].memaccess_tck);
return ERROR_OK;
@@ -1695,7 +1695,7 @@ COMMAND_HANDLER(dap_apsel_command)
switch (CMD_ARGC) {
case 0:
- command_print(CMD, "%" PRIi32, dap->apsel);
+ command_print(CMD, "%" PRIu32, dap->apsel);
return ERROR_OK;
case 1:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
@@ -1721,7 +1721,7 @@ COMMAND_HANDLER(dap_apcsw_command)
switch (CMD_ARGC) {
case 0:
- command_print(CMD, "ap %" PRIi32 " selected, csw 0x%8.8" PRIx32,
+ command_print(CMD, "ap %" PRIu32 " selected, csw 0x%8.8" PRIx32,
dap->apsel, apcsw);
return ERROR_OK;
case 1:
diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 09dee9151..c36744ddf 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -257,10 +257,10 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
if (arch->ctype & 1) {
command_print(cmd,
- "L%d I-Cache: linelen %" PRIi32
- ", associativity %" PRIi32
- ", nsets %" PRIi32
- ", cachesize %" PRId32 " KBytes",
+ "L%d I-Cache: linelen %" PRIu32
+ ", associativity %" PRIu32
+ ", nsets %" PRIu32
+ ", cachesize %" PRIu32 " KBytes",
cl+1,
arch->i_size.linelen,
arch->i_size.associativity,
@@ -270,10 +270,10 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
if (arch->ctype >= 2) {
command_print(cmd,
- "L%d D-Cache: linelen %" PRIi32
- ", associativity %" PRIi32
- ", nsets %" PRIi32
- ", cachesize %" PRId32 " KBytes",
+ "L%d D-Cache: linelen %" PRIu32
+ ", associativity %" PRIu32
+ ", nsets %" PRIu32
+ ", cachesize %" PRIu32 " KBytes",
cl+1,
arch->d_u_size.linelen,
arch->d_u_size.associativity,
@@ -283,7 +283,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
}
if (l2x_cache != NULL)
- command_print(cmd, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways",
+ command_print(cmd, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways",
l2x_cache->base, l2x_cache->way);
return ERROR_OK;
@@ -399,7 +399,7 @@ int armv7a_identify_cache(struct target *target)
cache->iminline = 4UL << (ctr & 0xf);
cache->dminline = 4UL << ((ctr & 0xf0000) >> 16);
- LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRId32 " ctr.dminline %" PRId32,
+ LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRIu32 " ctr.dminline %" PRIu32,
ctr, cache->iminline, cache->dminline);
/* retrieve CLIDR
@@ -439,13 +439,13 @@ int armv7a_identify_cache(struct target *target)
goto done;
cache->arch[cl].d_u_size = decode_cache_reg(cache_reg);
- LOG_DEBUG("data/unified cache index %d << %d, way %d << %d",
+ LOG_DEBUG("data/unified cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
cache->arch[cl].d_u_size.index,
cache->arch[cl].d_u_size.index_shift,
cache->arch[cl].d_u_size.way,
cache->arch[cl].d_u_size.way_shift);
- LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways",
+ LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
cache->arch[cl].d_u_size.linelen,
cache->arch[cl].d_u_size.cachesize,
cache->arch[cl].d_u_size.associativity);
@@ -459,13 +459,13 @@ int armv7a_identify_cache(struct target *target)
goto done;
cache->arch[cl].i_size = decode_cache_reg(cache_reg);
- LOG_DEBUG("instruction cache index %d << %d, way %d << %d",
+ LOG_DEBUG("instruction cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
cache->arch[cl].i_size.index,
cache->arch[cl].i_size.index_shift,
cache->arch[cl].i_size.way,
cache->arch[cl].i_size.way_shift);
- LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways",
+ LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
cache->arch[cl].i_size.linelen,
cache->arch[cl].i_size.cachesize,
cache->arch[cl].i_size.associativity);
diff --git a/src/target/armv7a_cache.h b/src/target/armv7a_cache.h
index e0f7eb3a5..8d8ca2d7d 100644
--- a/src/target/armv7a_cache.h
+++ b/src/target/armv7a_cache.h
@@ -25,7 +25,7 @@
int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt,
unsigned int size);
int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt,
- unsigned int size);
+ uint32_t size);
int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt,
unsigned int size);
int armv7a_l1_i_cache_inval_all(struct target *target);
diff --git a/src/target/armv7a_cache_l2x.c b/src/target/armv7a_cache_l2x.c
index 3b20fd870..3607a5122 100644
--- a/src/target/armv7a_cache_l2x.c
+++ b/src/target/armv7a_cache_l2x.c
@@ -185,7 +185,7 @@ static int arm7a_handle_l2x_cache_info_command(struct command_invocation *cmd,
}
command_print(cmd,
- "L2 unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways",
+ "L2 unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways",
l2x_cache->base, l2x_cache->way);
return ERROR_OK;
diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c
index eec14a36f..b4234b24e 100644
--- a/src/target/armv7a_mmu.c
+++ b/src/target/armv7a_mmu.c
@@ -266,7 +266,7 @@ COMMAND_HANDLER(armv7a_mmu_dump_table)
uint32_t first_lvl_descriptor = target_buffer_get_u32(target,
(uint8_t *)&first_lvl_ptbl[pt_idx]);
- LOG_DEBUG("L1 desc[%8.8"PRIx32"]: %8.8"PRIx32, pt_idx << 20, first_lvl_descriptor);
+ LOG_DEBUG("L1 desc[%8.8x]: %8.8"PRIx32, pt_idx << 20, first_lvl_descriptor);
/* skip empty entries in the first level table */
if ((first_lvl_descriptor & 3) == 0) {
diff --git a/src/target/armv8.c b/src/target/armv8.c
index e47f6599a..ab60cd371 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -1054,7 +1054,7 @@ COMMAND_HANDLER(armv8_handle_exception_catch_command)
nsec = n->name;
if (sec == NULL || nsec == NULL) {
- LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02x", edeccr & 0xff);
+ LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02" PRIx32, edeccr & 0xff);
return ERROR_FAIL;
}
diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c
index 41c85c9ab..86e4a5961 100644
--- a/src/target/armv8_cache.c
+++ b/src/target/armv8_cache.c
@@ -203,10 +203,10 @@ static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd,
if (arch->ctype & 1) {
command_print(cmd,
- "L%d I-Cache: linelen %" PRIi32
- ", associativity %" PRIi32
- ", nsets %" PRIi32
- ", cachesize %" PRId32 " KBytes",
+ "L%d I-Cache: linelen %" PRIu32
+ ", associativity %" PRIu32
+ ", nsets %" PRIu32
+ ", cachesize %" PRIu32 " KBytes",
cl+1,
arch->i_size.linelen,
arch->i_size.associativity,
@@ -216,10 +216,10 @@ static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd,
if (arch->ctype >= 2) {
command_print(cmd,
- "L%d D-Cache: linelen %" PRIi32
- ", associativity %" PRIi32
- ", nsets %" PRIi32
- ", cachesize %" PRId32 " KBytes",
+ "L%d D-Cache: linelen %" PRIu32
+ ", associativity %" PRIu32
+ ", nsets %" PRIu32
+ ", cachesize %" PRIu32 " KBytes",
cl+1,
arch->d_u_size.linelen,
arch->d_u_size.associativity,
@@ -336,7 +336,7 @@ int armv8_identify_cache(struct armv8_common *armv8)
cache->iminline = 4UL << (ctr & 0xf);
cache->dminline = 4UL << ((ctr & 0xf0000) >> 16);
- LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRId32 " ctr.dminline %" PRId32,
+ LOG_DEBUG("ctr %" PRIx32 " ctr.iminline %" PRIu32 " ctr.dminline %" PRIu32,
ctr, cache->iminline, cache->dminline);
/* retrieve CLIDR */
@@ -373,13 +373,13 @@ int armv8_identify_cache(struct armv8_common *armv8)
goto done;
cache->arch[cl].d_u_size = decode_cache_reg(cache_reg);
- LOG_DEBUG("data/unified cache index %d << %d, way %d << %d",
+ LOG_DEBUG("data/unified cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
cache->arch[cl].d_u_size.index,
cache->arch[cl].d_u_size.index_shift,
cache->arch[cl].d_u_size.way,
cache->arch[cl].d_u_size.way_shift);
- LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways",
+ LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
cache->arch[cl].d_u_size.linelen,
cache->arch[cl].d_u_size.cachesize,
cache->arch[cl].d_u_size.associativity);
@@ -393,13 +393,13 @@ int armv8_identify_cache(struct armv8_common *armv8)
goto done;
cache->arch[cl].i_size = decode_cache_reg(cache_reg);
- LOG_DEBUG("instruction cache index %d << %d, way %d << %d",
+ LOG_DEBUG("instruction cache index %" PRIu32 " << %" PRIu32 ", way %" PRIu32 " << %" PRIu32,
cache->arch[cl].i_size.index,
cache->arch[cl].i_size.index_shift,
cache->arch[cl].i_size.way,
cache->arch[cl].i_size.way_shift);
- LOG_DEBUG("cacheline %d bytes %d KBytes asso %d ways",
+ LOG_DEBUG("cacheline %" PRIu32 " bytes %" PRIu32 " KBytes asso %" PRIu32 " ways",
cache->arch[cl].i_size.linelen,
cache->arch[cl].i_size.cachesize,
cache->arch[cl].i_size.associativity);
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 90cf4e059..1e88a445f 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -253,11 +253,11 @@ static int dpmv8_exec_opcode(struct arm_dpm *dpm,
/* update dscr and el after each command execution */
dpm->dscr = dscr;
if (dpm->last_el != ((dscr >> 8) & 3))
- LOG_DEBUG("EL %i -> %i", dpm->last_el, (dscr >> 8) & 3);
+ LOG_DEBUG("EL %i -> %" PRIu32, dpm->last_el, (dscr >> 8) & 3);
dpm->last_el = (dscr >> 8) & 3;
if (dscr & DSCR_ERR) {
- LOG_ERROR("Opcode 0x%08"PRIx32", DSCR.ERR=1, DSCR.EL=%i", opcode, dpm->last_el);
+ LOG_ERROR("Opcode 0x%08" PRIx32 ", DSCR.ERR=1, DSCR.EL=%i", opcode, dpm->last_el);
armv8_dpm_handle_exception(dpm, true);
retval = ERROR_FAIL;
}
@@ -560,7 +560,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode)
LOG_DEBUG("restoring mode, cpsr = 0x%08"PRIx32, cpsr);
} else {
- LOG_DEBUG("setting mode 0x%"PRIx32, mode);
+ LOG_DEBUG("setting mode 0x%x", mode);
cpsr = mode;
}
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index aeeb11626..bd8e49fd9 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -2498,7 +2498,7 @@ static int cortex_a_read_phys_memory(struct target *target,
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;
- LOG_DEBUG("Reading memory at real address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
+ LOG_DEBUG("Reading memory at real address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32,
address, size, count);
/* read memory through the CPU */
@@ -2515,7 +2515,7 @@ static int cortex_a_read_memory(struct target *target, target_addr_t address,
int retval;
/* cortex_a handles unaligned memory access */
- LOG_DEBUG("Reading memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
+ LOG_DEBUG("Reading memory at address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32,
address, size, count);
cortex_a_prep_memaccess(target, 0);
@@ -2534,7 +2534,7 @@ static int cortex_a_write_phys_memory(struct target *target,
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;
- LOG_DEBUG("Writing memory to real address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
+ LOG_DEBUG("Writing memory to real address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32,
address, size, count);
/* write memory through the CPU */
@@ -2551,7 +2551,7 @@ static int cortex_a_write_memory(struct target *target, target_addr_t address,
int retval;
/* cortex_a handles unaligned memory access */
- LOG_DEBUG("Writing memory at address " TARGET_ADDR_FMT "; size %" PRId32 "; count %" PRId32,
+ LOG_DEBUG("Writing memory at address " TARGET_ADDR_FMT "; size %" PRIu32 "; count %" PRIu32,
address, size, count);
/* memory writes bypass the caches, must flush before writing */
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 3d4c61ae6..b825429e0 100644
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -937,7 +937,7 @@ static int dsp563xx_examine(struct target *target)
if (((chip>>5)&0x1f) == 0)
chip += 300;
- LOG_INFO("DSP56%03" PRId32 " device found", chip);
+ LOG_INFO("DSP56%03" PRIu32 " device found", chip);
/* Clear all breakpoints */
dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OBCR, 0);
diff --git a/src/target/esirisc_jtag.c b/src/target/esirisc_jtag.c
index 700ae3a60..7fd35e5fd 100644
--- a/src/target/esirisc_jtag.c
+++ b/src/target/esirisc_jtag.c
@@ -181,8 +181,8 @@ static int esirisc_jtag_check_status(struct esirisc_jtag *jtag_info)
{
uint8_t eid = esirisc_jtag_get_eid(jtag_info);
if (eid != EID_NONE) {
- LOG_ERROR("esirisc_jtag: bad status: 0x%02" PRIx32 " (DA: %" PRId32 ", "
- "S: %" PRId32 ", EID: 0x%02" PRIx32 ")",
+ LOG_ERROR("esirisc_jtag: bad status: 0x%02" PRIx8 " (DA: %" PRId32 ", "
+ "S: %" PRId32 ", EID: 0x%02" PRIx8 ")",
jtag_info->status, esirisc_jtag_is_debug_active(jtag_info),
esirisc_jtag_is_stopped(jtag_info), eid);
return ERROR_FAIL;
@@ -201,13 +201,13 @@ static int esirisc_jtag_send_and_recv(struct esirisc_jtag *jtag_info, uint8_t co
retval = esirisc_jtag_send(jtag_info, command, num_out_fields, out_fields);
if (retval != ERROR_OK) {
- LOG_ERROR("esirisc_jtag: send failed (command: 0x%02" PRIx32 ")", command);
+ LOG_ERROR("esirisc_jtag: send failed (command: 0x%02" PRIx8 ")", command);
return ERROR_FAIL;
}
retval = esirisc_jtag_recv(jtag_info, num_in_fields, in_fields);
if (retval != ERROR_OK) {
- LOG_ERROR("esirisc_jtag: recv failed (command: 0x%02" PRIx32 ")", command);
+ LOG_ERROR("esirisc_jtag: recv failed (command: 0x%02" PRIx8 ")", command);
return ERROR_FAIL;
}
@@ -409,7 +409,7 @@ int esirisc_jtag_read_reg(struct esirisc_jtag *jtag_info, uint8_t reg, uint32_t
return retval;
*data = le_to_h_u32(d);
- LOG_DEBUG("register: 0x%" PRIx32 ", data: 0x%" PRIx32, reg, *data);
+ LOG_DEBUG("register: 0x%" PRIx8 ", data: 0x%" PRIx32, reg, *data);
return ERROR_OK;
}
@@ -419,7 +419,7 @@ int esirisc_jtag_write_reg(struct esirisc_jtag *jtag_info, uint8_t reg, uint32_t
struct scan_field out_fields[2];
uint8_t d[4];
- LOG_DEBUG("register: 0x%" PRIx32 ", data: 0x%" PRIx32, reg, data);
+ LOG_DEBUG("register: 0x%" PRIx8 ", data: 0x%" PRIx32, reg, data);
out_fields[0].num_bits = 8;
out_fields[0].out_value = ®
@@ -457,7 +457,7 @@ int esirisc_jtag_read_csr(struct esirisc_jtag *jtag_info, uint8_t bank, uint8_t
return retval;
*data = le_to_h_u32(d);
- LOG_DEBUG("bank: 0x%" PRIx32 ", csr: 0x%" PRIx32 ", data: 0x%" PRIx32, bank, csr, *data);
+ LOG_DEBUG("bank: 0x%" PRIx8 ", csr: 0x%" PRIx8 ", data: 0x%" PRIx32, bank, csr, *data);
return ERROR_OK;
}
@@ -467,7 +467,7 @@ int esirisc_jtag_write_csr(struct esirisc_jtag *jtag_info, uint8_t bank, uint8_t
struct scan_field out_fields[2];
uint8_t c[2], d[4];
- LOG_DEBUG("bank: 0x%" PRIx32 ", csr: 0x%" PRIx32 ", data: 0x%" PRIx32, bank, csr, data);
+ LOG_DEBUG("bank: 0x%" PRIx8 ", csr: 0x%" PRIx8 ", data: 0x%" PRIx32, bank, csr, data);
out_fields[0].num_bits = 16;
out_fields[0].out_value = c;
diff --git a/src/target/esirisc_trace.c b/src/target/esirisc_trace.c
index 6a7d5a29d..28d7536af 100644
--- a/src/target/esirisc_trace.c
+++ b/src/target/esirisc_trace.c
@@ -461,7 +461,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
if (retval != ERROR_OK)
goto fail;
- command_print(cmd, "repeats %" PRId32 " %s", count,
+ command_print(cmd, "repeats %" PRIu32 " %s", count,
(count == 1) ? "time" : "times");
break;
}
@@ -470,13 +470,13 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
return ERROR_OK;
default:
- command_print(cmd, "invalid extended trace ID: %" PRId32, ext_id);
+ command_print(cmd, "invalid extended trace ID: %" PRIu32, ext_id);
return ERROR_FAIL;
}
break;
}
default:
- command_print(cmd, "invalid trace ID: %" PRId32, id);
+ command_print(cmd, "invalid trace ID: %" PRIu32, id);
return ERROR_FAIL;
}
}
@@ -729,7 +729,7 @@ COMMAND_HANDLER(handle_esirisc_trace_info_command)
command_print(CMD, "trigger delay: %s",
esirisc_trace_delay_strings[trace_info->delay]);
- command_print(CMD, "trigger delay cycles: %i", trace_info->delay_cycles);
+ command_print(CMD, "trigger delay cycles: %" PRIu32, trace_info->delay_cycles);
return ERROR_OK;
}
diff --git a/src/target/ls1_sap.c b/src/target/ls1_sap.c
index 330042f00..5e1218837 100644
--- a/src/target/ls1_sap.c
+++ b/src/target/ls1_sap.c
@@ -182,7 +182,7 @@ static int ls1_sap_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
LOG_DEBUG("Reading memory at physical address 0x%" TARGET_PRIxADDR
- "; size %" PRId32 "; count %" PRId32, address, size, count);
+ "; size %" PRIu32 "; count %" PRIu32, address, size, count);
if (count == 0 || buffer == NULL)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -204,7 +204,7 @@ static int ls1_sap_write_memory(struct target *target, target_addr_t address,
const uint8_t *buffer)
{
LOG_DEBUG("Writing memory at physical address 0x%" TARGET_PRIxADDR
- "; size %" PRId32 "; count %" PRId32, address, size, count);
+ "; size %" PRIu32 "; count %" PRIu32, address, size, count);
if (count == 0 || buffer == NULL)
diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c
index ade48b6d7..7ed41c63c 100644
--- a/src/target/mem_ap.c
+++ b/src/target/mem_ap.c
@@ -150,7 +150,7 @@ static int mem_ap_read_memory(struct target *target, target_addr_t address,
struct mem_ap *mem_ap = target->arch_info;
LOG_DEBUG("Reading memory at physical address " TARGET_ADDR_FMT
- "; size %" PRId32 "; count %" PRId32, address, size, count);
+ "; size %" PRIu32 "; count %" PRIu32, address, size, count);
if (count == 0 || buffer == NULL)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -165,7 +165,7 @@ static int mem_ap_write_memory(struct target *target, target_addr_t address,
struct mem_ap *mem_ap = target->arch_info;
LOG_DEBUG("Writing memory at physical address " TARGET_ADDR_FMT
- "; size %" PRId32 "; count %" PRId32, address, size, count);
+ "; size %" PRIu32 "; count %" PRIu32, address, size, count);
if (count == 0 || buffer == NULL)
return ERROR_COMMAND_SYNTAX_ERROR;
diff --git a/src/target/mips32.c b/src/target/mips32.c
index ef7f2ad26..e1f2b2832 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -725,7 +725,7 @@ int mips32_read_config_regs(struct target *target)
else
return ERROR_OK; /* already successfully read */
- LOG_DEBUG("read %"PRId32" config registers", ejtag_info->config_regs);
+ LOG_DEBUG("read %"PRIu32" config registers", ejtag_info->config_regs);
if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
mips32->isa_imp = MIPS32_MIPS16;
@@ -950,11 +950,11 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access reg %" PRIi32,
+ "couldn't access reg %" PRIu32,
cp0_reg);
return ERROR_OK;
}
- command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+ command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
} else if (CMD_ARGC == 3) {
@@ -963,11 +963,11 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
+ "couldn't access cp0 reg %" PRIu32 ", select %" PRIu32,
cp0_reg, cp0_sel);
return ERROR_OK;
}
- command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+ command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
}
}
diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c
index b19fd044e..3080046f3 100644
--- a/src/target/mips64_pracc.c
+++ b/src/target/mips64_pracc.c
@@ -221,7 +221,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
unsigned i;
for (i = 0; i < code_len; i++)
- LOG_DEBUG("%08x", code[i]);
+ LOG_DEBUG("%08" PRIx32, code[i]);
ctx.local_iparam = param_in;
ctx.local_oparam = param_out;
@@ -247,7 +247,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
mips_ejtag_drscan_32(ejtag_info, &address32);
- LOG_DEBUG("-> %08x", address32);
+ LOG_DEBUG("-> %08" PRIx32, address32);
address = 0xffffffffff200000ull | address32;
int psz = (ejtag_ctrl >> 29) & 3;
@@ -1349,7 +1349,7 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
LOG_DEBUG("%s using " TARGET_ADDR_FMT " for write handler", __func__,
source->address);
- LOG_DEBUG("daddiu: %08x", handler_code[11]);
+ LOG_DEBUG("daddiu: %08" PRIx32, handler_code[11]);
jmp_code[0] |= UPPER16(source->address);
jmp_code[1] |= LOWER16(source->address);
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index d1d094520..85eea932d 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -1309,11 +1309,11 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access reg %" PRIi32,
+ "couldn't access reg %" PRIu32,
cp0_reg);
return ERROR_OK;
}
- command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+ command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
} else if (CMD_ARGC == 3) {
@@ -1322,11 +1322,11 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD,
- "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
+ "couldn't access cp0 reg %" PRIu32 ", select %" PRIu32,
cp0_reg, cp0_sel);
return ERROR_OK;
}
- command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+ command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
}
}
diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c
index 3a592f7f3..f941af517 100644
--- a/src/target/mips_mips64.c
+++ b/src/target/mips_mips64.c
@@ -247,7 +247,7 @@ static int mips_mips64_set_hwbp(struct target *target, struct breakpoint *bp)
bp_num++;
if (bp_num >= mips64->num_inst_bpoints) {
- LOG_DEBUG("ERROR Can not find free FP Comparator(bpid: %d)",
+ LOG_DEBUG("ERROR Can not find free FP Comparator(bpid: %" PRIu32 ")",
bp->unique_id);
LOG_WARNING("ERROR Can not find free FP Comparator");
exit(-1);
@@ -274,7 +274,7 @@ static int mips_mips64_set_hwbp(struct target *target, struct breakpoint *bp)
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx64 "", bp->unique_id,
+ LOG_DEBUG("bpid: %" PRIu32 ", bp_num %i bp_value 0x%" PRIx64, bp->unique_id,
bp_num, c->bp_value);
return ERROR_OK;
@@ -354,7 +354,7 @@ static int mips_mips64_set_breakpoint(struct target *target,
if (bp->type == BKPT_HARD) {
retval = mips_mips64_set_hwbp(target, bp);
} else {
- LOG_DEBUG("bpid: %d", bp->unique_id);
+ LOG_DEBUG("bpid: %" PRIu32, bp->unique_id);
switch (bp->length) {
case MIPS64_SDBBP_SIZE:
@@ -511,12 +511,12 @@ static int mips_mips64_unset_hwbp(struct target *target, struct breakpoint *bp)
bp_num = bp->set - 1;
if ((bp_num < 0) || (bp_num >= mips64->num_inst_bpoints)) {
- LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %d)",
+ LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %" PRIu32 ")",
bp->unique_id);
return ERROR_OK;
}
- LOG_DEBUG("bpid: %d - releasing hw: %d", bp->unique_id, bp_num);
+ LOG_DEBUG("bpid: %" PRIu32 " - releasing hw: %d", bp->unique_id, bp_num);
comparator_list[bp_num].used = false;
comparator_list[bp_num].bp_value = 0;
@@ -576,7 +576,7 @@ static int mips_mips64_unset_breakpoint(struct target *target,
if (bp->type == BKPT_HARD) {
retval = mips_mips64_unset_hwbp(target, bp);
} else {
- LOG_DEBUG("bpid: %d", bp->unique_id);
+ LOG_DEBUG("bpid: %" PRIu32, bp->unique_id);
switch (bp->length) {
case MIPS64_SDBBP_SIZE:
diff --git a/src/target/nds32_reg.c b/src/target/nds32_reg.c
index 7cefcb1a2..034a07584 100644
--- a/src/target/nds32_reg.c
+++ b/src/target/nds32_reg.c
@@ -367,7 +367,7 @@ bool nds32_reg_exception(uint32_t number, uint32_t value)
field_value = (value >> ex_reg_value->ex_value_bit_pos) &
ex_reg_value->ex_value_mask;
if (field_value == ex_reg_value->ex_value) {
- LOG_WARNING("It will generate exceptions as setting %" PRId32 " to %s",
+ LOG_WARNING("It will generate exceptions as setting %" PRIu32 " to %s",
value, nds32_regs[number].simple_mnemonic);
return true;
}
diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c
index aa7b0d332..71491119b 100644
--- a/src/target/openrisc/or1k.c
+++ b/src/target/openrisc/or1k.c
@@ -923,7 +923,7 @@ static int or1k_add_breakpoint(struct target *target,
struct or1k_du *du_core = or1k_to_du(or1k);
uint8_t data;
- LOG_DEBUG("Adding breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRId32,
+ LOG_DEBUG("Adding breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRIu32,
breakpoint->address, breakpoint->length, breakpoint->type,
breakpoint->set, breakpoint->unique_id);
@@ -982,7 +982,7 @@ static int or1k_remove_breakpoint(struct target *target,
struct or1k_common *or1k = target_to_or1k(target);
struct or1k_du *du_core = or1k_to_du(or1k);
- LOG_DEBUG("Removing breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRId32,
+ LOG_DEBUG("Removing breakpoint: addr 0x%08" TARGET_PRIxADDR ", len %d, type %d, set: %d, id: %" PRIu32,
breakpoint->address, breakpoint->length, breakpoint->type,
breakpoint->set, breakpoint->unique_id);
diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c
index d5e740d5d..afc773f56 100644
--- a/src/target/openrisc/or1k_du_adv.c
+++ b/src/target/openrisc/or1k_du_adv.c
@@ -869,7 +869,7 @@ static int or1k_adv_cpu_reset(struct or1k_jtag *jtag_info, int action)
static int or1k_adv_jtag_read_memory(struct or1k_jtag *jtag_info,
uint32_t addr, uint32_t size, int count, uint8_t *buffer)
{
- LOG_DEBUG("Reading WB%" PRId32 " at 0x%08" PRIx32, size * 8, addr);
+ LOG_DEBUG("Reading WB%" PRIu32 " at 0x%08" PRIx32, size * 8, addr);
int retval;
if (!jtag_info->or1k_jtag_inited) {
@@ -924,7 +924,7 @@ static int or1k_adv_jtag_read_memory(struct or1k_jtag *jtag_info,
static int or1k_adv_jtag_write_memory(struct or1k_jtag *jtag_info,
uint32_t addr, uint32_t size, int count, const uint8_t *buffer)
{
- LOG_DEBUG("Writing WB%" PRId32 " at 0x%08" PRIx32, size * 8, addr);
+ LOG_DEBUG("Writing WB%" PRIu32 " at 0x%08" PRIx32, size * 8, addr);
int retval;
if (!jtag_info->or1k_jtag_inited) {
diff --git a/src/target/openrisc/or1k_tap_vjtag.c b/src/target/openrisc/or1k_tap_vjtag.c
index 3372509c9..28366cf53 100644
--- a/src/target/openrisc/or1k_tap_vjtag.c
+++ b/src/target/openrisc/or1k_tap_vjtag.c
@@ -218,7 +218,7 @@ static int or1k_tap_vjtag_init(struct or1k_jtag *jtag_info)
LOG_DEBUG("m_width = %d", m_width);
LOG_DEBUG("manufacturer_id = 0x%02" PRIx32, MANUF(hub_info));
LOG_DEBUG("nb_of_node = %d", nb_nodes);
- LOG_DEBUG("version = %" PRId32, VER(hub_info));
+ LOG_DEBUG("version = %" PRIu32, VER(hub_info));
LOG_DEBUG("VIR length = %d", guess_addr_width(nb_nodes) + m_width);
/* Because the number of SLD nodes is now known, the Nodes on the hub can be
@@ -257,11 +257,11 @@ static int or1k_tap_vjtag_init(struct or1k_jtag *jtag_info)
LOG_DEBUG("Node info register");
LOG_DEBUG("--------------------");
- LOG_DEBUG("instance_id = %" PRId32, ID(node_info));
+ LOG_DEBUG("instance_id = %" PRIu32, ID(node_info));
LOG_DEBUG("manufacturer_id = 0x%02" PRIx32, MANUF(node_info));
- LOG_DEBUG("node_id = %" PRId32 " (%s)", ID(node_info),
+ LOG_DEBUG("node_id = %" PRIu32 " (%s)", ID(node_info),
id_to_string(ID(node_info)));
- LOG_DEBUG("version = %" PRId32, VER(node_info));
+ LOG_DEBUG("version = %" PRIu32, VER(node_info));
if (ID(node_info) == VJTAG_NODE_ID)
vjtag_node_address = node_index + 1;
diff --git a/src/target/stm8.c b/src/target/stm8.c
index 4b93dd1fe..78bf6a27a 100644
--- a/src/target/stm8.c
+++ b/src/target/stm8.c
@@ -1308,7 +1308,7 @@ static int stm8_arch_state(struct target *target)
static int stm8_step(struct target *target, int current,
target_addr_t address, int handle_breakpoints)
{
- LOG_DEBUG("%" PRIx32 " " TARGET_ADDR_FMT " %" PRIx32,
+ LOG_DEBUG("%x " TARGET_ADDR_FMT " %x",
current, address, handle_breakpoints);
/* get pointers to arch-specific information */
@@ -1969,7 +1969,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi)
return e;
stm8->blocksize = w;
- LOG_DEBUG("blocksize=%8.8x", stm8->blocksize);
+ LOG_DEBUG("blocksize=%8.8" PRIx32, stm8->blocksize);
return JIM_OK;
}
if (!strcmp(arg, "-flashstart")) {
@@ -1988,7 +1988,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi)
return e;
stm8->flashstart = w;
- LOG_DEBUG("flashstart=%8.8x", stm8->flashstart);
+ LOG_DEBUG("flashstart=%8.8" PRIx32, stm8->flashstart);
return JIM_OK;
}
if (!strcmp(arg, "-flashend")) {
@@ -2007,7 +2007,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi)
return e;
stm8->flashend = w;
- LOG_DEBUG("flashend=%8.8x", stm8->flashend);
+ LOG_DEBUG("flashend=%8.8" PRIx32, stm8->flashend);
return JIM_OK;
}
if (!strcmp(arg, "-eepromstart")) {
@@ -2026,7 +2026,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi)
return e;
stm8->eepromstart = w;
- LOG_DEBUG("eepromstart=%8.8x", stm8->eepromstart);
+ LOG_DEBUG("eepromstart=%8.8" PRIx32, stm8->eepromstart);
return JIM_OK;
}
if (!strcmp(arg, "-eepromend")) {
@@ -2045,7 +2045,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi)
return e;
stm8->eepromend = w;
- LOG_DEBUG("eepromend=%8.8x", stm8->eepromend);
+ LOG_DEBUG("eepromend=%8.8" PRIx32, stm8->eepromend);
return JIM_OK;
}
if (!strcmp(arg, "-optionstart")) {
@@ -2064,7 +2064,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi)
return e;
stm8->optionstart = w;
- LOG_DEBUG("optionstart=%8.8x", stm8->optionstart);
+ LOG_DEBUG("optionstart=%8.8" PRIx32, stm8->optionstart);
return JIM_OK;
}
if (!strcmp(arg, "-optionend")) {
@@ -2083,7 +2083,7 @@ int stm8_jim_configure(struct target *target, Jim_GetOptInfo *goi)
return e;
stm8->optionend = w;
- LOG_DEBUG("optionend=%8.8x", stm8->optionend);
+ LOG_DEBUG("optionend=%8.8" PRIx32, stm8->optionend);
return JIM_OK;
}
if (!strcmp(arg, "-enable_step_irq")) {
diff --git a/src/target/target.c b/src/target/target.c
index affee03b9..a918b3acf 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -2201,7 +2201,7 @@ static int target_profiling_default(struct target *target, uint32_t *samples,
*/
int target_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer)
{
- LOG_DEBUG("writing buffer of %" PRIi32 " byte at " TARGET_ADDR_FMT,
+ LOG_DEBUG("writing buffer of %" PRIu32 " byte at " TARGET_ADDR_FMT,
size, address);
if (!target_was_examined(target)) {
@@ -2263,7 +2263,7 @@ static int target_write_buffer_default(struct target *target,
*/
int target_read_buffer(struct target *target, target_addr_t address, uint32_t size, uint8_t *buffer)
{
- LOG_DEBUG("reading buffer of %" PRIi32 " byte at " TARGET_ADDR_FMT,
+ LOG_DEBUG("reading buffer of %" PRIu32 " byte at " TARGET_ADDR_FMT,
size, address);
if (!target_was_examined(target)) {
@@ -2333,7 +2333,7 @@ int target_checksum_memory(struct target *target, target_addr_t address, uint32_
if (retval != ERROR_OK) {
buffer = malloc(size);
if (buffer == NULL) {
- LOG_ERROR("error allocating buffer for section (%" PRId32 " bytes)", size);
+ LOG_ERROR("error allocating buffer for section (%" PRIu32 " bytes)", size);
return ERROR_COMMAND_SYNTAX_ERROR;
}
retval = target_read_buffer(target, address, size, buffer);
@@ -4301,7 +4301,7 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc,
} else {
char buf[100];
Jim_SetResult(interp, Jim_NewEmptyStringObj(interp));
- sprintf(buf, "mem2array address: 0x%08" PRIx32 " is not aligned for %" PRId32 " byte reads",
+ sprintf(buf, "mem2array address: 0x%08" PRIx32 " is not aligned for %" PRIu32 " byte reads",
addr,
width);
Jim_AppendStrings(interp, Jim_GetResult(interp), buf, NULL);
@@ -4333,7 +4333,7 @@ static int target_mem2array(Jim_Interp *interp, struct target *target, int argc,
retval = target_read_memory(target, addr, width, count, buffer);
if (retval != ERROR_OK) {
/* BOO !*/
- LOG_ERROR("mem2array: Read @ 0x%08" PRIx32 ", w=%" PRId32 ", cnt=%" PRId32 ", failed",
+ LOG_ERROR("mem2array: Read @ 0x%08" PRIx32 ", w=%" PRIu32 ", cnt=%" PRIu32 ", failed",
addr,
width,
count);
@@ -4507,7 +4507,7 @@ static int target_array2mem(Jim_Interp *interp, struct target *target,
} else {
char buf[100];
Jim_SetResult(interp, Jim_NewEmptyStringObj(interp));
- sprintf(buf, "array2mem address: 0x%08" PRIx32 " is not aligned for %" PRId32 " byte reads",
+ sprintf(buf, "array2mem address: 0x%08" PRIx32 " is not aligned for %" PRIu32 " byte reads",
addr,
width);
Jim_AppendStrings(interp, Jim_GetResult(interp), buf, NULL);
@@ -4556,7 +4556,7 @@ static int target_array2mem(Jim_Interp *interp, struct target *target,
retval = target_write_memory(target, addr, width, count, buffer);
if (retval != ERROR_OK) {
/* BOO !*/
- LOG_ERROR("array2mem: Write @ 0x%08" PRIx32 ", w=%" PRId32 ", cnt=%" PRId32 ", failed",
+ LOG_ERROR("array2mem: Write @ 0x%08" PRIx32 ", w=%" PRIu32 ", cnt=%" PRIu32 ", failed",
addr,
width,
count);
commit e66593f8242d49dd05f6b9c4a5121fa466a158aa
Author: Antonio Borneo <bor...@gm...>
Date: Tue Aug 18 18:56:03 2020 +0200
flash: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.
Change the type of variable retval in 'nor/ambiqmicro.c' to match
both the value to carry and the returned type of the function.
Fix the prototype mismatch of function lpc2900_address2sector()
between the header and the C file.
Change-Id: I68ffba9bd83eec8132f83bff3af993861fd09d84
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5816
Tested-by: jenkins
diff --git a/src/flash/nand/mx3.c b/src/flash/nand/mx3.c
index abeaf159c..b9f5ff1b9 100644
--- a/src/flash/nand/mx3.c
+++ b/src/flash/nand/mx3.c
@@ -40,7 +40,7 @@ get_next_halfword_from_sram_buffer() not tested
static const char target_not_halted_err_msg[] =
"target must be halted to use mx3 NAND flash controller";
static const char data_block_size_err_msg[] =
- "minimal granularity is one half-word, %" PRId32 " is incorrect";
+ "minimal granularity is one half-word, %" PRIu32 " is incorrect";
static const char sram_buffer_bounds_err_msg[] =
"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
static const char get_status_register_err_msg[] = "can't get NAND status";
diff --git a/src/flash/nand/mxc.c b/src/flash/nand/mxc.c
index bc2ae9324..2c5de0394 100644
--- a/src/flash/nand/mxc.c
+++ b/src/flash/nand/mxc.c
@@ -65,7 +65,7 @@
static const char target_not_halted_err_msg[] =
"target must be halted to use mxc NAND flash controller";
static const char data_block_size_err_msg[] =
- "minimal granularity is one half-word, %" PRId32 " is incorrect";
+ "minimal granularity is one half-word, %" PRIu32 " is incorrect";
static const char sram_buffer_bounds_err_msg[] =
"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
static const char get_status_register_err_msg[] = "can't get NAND status";
diff --git a/src/flash/nand/tcl.c b/src/flash/nand/tcl.c
index 5480e0d61..ca8b9dad4 100644
--- a/src/flash/nand/tcl.c
+++ b/src/flash/nand/tcl.c
@@ -124,7 +124,7 @@ COMMAND_HANDLER(handle_nand_info_command)
bad_state = " (block condition unknown)";
command_print(CMD,
- "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
+ "\t#%i: 0x%8.8" PRIx32 " (%" PRIu32 "kB) %s%s",
j,
p->blocks[j].offset,
p->blocks[j].size / 1024,
diff --git a/src/flash/nor/aducm360.c b/src/flash/nor/aducm360.c
index 5e0a666ea..4e816fd61 100644
--- a/src/flash/nor/aducm360.c
+++ b/src/flash/nor/aducm360.c
@@ -285,7 +285,7 @@ static int aducm360_write_block_sync(
res = buf_get_u32(reg_params[4].value, 0, 32);
if (res) {
- LOG_ERROR("aducm360 fast sync algorithm reports an error (%02X)", res);
+ LOG_ERROR("aducm360 fast sync algorithm reports an error (%02" PRIX32 ")", res);
retval = ERROR_FAIL;
break;
}
@@ -401,7 +401,7 @@ static int aducm360_write_block_async(
} else {
res = buf_get_u32(reg_params[4].value, 0, 32); /*RESULT*/
if (res) {
- LOG_ERROR("aducm360 fast async algorithm reports an error (%02X)", res);
+ LOG_ERROR("aducm360 fast async algorithm reports an error (%02" PRIX32 ")", res);
retval = ERROR_FAIL;
}
}
diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c
index 28dc42d82..1c4dce87d 100644
--- a/src/flash/nor/ambiqmicro.c
+++ b/src/flash/nor/ambiqmicro.c
@@ -212,7 +212,7 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank)
/* Set PartNum to default device */
PartNum = 0;
}
- LOG_DEBUG("Part number: 0x%x", PartNum);
+ LOG_DEBUG("Part number: 0x%" PRIx32, PartNum);
/*
* Determine device class.
@@ -260,7 +260,7 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank)
ambiqmicro_info->target_name =
ambiqmicroParts[0].partname;
- LOG_DEBUG("num_pages: %d, pagesize: %d, flash: %d, sram: %d",
+ LOG_DEBUG("num_pages: %" PRIu32 ", pagesize: %" PRIu32 ", flash: %" PRIu32 ", sram: %" PRIu32,
ambiqmicro_info->num_pages,
ambiqmicro_info->pagesize,
ambiqmicro_info->flshsiz,
@@ -304,7 +304,7 @@ static int check_flash_status(struct target *target, uint32_t address)
}
/* target flash failed, unknown cause. */
if (retflash != 0) {
- LOG_ERROR("Flash not happy: status(0x%x)", retflash);
+ LOG_ERROR("Flash not happy: status(0x%" PRIx32 ")", retflash);
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_OK;
@@ -432,7 +432,7 @@ static int ambiqmicro_erase(struct flash_bank *bank, unsigned int first,
{
struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
struct target *target = bank->target;
- uint32_t retval = ERROR_OK;
+ int retval;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
@@ -615,7 +615,7 @@ static int ambiqmicro_write_block(struct flash_bank *bank,
break;
}
- LOG_DEBUG("address = 0x%08x", address);
+ LOG_DEBUG("address = 0x%08" PRIx32, address);
retval = ambiqmicro_exec_command(target, FLASH_PROGRAM_MAIN_FROM_SRAM, 0x1000000c);
CHECK_STATUS(retval, "error executing ambiqmicro flash write algorithm");
@@ -641,7 +641,7 @@ static int ambiqmicro_write_block(struct flash_bank *bank,
static int ambiqmicro_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
- uint32_t retval;
+ int retval;
/* try using a block write */
retval = ambiqmicro_write_block(bank, buffer, offset, count);
@@ -654,7 +654,7 @@ static int ambiqmicro_write(struct flash_bank *bank, const uint8_t *buffer,
static int ambiqmicro_probe(struct flash_bank *bank)
{
struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
- uint32_t retval;
+ int retval;
/* If this is a ambiqmicro chip, it has flash; probe() is just
* to figure out how much is present. Only do it once.
@@ -698,7 +698,7 @@ static int ambiqmicro_otp_program(struct flash_bank *bank,
{
struct target *target = NULL;
struct ambiqmicro_flash_bank *ambiqmicro_info = NULL;
- uint32_t retval = ERROR_OK;
+ int retval;
ambiqmicro_info = bank->driver_priv;
target = bank->target;
@@ -757,7 +757,7 @@ static int ambiqmicro_otp_program(struct flash_bank *bank,
/*
* Program OTP.
*/
- LOG_INFO("Programming OTP offset 0x%08x", offset);
+ LOG_INFO("Programming OTP offset 0x%08" PRIx32, offset);
/*
* passed pc, addr = ROM function, handle breakpoints, not debugging.
@@ -778,7 +778,7 @@ COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command)
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
- uint32_t retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
+ int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
return retval;
@@ -798,7 +798,7 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command)
{
struct flash_bank *bank;
uint32_t first, last;
- uint32_t retval;
+ int retval;
if (CMD_ARGC < 3)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -826,7 +826,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command)
{
struct flash_bank *bank;
uint32_t offset, count;
- uint32_t retval;
+ int retval;
if (CMD_ARGC < 3)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -834,7 +834,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], offset);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count);
- command_print(CMD, "offset=0x%08x count=%d", offset, count);
+ command_print(CMD, "offset=0x%08" PRIx32 " count=%" PRIu32, offset, count);
CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 3f9ea9bfa..1c6106425 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -1896,7 +1896,7 @@ static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip,
}
/* show the basics */
- LOG_USER_N("\t%*s: %*" PRId32 " [0x%0*" PRIx32 "] ",
+ LOG_USER_N("\t%*s: %*" PRIu32 " [0x%0*" PRIx32 "] ",
REG_NAME_WIDTH, regname,
dwidth, v,
hwidth, v);
@@ -2549,7 +2549,7 @@ static int sam4_GetDetails(struct sam4_bank_private *pPrivate)
sam4_explain_chipid_cidr(pPrivate->pChip);
return ERROR_FAIL;
} else {
- LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08x", pDetails->name, pDetails->chipid_cidr);
+ LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08" PRIx32, pDetails->name, pDetails->chipid_cidr);
}
/* DANGER: THERE ARE DRAGONS HERE */
diff --git a/src/flash/nor/at91sam4l.c b/src/flash/nor/at91sam4l.c
index 4ee4ff853..d09414cbe 100644
--- a/src/flash/nor/at91sam4l.c
+++ b/src/flash/nor/at91sam4l.c
@@ -346,7 +346,7 @@ static int sam4l_probe(struct flash_bank *bank)
/* Done */
chip->probed = true;
- LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRId32 "B pages, %" PRIu32 "KB RAM)",
+ LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRIu32 "B pages, %" PRIu32 "KB RAM)",
chip->details ? chip->details->name : "unknown", (char)('A' + (id & 0xF)),
chip->flash_kb, chip->num_pages, chip->page_size, chip->ram_kb);
diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c
index 59f5951ae..3d8fee1af 100644
--- a/src/flash/nor/at91sam7.c
+++ b/src/flash/nor/at91sam7.c
@@ -954,7 +954,7 @@ static int at91sam7_write(struct flash_bank *bank, const uint8_t *buffer, uint32
/* Send Write Page command to Flash Controller */
if (at91sam7_flash_command(bank, WP, pagen) != ERROR_OK)
return ERROR_FLASH_OPERATION_FAILED;
- LOG_DEBUG("Write flash bank:%u page number:%" PRIi32 "", bank->bank_number, pagen);
+ LOG_DEBUG("Write flash bank:%u page number:%" PRIu32, bank->bank_number, pagen);
}
return ERROR_OK;
diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c
index c30ddf3c0..9a4595f6d 100644
--- a/src/flash/nor/ath79.c
+++ b/src/flash/nor/ath79.c
@@ -275,7 +275,7 @@ static int ath79_spi_bitbang_chunk(struct flash_bank *bank,
*transferred = 0;
pracc_queue_init(&ctx);
- LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08x, %p, %d)",
+ LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08" PRIx32 ", %p, %d)",
target, ath79_info->io_base, d...
[truncated message content] |
