From: OpenOCD-Gerrit <ope...@us...> - 2020-08-16 10:49:37
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 105f8386ad92d27f0171d748f9b2a804a5317fd9 (commit) from 6ec2ec4d32e554a97c057e3f2f0839679f7e6291 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 105f8386ad92d27f0171d748f9b2a804a5317fd9 Author: Hellosun Wu <wuj...@gm...> Date: Tue Oct 29 13:36:31 2019 +0800 tcl: Add support for NDS V5 target and xc7/Corvette-F1 The "Corvette-F1" is an Arduino-compatible evaluation platform, which fully supports AndesCore. The board has FTDI FT2232 to connected to FPGA's JTAG interface. The "ADP-XC7KFF676" is a development and prototyping board that provides capacity for evaluation of AndesCore processors. It works with AICE in-circuit debugging tools. This patch also include target/nds32v5.cfg to support AndesCore N22/N25F and AndeShape Platform AE250. Change-Id: I144d5063d5086d00ec44634a5028b5ea5d2eba33 Signed-off-by: Hellosun Wu <wuj...@gm...> Reviewed-on: http://openocd.zylin.com/5338 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/tcl/board/nds32_corvettef1.cfg b/tcl/board/nds32_corvettef1.cfg new file mode 100644 index 000000000..1a3782c68 --- /dev/null +++ b/tcl/board/nds32_corvettef1.cfg @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# ADP-Corvette-F1 R1.0 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/corvette-f1-r1/ +# ADP-Corvette-F1 R2.0 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/corvette-f1-r2/ + +adapter_khz 10000 + +adapter driver ftdi +ftdi_device_desc "Dual RS232-HS" +ftdi_vid_pid 0x0403 0x6010 + +ftdi_layout_init 0x0c08 0x0f1b +ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 +ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 +reset_config srst_only + +source [find target/nds32v5.cfg] diff --git a/tcl/board/nds32_xc7.cfg b/tcl/board/nds32_xc7.cfg new file mode 100644 index 000000000..82c00acd7 --- /dev/null +++ b/tcl/board/nds32_xc7.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# ADP-XC7K160/410 +# http://www.andestech.com/en/products-solutions/andeshape-platforms/adp-xc7k160-410/ + +source [find target/nds32v5.cfg] diff --git a/tcl/target/nds32v5.cfg b/tcl/target/nds32v5.cfg new file mode 100644 index 000000000..56b5fedfe --- /dev/null +++ b/tcl/target/nds32v5.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Andes Core +# +# http://www.andestech.com +# + +set _CHIPNAME nds +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563D + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME riscv -chain-position $_TARGETNAME ----------------------------------------------------------------------- Summary of changes: tcl/board/nds32_corvettef1.cfg | 18 ++++++++++++++++++ tcl/board/nds32_xc7.cfg | 5 +++++ tcl/target/nds32v5.cfg | 12 ++++++++++++ 3 files changed, 35 insertions(+) create mode 100644 tcl/board/nds32_corvettef1.cfg create mode 100644 tcl/board/nds32_xc7.cfg create mode 100644 tcl/target/nds32v5.cfg hooks/post-receive -- Main OpenOCD repository |