[OpenOCD-user] Do I have a method to specify aarch32 for A53(armv8)?

[Li Z. <zha...@gm...>]

Openocd community,
I am testing a SOC design on FPGA simulation board. The core is a
single A53 but designed to be working from aarch32 mode from the
beginning. I am using Jlink, it seems Jlink recognized it well. But
when I switch to openocd, some error are reported. I guess I am not
using a correct configuration file. Would you please have a look at
it?
Here is the Jlink connection log
==========================
li@ubuntu:~/source_3rd/openocd-code (master)]$JLinkExe
SEGGER J-Link Commander V6.70g (Compiled Apr 23 2020 09:14:12)
DLL version V6.70g, compiled Apr 23 2020 09:14:02

Connecting to J-Link via USB...O.K.
Firmware: J-Link V11 compiled Apr 16 2020 17:17:32
Hardware version: V11.00
S/N: 261000160
License(s): FlashBP, GDB
OEM: SEGGER-EDU
VTref=1.825V


Type "connect" to establish a target connection, '?' for help
J-Link>connect cortex-a53
Please specify device / core. <Default>: CORTEX-A53
Type '?' for selection dialog
Device>
Please specify target interface:
  J) JTAG (Default)
  S) SWD
  T) cJTAG
TIF>J
Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
JTAGConf>
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>1000
Device "CORTEX-A53" selected.


Connecting to target via JTAG
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
 #0 Id: 0x6BA00477, IRLen: 04, CoreSight JTAG-DP
Scanning AP map
AP scan stopped (required AP found)
AP[0]: APB-AP
Scanning ROMTbl @ 0x80000000
[0]Comp[0] @ 0x80400000: ROM Table
Scanning ROMTbl @ 0x80400000
[1]Comp[0] @ 0x80410000: Cortex-A53
[1]Comp[1] @ 0x80420000: CTI-A53
Core found. Stopped ROM table scan: https://wiki.segger.com/ROMTableScan
Cortex-A53 @ 0x80410000 (detected)
CoreCTI @ 0x80420000 (detected)
Debug architecture: ARMv8
6 code breakpoints, 4 data breakpoints
Add. info (CPU temp. halted)
Cache info:
  Inner cache boundary: none
  LoU Uniprocessor: 0
  LoC: 0
  LoU Inner Shareable: 0
Exception AArch usage: All: AArch32
VMSAv8-64: Supports 48-bit VAs
Cortex-A53 identified.
==========================
Then I use the brand new compiled openocd (commit
c60252ac2b636c4d99b766a574b9df0966151696), which should be for ARMV8
to connect the target
==========================
li@ubuntu:~/source_3rd/openocd-code
(master)]$/home/li/source_3rd/openocd-code/install/bin/openocd -f
/home/li/source_3rd/openocd-code/install/share/openocd/scripts/interface/jlink.cfg
-f ~/source_3rd/openocd-code/install/share/openocd/scripts/target/ict3300_aarch64.cfg
Open On-Chip Debugger 0.10.0+dev-01204-gc60252ac-dirty (2020-04-27-01:37)
Licensed under GNU GPL v2
For bug reports, read
    http://openocd.org/doc/doxygen/bugs.html
jtag
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : J-Link V11 compiled Apr 16 2020 17:17:32
Info : Hardware version: 11.00
Info : VTarget = 1.825 V
Info : clock speed 1000 kHz
Info : JTAG tap: ict3300.cpu tap/device found: 0x6ba00477 (mfg: 0x23b
(ARM Ltd.), part: 0xba00, ver: 0x6)
Info : ict3300.a53.0: hardware has 6 breakpoints, 4 watchpoints
Info : starting gdb server for ict3300.a53.0 on 3333
Info : Listening on port 3333 for gdb connections
Info : accepting 'telnet' connection on tcp/4444
Info : accepting 'gdb' connection on tcp/3333
Error executing event gdb-attach on target ict3300.a53.0:

Error: aarch64_mmu: target ict3300.a53.0 not halted
==========================
The error appears when I issue "target remote :3333" on gdb session.
The configuration files I used are attached. There are just little
modification from a similar file imx8m.cfg, which is installed by
openocd.

I think I need to specify the aarch32 mode somewhere. But I can't find
such an example. If I use a cortex-a target, the -cti configuation is
said illegal. So I don't think that is a correct way, as JLink found
CTI already.

BR
/Li.