Menu
▾
▴
[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.10.0-1194-g5c6e32612
|
From: OpenOCD-Gerrit <ope...@us...> - 2020-04-21 11:56:35
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5c6e32612df3360abe0ada4e434783b5636643f2 (commit)
from 5c8de6a7253641bf1e4789bdc3b1e89ab741b1d1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 5c6e32612df3360abe0ada4e434783b5636643f2
Author: Florian Fainelli <f.f...@gm...>
Date: Mon Jun 17 15:46:11 2019 -0700
Remove BUILD_TARGET64
BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.
Rebased by Antonio Borneo after commit 1fbe8450a9dd ("mips: Add
MIPS64 support")
Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <mat...@we...>
Signed-off-by: Florian Fainelli <f.f...@gm...>
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index 1c921fb1c..a6bda8856 100644
--- a/configure.ac
+++ b/configure.ac
@@ -360,10 +360,6 @@ AC_ARG_ENABLE([internal-libjaylink],
[Disable building internal libjaylink]),
[use_internal_libjaylink=$enableval], [use_internal_libjaylink=yes])
-AC_ARG_ENABLE([target64],
- AS_HELP_STRING([--disable-target64], [Disable 64-bit target address]),
- [build_target64=$enableval], [build_target64=yes])
-
build_minidriver=no
AC_MSG_CHECKING([whether to enable ZY1000 minidriver])
AS_IF([test "x$build_zy1000" = "xyes"], [
@@ -617,13 +613,6 @@ AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe driver.])
])
-AS_IF([test "x$build_target64" = "xyes"], [
- AC_DEFINE([BUILD_TARGET64], [1], [1 if you want 64-bit addresses.])
-], [
- AC_DEFINE([BUILD_TARGET64], [0], [0 if you don't want 64-bit addresses.])
-])
-
-
PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
@@ -746,7 +735,6 @@ AM_CONDITIONAL([BITQ], [test "x$build_bitq" = "xyes"])
AM_CONDITIONAL([USE_LIBFTDI], [test "x$use_libftdi" = "xyes"])
AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
-AM_CONDITIONAL([TARGET64], [test "x$build_target64" = "xyes"])
AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
AM_CONDITIONAL([MINIDRIVER], [test "x$build_minidriver" = "xyes"])
diff --git a/src/helper/types.h b/src/helper/types.h
index b6747f8d4..f3d5e04a3 100644
--- a/src/helper/types.h
+++ b/src/helper/types.h
@@ -349,7 +349,6 @@ typedef uint64_t uintmax_t;
#endif
-#if BUILD_TARGET64
typedef uint64_t target_addr_t;
#define TARGET_ADDR_MAX UINT64_MAX
#define TARGET_PRIdADDR PRId64
@@ -357,15 +356,6 @@ typedef uint64_t target_addr_t;
#define TARGET_PRIoADDR PRIo64
#define TARGET_PRIxADDR PRIx64
#define TARGET_PRIXADDR PRIX64
-#else
-typedef uint32_t target_addr_t;
-#define TARGET_ADDR_MAX UINT32_MAX
-#define TARGET_PRIdADDR PRId32
-#define TARGET_PRIuADDR PRIu32
-#define TARGET_PRIoADDR PRIo32
-#define TARGET_PRIxADDR PRIx32
-#define TARGET_PRIXADDR PRIX32
-#endif
#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR
#endif /* OPENOCD_HELPER_TYPES_H */
diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 30d2339bf..42d809d01 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -29,12 +29,9 @@ noinst_LTLIBRARIES += %D%/libtarget.la
%D%/dsp563xx.c \
%D%/dsp563xx_once.c \
%D%/dsp5680xx.c \
- %D%/hla_target.c
-
-if TARGET64
-%C%_libtarget_la_SOURCES +=$(ARMV8_SRC)
-%C%_libtarget_la_SOURCES +=$(MIPS64_SRC)
-endif
+ %D%/hla_target.c \
+ $(ARMV8_SRC) \
+ $(MIPS64_SRC)
TARGET_CORE_SRC = \
%D%/algorithm.c \
diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c
index f83228d55..eec14a36f 100644
--- a/src/target/armv7a_mmu.c
+++ b/src/target/armv7a_mmu.c
@@ -62,12 +62,6 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va,
/* decode memory attribute */
SS = (value >> 1) & 1;
-#if !BUILD_TARGET64
- if (SS) {
- LOG_ERROR("Super section found with no-64 bit address support");
- return ERROR_FAIL;
- }
-#endif
NOS = (value >> 10) & 1; /* Not Outer shareable */
NS = (value >> 9) & 1; /* Non secure */
INNER = (value >> 4) & 0x7;
diff --git a/src/target/mips64.c b/src/target/mips64.c
index f65aec114..6a7c4252b 100644
--- a/src/target/mips64.c
+++ b/src/target/mips64.c
@@ -18,8 +18,6 @@
#include "config.h"
#endif
-#if BUILD_TARGET64 == 1
-
#include "mips64.h"
static const struct {
@@ -623,5 +621,3 @@ int mips64_enable_interrupts(struct target *target, bool enable)
return ERROR_OK;
}
-
-#endif /* BUILD_TARGET64 */
diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c
index 57addc72a..b19fd044e 100644
--- a/src/target/mips64_pracc.c
+++ b/src/target/mips64_pracc.c
@@ -17,8 +17,6 @@
#include "config.h"
#endif
-#if BUILD_TARGET64 == 1
-
#include "mips64.h"
#include "mips64_pracc.h"
@@ -1427,5 +1425,3 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
return retval;
}
-
-#endif /* BUILD_TARGET64 */
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 00bafd033..3735cbb67 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -27,11 +27,8 @@
#include "mips32.h"
#include "mips_ejtag.h"
#include "mips32_dmaacc.h"
-
-#if BUILD_TARGET64 == 1
#include "mips64.h"
#include "mips64_pracc.h"
-#endif
void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, uint32_t new_instr)
{
@@ -458,8 +455,6 @@ int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_
return ERROR_OK;
}
-#if BUILD_TARGET64 == 1
-
int mips64_ejtag_config_step(struct mips_ejtag *ejtag_info, bool enable_step)
{
const uint32_t code_enable[] = {
@@ -564,5 +559,3 @@ int mips64_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, bool write_t, uint
return ERROR_OK;
}
-
-#endif /* BUILD_TARGET64 */
diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c
index d91700dfe..3a592f7f3 100644
--- a/src/target/mips_mips64.c
+++ b/src/target/mips_mips64.c
@@ -16,8 +16,6 @@
#include "config.h"
#endif
-#if BUILD_TARGET64 == 1
-
#include "breakpoints.h"
#include "mips32.h"
#include "mips64.h"
@@ -1193,5 +1191,3 @@ struct target_type mips_mips64_target = {
.commands = mips64_commands_handlers,
};
-
-#endif /* BUILD_TARGET64 */
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 66218b76e..8307b0224 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -1892,11 +1892,9 @@ static target_addr_t sb_read_address(struct target *target)
target_addr_t address = 0;
uint32_t v;
if (sbasize > 32) {
-#if BUILD_TARGET64
dmi_read(target, &v, DMI_SBADDRESS1);
address |= v;
address <<= 32;
-#endif
}
dmi_read(target, &v, DMI_SBADDRESS0);
address |= v;
@@ -1913,11 +1911,7 @@ static int sb_write_address(struct target *target, target_addr_t address)
if (sbasize > 64)
dmi_write(target, DMI_SBADDRESS2, 0);
if (sbasize > 32)
-#if BUILD_TARGET64
dmi_write(target, DMI_SBADDRESS1, address >> 32);
-#else
- dmi_write(target, DMI_SBADDRESS1, 0);
-#endif
return dmi_write(target, DMI_SBADDRESS0, address);
}
diff --git a/src/target/target.c b/src/target/target.c
index 24fa416f8..538831b5b 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -148,10 +148,8 @@ static struct target_type *target_types[] = {
&mem_ap_target,
&esirisc_target,
&arcv2_target,
-#if BUILD_TARGET64
&aarch64_target,
&mips_mips64_target,
-#endif
NULL,
};
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 12 ------------
src/helper/types.h | 10 ----------
src/target/Makefile.am | 9 +++------
src/target/armv7a_mmu.c | 6 ------
src/target/mips64.c | 4 ----
src/target/mips64_pracc.c | 4 ----
src/target/mips_ejtag.c | 7 -------
src/target/mips_mips64.c | 4 ----
src/target/riscv/riscv-013.c | 6 ------
src/target/target.c | 2 --
10 files changed, 3 insertions(+), 61 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
