[OpenOCD-devel] [PATCH]: edfe698 Use AP2 to access DBGMCU

[<ge...@op...>]

This is an automated email from Gerrit.

Christopher Head (ch...@za...) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4742

-- gerrit

commit edfe69896bda8e197254aae970113d30ebda5bf0
Author: Christopher Head <ch...@za...>
Date:   Sun Oct 28 15:27:59 2018 -0700

    Use AP2 to access DBGMCU
    
    The STM32H7 has three access ports. The DBGMCU component is available
    through AP0 at 0x5C001000 and through AP2 at 0xE00E1000. Using the
    latter is preferable for early configuration because it works in all
    power states and while SRST is asserted, whereas the former does not.
    
    Change-Id: Iaf8f01d769efb6655040060a8e1e951e1f7e50ab
    Signed-off-by: Christopher Head <ch...@za...>

diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg
index c9aec76..8bd042b 100644
--- a/tcl/target/stm32h7x.cfg
+++ b/tcl/target/stm32h7x.cfg
@@ -73,27 +73,37 @@ if {![using_hla]} {
    $_CHIPNAME.dap apcsw 0x08000000 0x08000000
 }
 
+# Like mmw, but uses the system debug bus on AP #2 which can only access a
+# small selection of components but which keeps working even in all
+# power-saving modes and with SRST asserted.
+proc stm32h7x_mmw_via_system_debug_ap {dapname reg setbits clearbits} {
+	$dapname apreg 2 4 $reg
+	set old [capture "$dapname apreg 2 0xC"]
+	set new [expr ($old & ~$clearbits) | $setbits]
+	$dapname apreg 2 0xC $new
+}
+
 $_TARGETNAME configure -event examine-end {
 	# Enable D3 and D1 DBG clocks
 	# DBGMCU_CR |= D3DBGCKEN | D1DBGCKEN
-	mmw 0x5C001004 0x00600000 0
+	stm32h7x_mmw_via_system_debug_ap [[target current] cget -dap] 0xE00E1004 0x00600000 0
 
 	# Enable debug during low power modes (uses more power)
 	# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP in D3 & D1 Domains
-	mmw 0x5C001004 0x00000187 0
+	stm32h7x_mmw_via_system_debug_ap [[target current] cget -dap] 0xE00E1004 0x00000187 0
 
 	# Stop watchdog counters during halt
 	# DBGMCU_APB3FZ1 |= WWDG1
-	mmw 0x5C001034 0x00000040 0
+	stm32h7x_mmw_via_system_debug_ap [[target current] cget -dap] 0xE00E1034 0x00000040 0
 	# DBGMCU_APB4FZ1 |= WDGLSD1
-	mmw 0x5C001054 0x00040000 0
+	stm32h7x_mmw_via_system_debug_ap [[target current] cget -dap] 0xE00E1054 0x00040000 0
 }
 
 $_TARGETNAME configure -event trace-config {
 	# Set TRACECLKEN; TRACE_MODE is set to async; when using sync
 	# change this value accordingly to configure trace pins
 	# assignment
-	mmw 0x5C001004 0x00100000 0
+	stm32h7x_mmw_via_system_debug_ap [[target current] cget -dap] 0xE00E1004 0x00100000 0
 }
 
 $_TARGETNAME configure -event reset-init {

--