Re: [OpenOCD-user] Cortex M7/ATSAME70, breakpoints and cache

[Thomas D. <tho...@em...>]

Hi Matthias,

using the single-stepping support wouldn't solve the caching issue. Even if you use single-stepping support will once again execute the breakpoint instruction, which is still in i-cache, AFAIK...

I will try the "hbreak" and the openOCD override today.

wrk,
Thomas.

----- Ursprüngliche Mail -----
Von: "Matthias Welwarsky" <mat...@we...>
An: ope...@li...
CC: "Paul Fertser" <fer...@gm...>, "Thomas Dörfler" <tho...@em...>
Gesendet: Mittwoch, 21. Februar 2018 22:49:04
Betreff: Re: [OpenOCD-user] Cortex M7/ATSAME70, breakpoints and cache

On Mittwoch, 21. Februar 2018 19:53:43 CET Paul Fertser wrote:
> On Wed, Feb 21, 2018 at 11:36:36AM +0100, Thomas Doerfler wrote:
> > I came around a serious problem regarding openOCD 0.10.0, an ATSAME70
> > (Cortex M7) board, gdb and breakpoints (incl. single-stepping).
> 
> As a temporary workaround, you can use "hbreak" in gdb instead of
> regular "break", that will make it use hardware breakpoints which do
> not modify RAM.
> 
> There's also an openocd command that overrides default GDB behaviour
> so that you can force any breakpoint set by GDB to be a hardware one.
> 
> HTH

I wonder why gdb doesn't use the single-stepping support that is undoubtedly 
implemented in the cortex_m target.

BR,
Matthias