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[OpenOCD-devel] [openocd:tickets] Re: #148 STM32L0x: flash size and dual bank support
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From: Rui C. <tm...@us...> - 2017-05-23 16:12:34
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Thanks Uwe! Now it works if you keep pressing the reset button!
But after running "telnet localhost 4444", what commands work for lock/unlock and read/write flash?
I tried:
~~~
> stm32lx unlock 0
Cannot identify target as a STM32L family.
auto_probe failed
> stm32f2 unlock 0
invalid command name "stm32f2"
> stm32f2x unlock 0
invalid command name "stm32f2x"
> stm32f2x options_read 0
invalid command name "stm32f2x"
> stm32 options_read 0
invalid command name "stm32"
> stm32l options_read 0
invalid command name "stm32l"
> stm32lx options_read 0
invalid subcommand "options_read 0"
in procedure 'stm32lx'
> dump_image dump_flash.bin 0x08000000 0x80000
dumped 524288 bytes in 27.198000s (18.825 KiB/s)
~~~
but had no success and the dump_flash.bin file generated is all 0000... (zeros) when it should be the default program running in the devkit.
Any help?
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** [tickets:#148] STM32L0x: flash size and dual bank support**
**Status:** new
**Milestone:** 0.9.0
**Created:** Sun Mar 19, 2017 01:47 AM UTC by Aurelio Lucchesi
**Last Updated:** Tue May 23, 2017 12:34 PM UTC
**Owner:** nobody
Flash programming large binaries to my STM32L082 board failed,
and I had to recompile OpenOCD in order to make it work.
Without modification, it looks like this:
~~~
$ openocd -f interface/stlink-v2.cfg -f target/stm32l0.cfg -c "program build/prj.elf reset exit verify"
...
Info : Device: STM32L0xx (Cat.5)
Info : STM32L flash has dual banks. Bank (0) size is 128kb, base address is 0x8000000
...
Error: checksum mismatch - attempting binary compare
diff 0 address 0x08020000. Was 0x3e instead of 0x69
diff 1 address 0x08020001. Was 0x79 instead of 0x21
diff 2 address 0x08020002. Was 0x79 instead of 0x3d
diff 3 address 0x08020003. Was 0x74 instead of 0x59
diff 4 address 0x08020004. Was 0x6f instead of 0x59
diff 5 address 0x08020005. Was 0x73 instead of 0x5f
...
~~~
Then I've realized that there are two flash program memory banks:
STM32L0xx category 5 MCUs come with 192 KiB of Flash program memory:
* Bank 1: starting at 0x0800 0000, size 96 KiB
* Bank 2: starting at 0x0801 8000, size 96 KiB
So I've added a second one to a copy of the stm32l0.cfg script:
~~~
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
# add second flash bank
set _FLASHNAME $_CHIPNAME.flash1
flash bank $_FLASHNAME stm32lx 0x08018000 0x18000 0 0 $_TARGETNAME
~~~
But that revealed another problem:
~~~
$ openocd -f interface/stlink-v2.cfg -f ./stm32l0.cfg -c "program build/prj.elf reset exit verify"
...
Info : Device: STM32L0xx (Cat.5)
Info : STM32L flash has dual banks. Bank (0) size is 128kb, base address is 0x8000000
Warn : couldn't use loader, falling back to page memory writes
Info : Device: STM32L0xx (Cat.5)
Warn : STM32L flash bank base address config is incorrect. 0x8018000 but should rather be 0x8000000 or 0x8020000
Error: auto_probe failed
** Programming Failed **
shutdown command invoked
~~~
So I tried to fix things by rebuilding OpenOCD, and changed the size of
the first (and second) flash page in src/flash/nor/stm32lx.c:261 from
128 to 96 KiB:
~~~
{
.id = 0x447,
.revs = stm32_447_revs,
.num_revs = ARRAY_SIZE(stm32_447_revs),
.device_str = "STM32L0xx (Cat.5)",
.page_size = 128,
.pages_per_sector = 32,
.max_flash_size_kb = 192,
.first_bank_size_kb = 96, // 128,
.has_dual_banks = true,
.flash_base = 0x40022000,
.fsize_base = 0x1FF8007C,
},
~~~
That actually works for my hardware with the modified cfg script:
~~~
$ ~/git/openocd/src/openocd -f interface/stlink-v2.cfg -f ./stm32l0.cfg -c "program build/prj.elf reset exit verify" --search
~/git/openocd/tcl
Open On-Chip Debugger 0.10.0+dev-00093-g6b2acc02 (2017-03-18-23:04)
...
Info : Device: STM32L0xx (Cat.5)
Info : STM32L flash has dual banks. Bank (0) size is 96kb, base address is 0x8000000
Warn : couldn't use loader, falling back to page memory writes
Info : Device: STM32L0xx (Cat.5)
Info : STM32L flash has dual banks. Bank (1) size is 96kb, base address is 0x8018000
Info : ignoring flash probed value, using configured bank size: 96kbytes
...
** Verified OK **
** Resetting Target **
~~~
So I've asked on IRC and tried to submit a really simple patch for that:
http://openocd.zylin.com/#/c/4073/
But like Cezary pointed out: This **does not solve the problem of all STM32L0**
Category 5 (or 3) devices, since they all have a different memory layout...
See also:
http://openocd.zylin.com/#/c/3554/
STM32L0x1 Ref Manual: http://st.com/resource/en/reference_manual/DM00108282.pdf
STM32L0x2 Ref Manual: http://st.com/resource/en/reference_manual/DM00108281.pdf
STM32L0x3 Ref Manual: http://st.com/resource/en/reference_manual/DM00095744.pdf
I don't have access to other hardware to test things out nor enough knowledge
about OpenOCD to really fix the issue for all cases...
-----
Possible solutions that came to mind:
1) Don't use hardcoded size values. - Like Karl Palsson pointed out:
Using the probed flash size (fsize_base/flash_size_in_kb, 0x1FF8004C on STM32L0x2,
33.1.1 Flash size register) and the device ID (32.4.1 MCU device ID code,
stm32lx_read_id_code()), it should be possible to figure out the exact flash
memory layout (size, addresses, dual bank).
2) Hardcode the values for all possible combinations for all STM32L0 MCU
types/categories code the sizes.
3) Maybe the easiest: Make it possible to change first_bank_size_kb in a
config script? Or is this already possible somehow?
I'd like to help fixing this issue...
---
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