Re: [OpenOCD-user] Atmel SAM3X8E support

[Tom C. <tom...@gm...>]

Looking again, actually I've tied JTAGSEL to 3.3V directly, and using a
track under the chip at that.  Not so easy to try out.  Bother.

On Tue, 21 Mar 2017 at 12:18 Tom Cook <tom...@gm...> wrote:

Thanks for the quick answers.  I'm not sure I've got my head around the
relevant bits of this datasheet.  Section 6.2.1 says:

-- quote --
The JTAGSEL pin is used to select the JTAG boundary scan when asserted at a
high level. It integrates a permanent pull-down resistor of about 15 kΩ to
GND, so that it can be left unconnected for normal operations.
By default, the JTAG Debug Port is active. If the debugger host wants to
switch to the Serial Wire Debug Port, it must provide a dedicated JTAG
sequence on TMS/SWDIO and TCK/SWCLK which disables the JTAG-DP and enables
the SW-DP. When the Serial Wire Debug Port is active, TDO/TRACESWO can be
used for trace.
-- end quote --

I'd read that to say that JTAGSEL should be tied high for JTAG debug mode,
but it's not, is it?  It's saying leave it low for JTAG debug mode, high
for JTAG boundary scan.  At least it's got an internal pull-down, so I can
just remove a resistor to try it out.  It's given me something to try, at
least.

Thanks again,
Tom

On Tue, 21 Mar 2017 at 12:04 Andreas Fritiofson <
and...@gm...> wrote:



On Tue, Mar 21, 2017 at 1:02 PM, Andreas Fritiofson <
and...@gm...> wrote:



On Tue, Mar 21, 2017 at 12:56 PM, Andreas Fritiofson <
and...@gm...> wrote:



On Tue, Mar 21, 2017 at 11:42 AM, Tom Cook <tom...@gm...> wrote:


OpenOCD provides a target script, at91sam3XXX.cfg, that claims to support
this part.  However, according to that script, the part's TAPID
is 0x4ba00477 and it expects the IR to contain 0x9 (I've built from source,
git hash is 6b2acc02).  When I start OpenOCD, the TAPID it sees is
0x05b2b03f - and this seems to match what's given in section 11.5.8 of the
SAM3X datasheet.


I doubt that this TAP with ID 0x05b2b03f is the debug TAP for the
Cortex-M3. The debug TAP should have ARM's ID, something like in the
original config, and not Atmel's. Perhaps Atmel/Microchip have added a
separate TAP for boundary scan or whatever in this chip variant.


According to Microchip product page SAM3X8E has "IEEE1149.1 JTAG
Boundary-scan on all digital pins", so supposedly they do have an extra TAP
for that.


Sorry for spamming, but search for JTAGSEL in the data sheet.

/Andreas