[OpenOCD-user] TAP / openOCD out of sync with actual CPU state

[Weber, M. J. (US SSA) <mic...@ba...>]

In working with a bcm5352e I have observed that during 'resume' events the processor will resume but that openOCD will report that the cpu has halted again due to target-not-halted. Often there is a message nearby saying "in procedure mww".

Frequently when halting I will observe messages like "error writing unexpected address 0xff..." but do not know if these are related.

Once the CPU is running but the TAP/openOCD says it's halted, further interaction with the system becomes impossible/meaningless. Power cycling the JTAG adapter (TUMPA) and killing/restarting openOCD don't fix the out-of-sync condition. Resetting the target board via jtag reset or power cycle does fix the problem until another halt/resume cycle.

What should we look at in our configuration to attempt to improve the sync between the TAP and the CPU?

Thanks,
Mike