Re: [OpenOCD-user] srst with swd

[Spencer O. <sp...@sp...>]

Richard,

On 15 October 2014 14:48, Richard Bryan <r...@ra...> wrote:
> Is there a configuration to force openocd to hold srst low when using SWD as
> the transport?
>
> We're using openocd to program an Atmel SAMD20E using swd over a Segger
> Jlink.  We're having trouble getting openocd to actually hold srst low.  We
> can program and  debug the device normally just fine, but this is only
> hotplugging the device via the SWCLK/SWIO lines.
>
> Hotplugging fails obviously when we try to use the swd pins on our chip for
> GPIO (they're multiplexed with a pair of buttons).  When multiplexing those
> pins for GPIO, the only way to reflash the chip is to reset it using srst
> and then perform swd transactions before the on-board program has a chance
> to configure those pins as gpio.  We're unable to configure openocd to do
> this though.
>
> We use the following board config:
>
>
> transport select swd
> source [find interface/cmsis-dap.cfg]
>
> # chip name
> set CHIPNAME at91samd20e14
>
> source [find target/at91samdXX.cfg]
>
> init
> reset
>
>
> Along with the standard jlink.cfg for our Segger Jlink.
>
> We've also tried adding these config lines before init:
>
> cortex_m reset_config srst
> cortex_m reset_config srst_nogate
> cortex_m reset_config connect_assert_srst
>

Does this not complain about an invalid cmd, as it should ?

> ...with the same result.
>
> Also, interestingly enough we see this debug output when running with -d
> flag:
>
>
> Debug: 366 67 cortex_m.c:1111 cortex_m_deassert_reset(): target->state:
> reset
> Debug: 367 119 jlink.c:671 jlink_reset(): trst: 0, srst: 0
> Debug: 368 119 core.c:644 swd_add_reset(): SRST line released
>
>
> But the srst line is not actually driven low as verified with an
> oscilloscope.
>
> Is there something we're missing from our config?  We're using the lastest
> master head (1ea25b85b) btw.
>

simply try
reset_config srst_only srst_nogate connect_assert_srst

Cheers
Spen