[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-484-gf60a239

[Øyvind H. <go...@us...>]

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- Log -----------------------------------------------------------------
commit f60a2390cc5abe3d01633d9793ac1791fd0a3a5d
Author: Øyvind Harboe <oyv...@zy...>
Date:   Fri Aug 13 12:59:36 2010 +0200

    lpc1768: turn down the jtag clock
    
    Tests should that it needs to be as low as 100kHz to be
    stable.
    
    Signed-off-by: Øyvind Harboe <oyv...@zy...>

diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg
index ff92e4a..07c5ab8 100644
--- a/tcl/target/lpc1768.cfg
+++ b/tcl/target/lpc1768.cfg
@@ -47,16 +47,18 @@ set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \
 	lpc1700 $_CCLK calc_checksum
 
-# JTAG clock should be CCLK/6 (unless using adaptive clocking)
-# CCLK is 4 MHz after reset, and until board-specific code (like
-# a reset-init handler) speeds it up.
-#
 # Although rclk "appears to work", it turns out that this yields
 # 4MHz whereas the "correct" rate is CCLK/6, which is not what
 # you get with rclk.
-jtag_khz [ expr 4000 / 6 ]
-
-
+#
+# Also, crank down the frequency further as we're running of an
+# RC oscillator instead of crystal.
+#
+# Setting up XTAL in the reset-init sequence could be worth 
+# the effort if you need to program the flash which is pretty
+# big on these devices.
+#
+jtag_khz 100
 
 $_TARGETNAME configure -event reset-init {
 	# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/lpc1768.cfg |   16 +++++++++-------
 1 files changed, 9 insertions(+), 7 deletions(-)


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