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[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-449-g260eb45
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From: Spencer O. <nt...@us...> - 2010-07-20 10:28:58
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The branch, master has been updated
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via ee17d5c48eaca42438663405ff6d090a391fc9e6 (commit)
via 7176ed9afe0972ca768d6aabc8e58418d6f91286 (commit)
via f0c0256b1f05a04a58d857e9d865a0be0dd1680d (commit)
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- Log -----------------------------------------------------------------
commit 260eb4548b01da3ecd2cd146bb22a0f36df1a038
Author: Spencer Oliver <nt...@us...>
Date: Mon Jul 19 20:33:04 2010 +0100
flash: remove algorithm exit_point address for supported targets
For the above targets the exit_point is
optional when used with run_algorithm, so remove it.
This makes updating the algorithm less error prone.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c
index 866be50..0930d62 100644
--- a/src/flash/nor/lpc2000.c
+++ b/src/flash/nor/lpc2000.c
@@ -346,7 +346,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, int code, uint32_t param_ta
init_reg_param(®_params[4], "lr", 32, PARAM_OUT);
buf_set_u32(reg_params[4].value, 0, 32, (lpc2000_info->iap_working_area->address + 0x04) | 1); /* bit0 of LR = 1 to return in Thumb mode */
- target_run_algorithm(target, 2, mem_params, 5, reg_params, lpc2000_info->iap_working_area->address, lpc2000_info->iap_working_area->address + 0x4, 10000, &armv7m_info);
+ target_run_algorithm(target, 2, mem_params, 5, reg_params, lpc2000_info->iap_working_area->address, 0, 10000, &armv7m_info);
break;
case lpc2000_v1:
case lpc2000_v2:
diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index 2fe864d..363f49e 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -360,7 +360,7 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
pic32mx_info->write_algorithm->address,
- pic32mx_info->write_algorithm->address + (sizeof(pic32mx_flash_write_code) - 76),
+ 0,
10000, &mips32_info)) != ERROR_OK)
{
LOG_ERROR("error executing pic32mx flash write algorithm");
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index ff1c2e4..69e2f10 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -884,8 +884,7 @@ static int stellaris_write_block(struct flash_bank *bank,
(unsigned) (wcount - thisrun_count));
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
write_algorithm->address,
- write_algorithm->address +
- sizeof(stellaris_write_code) - 10,
+ 0,
10000, &armv7m_info);
if (retval != ERROR_OK)
{
diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c
index 5ce5d45..4ec777d 100644
--- a/src/flash/nor/stm32x.c
+++ b/src/flash/nor/stm32x.c
@@ -519,7 +519,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
stm32x_info->write_algorithm->address,
- stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10),
+ 0,
10000, &armv7m_info)) != ERROR_OK)
{
LOG_ERROR("error executing stm32x flash write algorithm");
commit ee17d5c48eaca42438663405ff6d090a391fc9e6
Author: Spencer Oliver <nt...@us...>
Date: Mon Jul 19 20:29:16 2010 +0100
mips32: exit_point optional for mips32_run_algorithm
As the mips32 uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm codebase.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/target/mips32.c b/src/target/mips32.c
index 2547b01..24cd7d9 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -348,7 +348,7 @@ static int mips32_run_and_wait(struct target *target, uint32_t entry_point,
}
pc = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32);
- if (pc != exit_point)
+ if (exit_point && (pc != exit_point))
{
LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
return ERROR_TARGET_TIMEOUT;
commit 7176ed9afe0972ca768d6aabc8e58418d6f91286
Author: Spencer Oliver <nt...@us...>
Date: Mon Jul 19 20:28:30 2010 +0100
armv7m: exit_point optional for armv7m_run_algorithm
As the armv7m uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm4_5 codebase.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index bd5aa14..a73a9bb 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -313,7 +313,7 @@ static int armv7m_run_and_wait(struct target *target, uint32_t entry_point, int
}
armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
- if (pc != exit_point)
+ if (exit_point && (pc != exit_point))
{
LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
return ERROR_TARGET_TIMEOUT;
commit f0c0256b1f05a04a58d857e9d865a0be0dd1680d
Author: Spencer Oliver <nt...@us...>
Date: Tue Jul 20 09:02:10 2010 +0100
armv4_5: add algorithms instruction breakpoint support
Update the arm_checksum_memory and arm_blank_check_memory
algorithms to use a breakpoint instruction on v5 arch.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 1a84a5f..d950af3 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -1286,16 +1286,17 @@ int armv4_5_run_algorithm(struct target *target, int num_mem_params, struct mem_
/**
* Runs ARM code in the target to calculate a CRC32 checksum.
*
- * \todo On ARMv5+, rely on BKPT termination for reduced overhead.
*/
int arm_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum)
{
struct working_area *crc_algorithm;
struct arm_algorithm armv4_5_info;
+ struct arm *armv4_5 = target_to_arm(target);
struct reg_param reg_params[2];
int retval;
uint32_t i;
+ uint32_t exit_var = 0;
static const uint32_t arm_crc_code[] = {
0xE1A02000, /* mov r2, r0 */
@@ -1321,7 +1322,7 @@ int arm_checksum_memory(struct target *target,
0xE1540003, /* cmp r4, r3 */
0x1AFFFFF1, /* bne nbyte */
/* end: */
- 0xEAFFFFFE, /* b end */
+ 0xe1200070, /* bkpt #0 */
/* CRC32XOR: */
0x04C11DB7 /* .word 0x04C11DB7 */
};
@@ -1353,9 +1354,13 @@ int arm_checksum_memory(struct target *target,
/* 20 second timeout/megabyte */
int timeout = 20000 * (1 + (count / (1024 * 1024)));
+ /* armv4 must exit using a hardware breakpoint */
+ if (armv4_5->is_armv4)
+ exit_var = crc_algorithm->address + sizeof(arm_crc_code) - 8;
+
retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
crc_algorithm->address,
- crc_algorithm->address + sizeof(arm_crc_code) - 8,
+ exit_var,
timeout, &armv4_5_info);
if (retval != ERROR_OK) {
LOG_ERROR("error executing ARM crc algorithm");
@@ -1380,7 +1385,6 @@ int arm_checksum_memory(struct target *target,
* all ones. NOR flash which has been erased, and thus may be written,
* holds all ones.
*
- * \todo On ARMv5+, rely on BKPT termination for reduced overhead.
*/
int arm_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank)
@@ -1388,8 +1392,10 @@ int arm_blank_check_memory(struct target *target,
struct working_area *check_algorithm;
struct reg_param reg_params[3];
struct arm_algorithm armv4_5_info;
+ struct arm *armv4_5 = target_to_arm(target);
int retval;
uint32_t i;
+ uint32_t exit_var = 0;
static const uint32_t check_code[] = {
/* loop: */
@@ -1398,7 +1404,7 @@ int arm_blank_check_memory(struct target *target,
0xe2511001, /* subs r1, r1, #1 */
0x1afffffb, /* bne loop */
/* end: */
- 0xeafffffe /* b end */
+ 0xe1200070, /* bkpt #0 */
};
/* make sure we have a working area */
@@ -1430,9 +1436,13 @@ int arm_blank_check_memory(struct target *target,
init_reg_param(®_params[2], "r2", 32, PARAM_IN_OUT);
buf_set_u32(reg_params[2].value, 0, 32, 0xff);
+ /* armv4 must exit using a hardware breakpoint */
+ if (armv4_5->is_armv4)
+ exit_var = check_algorithm->address + sizeof(check_code) - 4;
+
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
check_algorithm->address,
- check_algorithm->address + sizeof(check_code) - 4,
+ exit_var,
10000, &armv4_5_info);
if (retval != ERROR_OK) {
destroy_reg_param(®_params[0]);
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/lpc2000.c | 2 +-
src/flash/nor/pic32mx.c | 2 +-
src/flash/nor/stellaris.c | 3 +--
src/flash/nor/stm32x.c | 2 +-
src/target/armv4_5.c | 22 ++++++++++++++++------
src/target/armv7m.c | 2 +-
src/target/mips32.c | 2 +-
7 files changed, 22 insertions(+), 13 deletions(-)
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