[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-360-g7013b96

[Øyvind H. <go...@us...>]

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       via  8d1dcb9bcde55ff29c1967d86c5f8985620df923 (commit)
      from  acee9d1c65bd97bbd5aa2b633e2455e87edbe836 (commit)

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- Log -----------------------------------------------------------------
commit 7013b960feeb0d4ab3aeae40d5ac17dda6d79a3a
Author: Øyvind Harboe <oyv...@zy...>
Date:   Mon Jun 21 09:02:53 2010 +0200

    adi_v5_jtag: add missing error handling
    
    Signed-off-by: Øyvind Harboe <oyv...@zy...>

diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
index b368708..44f624f 100644
--- a/src/target/adi_v5_jtag.c
+++ b/src/target/adi_v5_jtag.c
@@ -259,7 +259,11 @@ static int jtagdp_transaction_endcheck(struct adiv5_dap *dap)
 		LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat);
 		/* Check power to debug regions */
 		if ((ctrlstat & 0xf0000000) != 0xf0000000)
-			 ahbap_debugport_init(dap);
+		{
+			retval = ahbap_debugport_init(dap);
+			if (retval != ERROR_OK)
+				return retval;
+		}
 		else
 		{
 			uint32_t mem_ap_csw, mem_ap_tar;

commit 8d1dcb9bcde55ff29c1967d86c5f8985620df923
Author: Øyvind Harboe <oyv...@zy...>
Date:   Mon Jun 21 09:02:02 2010 +0200

    cortex a8: add missing error handling
    
    cortex examine was missing error handling.
    
    Signed-off-by: Øyvind Harboe <oyv...@zy...>

diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index cfec48b..933b42e 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -1523,8 +1523,14 @@ static int cortex_a8_examine_first(struct target *target)
 	/* We do one extra read to ensure DAP is configured,
 	 * we call ahbap_debugport_init(swjdp) instead
 	 */
-	ahbap_debugport_init(swjdp);
-	mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_CPUID, &cpuid);
+	retval = ahbap_debugport_init(swjdp);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_CPUID, &cpuid);
+	if (retval != ERROR_OK)
+		return retval;
+
 	if ((retval = mem_ap_read_atomic_u32(swjdp,
 			armv7a->debug_base + CPUDBG_CPUID, &cpuid)) != ERROR_OK)
 	{
@@ -1559,7 +1565,9 @@ static int cortex_a8_examine_first(struct target *target)
 	LOG_DEBUG("didr = 0x%08" PRIx32, didr);
 
 	armv7a->armv4_5_common.core_type = ARM_MODE_MON;
-	cortex_a8_dpm_setup(cortex_a8, didr);
+	retval = cortex_a8_dpm_setup(cortex_a8, didr);
+	if (retval != ERROR_OK)
+		return retval;
 
 	/* Setup Breakpoint Register Pairs */
 	cortex_a8->brp_num = ((didr >> 24) & 0x0F) + 1;

-----------------------------------------------------------------------

Summary of changes:
 src/target/adi_v5_jtag.c |    6 +++++-
 src/target/cortex_a8.c   |   14 +++++++++++---
 2 files changed, 16 insertions(+), 4 deletions(-)


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