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[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-224-g3650981
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From: Spencer O. <nt...@us...> - 2010-05-11 13:49:25
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3650981de7e5854b5023fddeb1a4656794a0aae0 (commit)
via 2ae192699f5aaa911a874b85669fc803e4a29804 (commit)
via bbc8f4e6cec361a34028dad4b5000c136f4f48b2 (commit)
from cf811d8e6b7228348658f9211e0628fb725c5466 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 3650981de7e5854b5023fddeb1a4656794a0aae0
Author: Spencer Oliver <nt...@us...>
Date: Mon May 10 14:15:12 2010 +0100
mips32: 20 second timeout/megabyte for CRC check
There was a fixed 20 second timeout which is too little
for large, slow timeout checks.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/target/mips32.c b/src/target/mips32.c
index de8253f..0923a79 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -662,8 +662,10 @@ int mips32_checksum_memory(struct target *target, uint32_t address,
init_reg_param(®_params[1], "a1", 32, PARAM_OUT);
buf_set_u32(reg_params[1].value, 0, 32, count);
+ int timeout = 20000 * (1 + (count / (1024 * 1024)));
+
if ((retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
- crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code)-4), 10000,
+ crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code)-4), timeout,
&mips32_info)) != ERROR_OK)
{
destroy_reg_param(®_params[0]);
commit 2ae192699f5aaa911a874b85669fc803e4a29804
Author: Spencer Oliver <nt...@us...>
Date: Mon May 10 14:14:57 2010 +0100
armv7m: 20 second timeout/megabyte for CRC check
There was a fixed 20 second timeout which is too little
for large, slow timeout checks.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 83335a5..bd5aa14 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -615,8 +615,10 @@ int armv7m_checksum_memory(struct target *target,
buf_set_u32(reg_params[0].value, 0, 32, address);
buf_set_u32(reg_params[1].value, 0, 32, count);
+ int timeout = 20000 * (1 + (count / (1024 * 1024)));
+
if ((retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
- crc_algorithm->address, crc_algorithm->address + (sizeof(cortex_m3_crc_code)-6), 20000, &armv7m_info)) != ERROR_OK)
+ crc_algorithm->address, crc_algorithm->address + (sizeof(cortex_m3_crc_code)-6), timeout, &armv7m_info)) != ERROR_OK)
{
LOG_ERROR("error executing cortex_m3 crc algorithm");
destroy_reg_param(®_params[0]);
commit bbc8f4e6cec361a34028dad4b5000c136f4f48b2
Author: Spencer Oliver <nt...@us...>
Date: Mon May 10 12:23:41 2010 +0100
cfi: add Numonyx M29W128G reset workaround
The ST/Numonix M29W128G has an issue when a 0xff cmd is sent,
it cause an internal undefined state. The workaround according
to the Numonyx is to send another 0xf0 reset cmd
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 4ef41b9..aa4540a 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -104,7 +104,6 @@ static __inline__ uint32_t flash_address(struct flash_bank *bank, int sector, ui
}
return bank->base + bank->sectors[sector].offset + offset * bank->bus_width;
}
-
}
static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf)
@@ -232,6 +231,35 @@ static uint32_t cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offs
data[(3 * bank->bus_width) - 1] << 16 | data[(4 * bank->bus_width) - 1] << 24;
}
+static int cfi_reset(struct flash_bank *bank)
+{
+ struct cfi_flash_bank *cfi_info = bank->driver_priv;
+ int retval = ERROR_OK;
+
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
+ {
+ return retval;
+ }
+
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
+ {
+ return retval;
+ }
+
+ if (cfi_info->manufacturer == 0x20 &&
+ (cfi_info->device_id == 0x227E || cfi_info->device_id == 0x7E))
+ {
+ /* Numonix M29W128G is cmd 0xFF intolerant - causes internal undefined state
+ * so we send an extra 0xF0 reset to fix the bug */
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x00))) != ERROR_OK)
+ {
+ return retval;
+ }
+ }
+
+ return retval;
+}
+
static void cfi_intel_clear_status_register(struct flash_bank *bank)
{
struct target *target = bank->target;
@@ -335,11 +363,7 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank)
if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
{
- if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
- {
- return retval;
- }
- if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
+ if ((retval = cfi_reset(bank)) != ERROR_OK)
{
return retval;
}
@@ -1977,11 +2001,7 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
}
/* return to read array mode, so we can read from flash again for padding */
- if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
- {
- return retval;
- }
- if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
+ if ((retval = cfi_reset(bank)) != ERROR_OK)
{
return retval;
}
@@ -2015,11 +2035,7 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
}
/* return to read array mode */
- if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
- {
- return retval;
- }
- return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
+ return cfi_reset(bank);
}
static void cfi_fixup_atmel_reversed_erase_regions(struct flash_bank *bank, void *param)
@@ -2083,11 +2099,7 @@ static int cfi_query_string(struct flash_bank *bank, int address)
if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y'))
{
- if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
- {
- return retval;
- }
- if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
+ if ((retval = cfi_reset(bank)) != ERROR_OK)
{
return retval;
}
@@ -2168,11 +2180,7 @@ static int cfi_probe(struct flash_bank *bank)
LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id);
/* switch back to read array mode */
- if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x00))) != ERROR_OK)
- {
- return retval;
- }
- if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x00))) != ERROR_OK)
+ if ((retval = cfi_reset(bank)) != ERROR_OK)
{
return retval;
}
@@ -2289,11 +2297,7 @@ static int cfi_probe(struct flash_bank *bank)
/* return to read array mode
* we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command
*/
- if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
- {
- return retval;
- }
- if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
+ if ((retval = cfi_reset(bank)) != ERROR_OK)
{
return retval;
}
@@ -2377,7 +2381,6 @@ static int cfi_auto_probe(struct flash_bank *bank)
return cfi_probe(bank);
}
-
static int cfi_intel_protect_check(struct flash_bank *bank)
{
int retval;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/cfi.c | 67 ++++++++++++++++++++++++++------------------------
src/target/armv7m.c | 4 ++-
src/target/mips32.c | 4 ++-
3 files changed, 41 insertions(+), 34 deletions(-)
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Main OpenOCD repository
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