[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-86-ga540033

[David B. <dbr...@us...>]

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- Log -----------------------------------------------------------------
commit a540033a71eb0b10bb8de85963781ec1b9c06cf1
Author: David Brownell <dbr...@us...>
Date:   Mon Mar 15 08:43:16 2010 -0700

    move "reset_config" out of JTAG command group
    
    The SRST configuration options are not specific to JTAG, so this
    command may be needed with non-JTAG debug sessions.  Just move
    the command to a different group.
    
    (The TRST options are, however, clearly JTAG-specific, but for
    compatibility, they're now left alone.  The flags they control
    could later be disabled in non-JTAG sessions.)
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 686eb3e..90081cd 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1645,6 +1645,17 @@ static const struct command_registration interface_command_handlers[] = {
 		.mode = COMMAND_ANY,
 		.help = "List all built-in debug adapter interfaces (drivers)",
 	},
+	{
+		.name = "reset_config",
+		.handler = handle_reset_config_command,
+		.mode = COMMAND_ANY,
+		.help = "configure adapter reset behavior",
+		.usage = "[none|trst_only|srst_only|trst_and_srst] "
+			"[srst_pulls_trst|trst_pulls_srst|combined|separate] "
+			"[srst_gates_jtag|srst_nogate] "
+			"[trst_push_pull|trst_open_drain] "
+			"[srst_push_pull|srst_open_drain]",
+	},
 	COMMAND_REGISTRATION_DONE
 };
 
@@ -1670,17 +1681,6 @@ static const struct command_registration jtag_command_handlers[] = {
 		.usage = "[fallback_speed_khz]",
 	},
 	{
-		.name = "reset_config",
-		.handler = handle_reset_config_command,
-		.mode = COMMAND_ANY,
-		.help = "configure JTAG reset behavior",
-		.usage = "[none|trst_only|srst_only|trst_and_srst] "
-			"[srst_pulls_trst|trst_pulls_srst|combined|separate] "
-			"[srst_gates_jtag|srst_nogate] "
-			"[trst_push_pull|trst_open_drain] "
-			"[srst_push_pull|srst_open_drain]",
-	},
-	{
 		.name = "jtag_ntrst_delay",
 		.handler = handle_jtag_ntrst_delay_command,
 		.mode = COMMAND_ANY,

commit 1bd3ae398646da1107e00e0651abbf9691d2d9ff
Author: David Brownell <dbr...@us...>
Date:   Mon Mar 15 08:42:26 2010 -0700

    rename jtag_nsrst_assert_width as adapter_nsrst_assert_width
    
    Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width",
    and move it out of the "jtag" command group ...  it needs to be used with
    non-JTAG transports
    
    Includes a migration aid (in jtag/startup.tcl) so that old user scripts
    won't break.  That aid should Sunset in about a year.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/NEWS b/NEWS
index 924ee37..cc2560b 100644
--- a/NEWS
+++ b/NEWS
@@ -11,6 +11,7 @@ JTAG Layer:
 	   will not be around forever.
 	   	jtag_khz	... is now adapter_khz
 		jtag_nsrst_delay ... is now adapter_nsrst_delay
+		jtag_nsrst_assert_width ... is now adapter_nsrst_assert_width
 
 Boundary Scan:
 
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 9d1532b..e1bb2b7 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2643,7 +2643,7 @@ needing to cope with both architecture and board specific constraints.
 
 @section Commands for Handling Resets
 
-@deffn {Command} jtag_nsrst_assert_width milliseconds
+@deffn {Command} adapter_nsrst_assert_width milliseconds
 Minimum amount of time (in milliseconds) OpenOCD should wait
 after asserting nSRST (active-low system reset) before
 allowing it to be deasserted.
diff --git a/src/jtag/core.c b/src/jtag/core.c
index bb11ff1..9792280 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -95,7 +95,7 @@ static int jtag_verify = 1;
 /* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
 static int adapter_nsrst_delay = 0; /* default to no nSRST delay */
 static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
-static int jtag_nsrst_assert_width = 0; /* width of assertion */
+static int adapter_nsrst_assert_width = 0; /* width of assertion */
 static int jtag_ntrst_assert_width = 0; /* width of assertion */
 
 /**
@@ -699,8 +699,8 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
 		if (jtag_srst)
 		{
 			LOG_DEBUG("SRST line asserted");
-			if (jtag_nsrst_assert_width)
-				jtag_add_sleep(jtag_nsrst_assert_width * 1000);
+			if (adapter_nsrst_assert_width)
+				jtag_add_sleep(adapter_nsrst_assert_width * 1000);
 		}
 		else {
 			LOG_DEBUG("SRST line released");
@@ -1714,11 +1714,11 @@ unsigned jtag_get_ntrst_delay(void)
 
 void jtag_set_nsrst_assert_width(unsigned delay)
 {
-	jtag_nsrst_assert_width = delay;
+	adapter_nsrst_assert_width = delay;
 }
 unsigned jtag_get_nsrst_assert_width(void)
 {
-	return jtag_nsrst_assert_width;
+	return adapter_nsrst_assert_width;
 }
 void jtag_set_ntrst_assert_width(unsigned delay)
 {
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 42fbe4f..3a36886 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -84,4 +84,6 @@ proc srst_asserted {} {
 #
 proc jtag_khz args { eval adapter_khz $args }
 proc jtag_nsrst_delay args { eval adapter_nsrst_delay $args }
+proc jtag_nsrst_assert_width args { eval adapter_nsrst_assert_width $args }
+
 # END MIGRATION AIDS
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index d587922..686eb3e 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1321,7 +1321,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_delay_command)
 	return ERROR_OK;
 }
 
-COMMAND_HANDLER(handle_jtag_nsrst_assert_width_command)
+COMMAND_HANDLER(handle_adapter_nsrst_assert_width_command)
 {
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1332,7 +1332,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_assert_width_command)
 
 		jtag_set_nsrst_assert_width(delay);
 	}
-	command_print(CMD_CTX, "jtag_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
+	command_print(CMD_CTX, "adapter_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
 	return ERROR_OK;
 }
 
@@ -1619,10 +1619,17 @@ static const struct command_registration interface_command_handlers[] = {
 		.usage = "[khz]",
 	},
 	{
+		.name = "adapter_nsrst_assert_width",
+		.handler = handle_adapter_nsrst_assert_width_command,
+		.mode = COMMAND_ANY,
+		.help = "delay after asserting SRST in ms",
+		.usage = "[milliseconds]",
+	},
+	{
 		.name = "adapter_nsrst_delay",
 		.handler = handle_adapter_nsrst_delay_command,
 		.mode = COMMAND_ANY,
-		.help = "delay after deasserting srst in ms",
+		.help = "delay after deasserting SRST in ms",
 		.usage = "[milliseconds]",
 	},
 	{
@@ -1681,13 +1688,6 @@ static const struct command_registration jtag_command_handlers[] = {
 		.usage = "[milliseconds]",
 	},
 	{
-		.name = "jtag_nsrst_assert_width",
-		.handler = handle_jtag_nsrst_assert_width_command,
-		.mode = COMMAND_ANY,
-		.help = "delay after asserting srst in ms",
-		.usage = "[milliseconds]",
-	},
-	{
 		.name = "jtag_ntrst_assert_width",
 		.handler = handle_jtag_ntrst_assert_width_command,
 		.mode = COMMAND_ANY,
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index 80040b1..a60cb02 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -13,7 +13,7 @@ source [find target/c100helper.tcl]
 # use libftdi.so library instead with this script
 # make the reset asserted to
 # allow RC circuit to discharge for: [ms]
-jtag_nsrst_assert_width 100
+adapter_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
 # don't talk to JTAG after reset for: [ms]
 adapter_nsrst_delay 100
diff --git a/tcl/target/telo.cfg b/tcl/target/telo.cfg
index 40674b9..aa9ff22 100644
--- a/tcl/target/telo.cfg
+++ b/tcl/target/telo.cfg
@@ -13,7 +13,7 @@ source [find target/c100helper.tcl]
 # use libftdi.so library instead with this script
 # make the reset asserted to
 # allow RC circuit to discharge for: [ms]
-jtag_nsrst_assert_width 100
+adapter_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
 # don't talk to JTAG after reset for: [ms]
 adapter_nsrst_delay 100

commit b559b273b526b3077b3ca219eecc8df9f86efac0
Author: David Brownell <dbr...@us...>
Date:   Mon Mar 15 08:41:30 2010 -0700

    rename jtag_nsrst_delay as adapter_nsrst_delay
    
    Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
    out of the "jtag" command group ...  it needs to be used with non-JTAG
    transports
    
    Includes a migration aid (in jtag/startup.tcl) so that old user scripts
    won't break.  That aid should Sunset in about a year.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/NEWS b/NEWS
index 4e093dc..924ee37 100644
--- a/NEWS
+++ b/NEWS
@@ -10,6 +10,7 @@ JTAG Layer:
 	   convert your scripts to the new names, since those procedures
 	   will not be around forever.
 	   	jtag_khz	... is now adapter_khz
+		jtag_nsrst_delay ... is now adapter_nsrst_delay
 
 Boundary Scan:
 
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 5a1e095..9d1532b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2603,7 +2603,7 @@ stops issuing the reset.  For example, there may be chip or board
 requirements that all reset pulses last for at least a
 certain amount of time; and reset buttons commonly have
 hardware debouncing.
-Use the @command{jtag_nsrst_delay} and @command{jtag_ntrst_delay}
+Use the @command{adapter_nsrst_delay} and @command{jtag_ntrst_delay}
 commands to say when extra delays are needed.
 
 @item @emph{Drive type} ... Reset lines often have a pullup
@@ -2649,7 +2649,7 @@ after asserting nSRST (active-low system reset) before
 allowing it to be deasserted.
 @end deffn
 
-@deffn {Command} jtag_nsrst_delay milliseconds
+@deffn {Command} adapter_nsrst_delay milliseconds
 How long (in milliseconds) OpenOCD should wait after deasserting
 nSRST (active-low system reset) before starting new JTAG operations.
 When a board has a reset button connected to SRST line it will
diff --git a/src/jtag/core.c b/src/jtag/core.c
index bdf968e..bb11ff1 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -93,7 +93,7 @@ static bool jtag_verify_capture_ir = true;
 static int jtag_verify = 1;
 
 /* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
-static int jtag_nsrst_delay = 0; /* default to no nSRST delay */
+static int adapter_nsrst_delay = 0; /* default to no nSRST delay */
 static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
 static int jtag_nsrst_assert_width = 0; /* width of assertion */
 static int jtag_ntrst_assert_width = 0; /* width of assertion */
@@ -704,8 +704,8 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
 		}
 		else {
 			LOG_DEBUG("SRST line released");
-			if (jtag_nsrst_delay)
-				jtag_add_sleep(jtag_nsrst_delay * 1000);
+			if (adapter_nsrst_delay)
+				jtag_add_sleep(adapter_nsrst_delay * 1000);
 		}
 	}
 
@@ -1696,11 +1696,11 @@ int jtag_get_srst(void)
 
 void jtag_set_nsrst_delay(unsigned delay)
 {
-	jtag_nsrst_delay = delay;
+	adapter_nsrst_delay = delay;
 }
 unsigned jtag_get_nsrst_delay(void)
 {
-	return jtag_nsrst_delay;
+	return adapter_nsrst_delay;
 }
 void jtag_set_ntrst_delay(unsigned delay)
 {
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index c49c43e..42fbe4f 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -83,4 +83,5 @@ proc srst_asserted {} {
 # FIXME phase these aids out after about April 2011
 #
 proc jtag_khz args { eval adapter_khz $args }
+proc jtag_nsrst_delay args { eval adapter_nsrst_delay $args }
 # END MIGRATION AIDS
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 8faefd1..d587922 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1291,7 +1291,7 @@ next:
 	return ERROR_OK;
 }
 
-COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
+COMMAND_HANDLER(handle_adapter_nsrst_delay_command)
 {
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1302,7 +1302,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
 
 		jtag_set_nsrst_delay(delay);
 	}
-	command_print(CMD_CTX, "jtag_nsrst_delay: %u", jtag_get_nsrst_delay());
+	command_print(CMD_CTX, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
 	return ERROR_OK;
 }
 
@@ -1619,6 +1619,13 @@ static const struct command_registration interface_command_handlers[] = {
 		.usage = "[khz]",
 	},
 	{
+		.name = "adapter_nsrst_delay",
+		.handler = handle_adapter_nsrst_delay_command,
+		.mode = COMMAND_ANY,
+		.help = "delay after deasserting srst in ms",
+		.usage = "[milliseconds]",
+	},
+	{
 		.name = "interface",
 		.handler = handle_interface_command,
 		.mode = COMMAND_CONFIG,
@@ -1667,13 +1674,6 @@ static const struct command_registration jtag_command_handlers[] = {
 			"[srst_push_pull|srst_open_drain]",
 	},
 	{
-		.name = "jtag_nsrst_delay",
-		.handler = handle_jtag_nsrst_delay_command,
-		.mode = COMMAND_ANY,
-		.help = "delay after deasserting srst in ms",
-		.usage = "[milliseconds]",
-	},
-	{
 		.name = "jtag_ntrst_delay",
 		.handler = handle_jtag_ntrst_delay_command,
 		.mode = COMMAND_ANY,
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index f24f1a1..c3eb952 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 # affected by the board and type of JTAG adapter.  A value of 200 ms seems
 # to work reliably for the configuration listed in the file header above.
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).
diff --git a/tcl/board/crossbow_tech_imote2.cfg b/tcl/board/crossbow_tech_imote2.cfg
index 88d4aa7..002b537 100644
--- a/tcl/board/crossbow_tech_imote2.cfg
+++ b/tcl/board/crossbow_tech_imote2.cfg
@@ -4,7 +4,7 @@ set  CHIPNAME imote2
 source [find target/pxa270.cfg]
 
 # longer-than-normal reset delay
-jtag_nsrst_delay 800
+adapter_nsrst_delay 800
 
 reset_config trst_and_srst separate
 
diff --git a/tcl/board/csb732.cfg b/tcl/board/csb732.cfg
index cad38e2..4d6f0e4 100644
--- a/tcl/board/csb732.cfg
+++ b/tcl/board/csb732.cfg
@@ -3,7 +3,7 @@ source [find target/imx35.cfg]
 
 # Determined by trial and error
 reset_config trst_and_srst combined
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 $_TARGETNAME configure -event gdb-attach { reset init }
diff --git a/tcl/board/digi_connectcore_wi-9c.cfg b/tcl/board/digi_connectcore_wi-9c.cfg
index 2d82376..ad40d53 100644
--- a/tcl/board/digi_connectcore_wi-9c.cfg
+++ b/tcl/board/digi_connectcore_wi-9c.cfg
@@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
 set _TARGETNAME $_CHIPNAME.cpu
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 0
 
 
diff --git a/tcl/board/ek-lm3s1968.cfg b/tcl/board/ek-lm3s1968.cfg
index 6ce7f7f..28066f3 100644
--- a/tcl/board/ek-lm3s1968.cfg
+++ b/tcl/board/ek-lm3s1968.cfg
@@ -16,7 +16,7 @@ source [find target/lm3s1968.cfg]
 # jtag speed
 adapter_khz 3000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #LM3S1968 Evaluation Board has only srst
 reset_config srst_only
diff --git a/tcl/board/ek-lm3s811.cfg b/tcl/board/ek-lm3s811.cfg
index 078cae1..7d3f2ce 100644
--- a/tcl/board/ek-lm3s811.cfg
+++ b/tcl/board/ek-lm3s811.cfg
@@ -12,7 +12,7 @@ source [find target/lm3s811.cfg]
 # jtag speed
 adapter_khz 500
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #LM3S811 Evaluation Board has only srst
 reset_config srst_only
diff --git a/tcl/board/ek-lm3s9b9x.cfg b/tcl/board/ek-lm3s9b9x.cfg
index b8be88b..fb6272a 100644
--- a/tcl/board/ek-lm3s9b9x.cfg
+++ b/tcl/board/ek-lm3s9b9x.cfg
@@ -11,7 +11,7 @@ source [find target/lm3s9b9x.cfg]
 # jtag speed
 adapter_khz 500
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #LM3S9B9x Evaluation Board has only srst
 reset_config srst_only
diff --git a/tcl/board/ethernut3.cfg b/tcl/board/ethernut3.cfg
index 359cb0b..34e9b72 100644
--- a/tcl/board/ethernut3.cfg
+++ b/tcl/board/ethernut3.cfg
@@ -20,7 +20,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
 # Micrel MIC2775-29YM5 Supervisor
 # Reset output will remain active for 280ms (maximum)
 #
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
 jtag_ntrst_delay 300
 
 
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 35cc7d0..d9ca110 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -2,7 +2,7 @@
 # http://www.hitex.com/
 
 # Delays on reset lines
-jtag_nsrst_delay 50
+adapter_nsrst_delay 50
 jtag_ntrst_delay 1
 
 # Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg
index ade24f6..4d1bb2e 100644
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -7,7 +7,7 @@ source [find interface/hitex_str9-comstick.cfg]
 # set jtag speed
 adapter_khz 3000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst
diff --git a/tcl/board/lubbock.cfg b/tcl/board/lubbock.cfg
index 32af386..095c60a 100644
--- a/tcl/board/lubbock.cfg
+++ b/tcl/board/lubbock.cfg
@@ -4,7 +4,7 @@
 
 source [find target/pxa255.cfg]
 
-jtag_nsrst_delay 250
+adapter_nsrst_delay 250
 jtag_ntrst_delay 250
 
 # NOTE: until after pinmux and such are set up, only CS0 is
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index b053c22..1688965 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -112,7 +112,7 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
 $_TARGETNAME configure -work-area-phys 0x40000000  -work-area-size 0x4000 -work-area-backup 1
 
 #reset configuration
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 reset_config trst_and_srst
 
@@ -141,7 +141,7 @@ reset_config trst_and_srst
 
     nand device s3c2440 0
 
-    jtag_nsrst_delay 100
+    adapter_nsrst_delay 100
     jtag_ntrst_delay 100
     reset_config trst_and_srst
     init
diff --git a/tcl/board/phytec_lpc3250.cfg b/tcl/board/phytec_lpc3250.cfg
index 51622ef..6a7e8e9 100644
--- a/tcl/board/phytec_lpc3250.cfg
+++ b/tcl/board/phytec_lpc3250.cfg
@@ -1,6 +1,6 @@
 source [find target/lpc3250.cfg]
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 1
 adapter_khz 200
 reset_config trst_and_srst separate
diff --git a/tcl/board/pxa255_sst.cfg b/tcl/board/pxa255_sst.cfg
index ce90387..44f34ca 100644
--- a/tcl/board/pxa255_sst.cfg
+++ b/tcl/board/pxa255_sst.cfg
@@ -93,7 +93,7 @@ $_TARGETNAME configure -event reset-init {pxa255_sst_init}
 
 reset_config trst_and_srst
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 #xscale debug_handler 0  0xFFFF0800      # debug handler base address
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index cb4bc2a..80040b1 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
 jtag_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
 # don't talk to JTAG after reset for: [ms]
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 reset_config trst_and_srst separate
 
diff --git a/tcl/interface/calao-usb-a9260.cfg b/tcl/interface/calao-usb-a9260.cfg
index a9d7dec..5fae2f3 100644
--- a/tcl/interface/calao-usb-a9260.cfg
+++ b/tcl/interface/calao-usb-a9260.cfg
@@ -6,6 +6,6 @@
 # See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg.
 #
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
diff --git a/tcl/target/aduc702x.cfg b/tcl/target/aduc702x.cfg
index 50b2a0d..d58b723 100644
--- a/tcl/target/aduc702x.cfg
+++ b/tcl/target/aduc702x.cfg
@@ -17,7 +17,7 @@ if { [info exists CPUTAPID] } {
    set  _CPUTAPID 0x3f0f0f0f
 }
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 ## JTAG scan chain
diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg
index 2038331..126efe4 100644
--- a/tcl/target/ar71xx.cfg
+++ b/tcl/target/ar71xx.cfg
@@ -1,7 +1,7 @@
 # Atheros AR71xx MIPS 24Kc SoC.
 # tested on PB44 refererence board
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 reset_config trst_and_srst
diff --git a/tcl/target/at91sam9260.cfg b/tcl/target/at91sam9260.cfg
index df08d10..86258c6 100644
--- a/tcl/target/at91sam9260.cfg
+++ b/tcl/target/at91sam9260.cfg
@@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
 #
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
 jtag_ntrst_delay 200
 
 jtag_rclk 3
diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index 0359540..034a348 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -30,7 +30,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst
 
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 
diff --git a/tcl/target/at91sam9rl.cfg b/tcl/target/at91sam9rl.cfg
index 6db1826..5ee5c49 100644
--- a/tcl/target/at91sam9rl.cfg
+++ b/tcl/target/at91sam9rl.cfg
@@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
 #
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
 jtag_ntrst_delay 200
 
 jtag_rclk 3
diff --git a/tcl/target/dragonite.cfg b/tcl/target/dragonite.cfg
index d2e7e32..7e85624 100644
--- a/tcl/target/dragonite.cfg
+++ b/tcl/target/dragonite.cfg
@@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME
 
 reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
diff --git a/tcl/target/epc9301.cfg b/tcl/target/epc9301.cfg
index 7e4599d..d2dc7ec 100644
--- a/tcl/target/epc9301.cfg
+++ b/tcl/target/epc9301.cfg
@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 set _TARGETNAME $_CHIPNAME.cpu
diff --git a/tcl/target/feroceon.cfg b/tcl/target/feroceon.cfg
index b707770..e90165b 100644
--- a/tcl/target/feroceon.cfg
+++ b/tcl/target/feroceon.cfg
@@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
 
 reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg
index 46b4f94..3af6383 100644
--- a/tcl/target/imx31.cfg
+++ b/tcl/target/imx31.cfg
@@ -3,7 +3,7 @@
 
 reset_config trst_and_srst srst_gates_jtag
 
-jtag_nsrst_delay 5
+adapter_nsrst_delay 5
 
 if { [info exists CHIPNAME] } {
    set  _CHIPNAME $CHIPNAME
diff --git a/tcl/target/lm3s6965.cfg b/tcl/target/lm3s6965.cfg
index c6e623e..137cba9 100644
--- a/tcl/target/lm3s6965.cfg
+++ b/tcl/target/lm3s6965.cfg
@@ -15,7 +15,7 @@ if { [info exists CPUTAPID ] } {
 # jtag speed
 adapter_khz 500
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #LM3S6965 Evaluation Board has only srst
diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg
index 182fb89..82a097f 100644
--- a/tcl/target/lpc1768.cfg
+++ b/tcl/target/lpc1768.cfg
@@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # LPC2000 & LPC1700 -> SRST causes TRST
diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg
index 13535f5..2ebe91a 100644
--- a/tcl/target/lpc2103.cfg
+++ b/tcl/target/lpc2103.cfg
@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst srst_pulls_trst
 
 # reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg
index ce55952..1b60c15 100644
--- a/tcl/target/lpc2124.cfg
+++ b/tcl/target/lpc2124.cfg
@@ -24,7 +24,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst srst_pulls_trst
 
 # reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 adapter_khz 1000
diff --git a/tcl/target/lpc2129.cfg b/tcl/target/lpc2129.cfg
index 287fa5d..5b2a2f7 100644
--- a/tcl/target/lpc2129.cfg
+++ b/tcl/target/lpc2129.cfg
@@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
 reset_config trst_and_srst srst_pulls_trst
 
 # reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #jtag scan chain
diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg
index cf6287c..502a355 100644
--- a/tcl/target/lpc2148.cfg
+++ b/tcl/target/lpc2148.cfg
@@ -21,7 +21,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0x4f1f0f0f
 }
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
diff --git a/tcl/target/lpc2294.cfg b/tcl/target/lpc2294.cfg
index d43d740..9ac3c6c 100644
--- a/tcl/target/lpc2294.cfg
+++ b/tcl/target/lpc2294.cfg
@@ -17,7 +17,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0xffffffff
 }
 
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index 7eb0dab..1a42e07 100644
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # LPC2000 -> SRST causes TRST
diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg
index d0bff1a..950ef63 100644
--- a/tcl/target/lpc2478.cfg
+++ b/tcl/target/lpc2478.cfg
@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 # LPC2000 -> SRST causes TRST
diff --git a/tcl/target/mega128.cfg b/tcl/target/mega128.cfg
index 697ec45..bb7cdee 100644
--- a/tcl/target/mega128.cfg
+++ b/tcl/target/mega128.cfg
@@ -7,7 +7,7 @@
 adapter_khz 4500
 
 reset_config  srst_only
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 #jtag scan chain
 if { [info exists CPUTAPID ] } {
diff --git a/tcl/target/netx500.cfg b/tcl/target/netx500.cfg
index 90315af..04a267b 100644
--- a/tcl/target/netx500.cfg
+++ b/tcl/target/netx500.cfg
@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
 
 # FIXME most reset config belongs in board code
 reset_config trst_and_srst
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 # jtag scan chain
diff --git a/tcl/target/omap5912.cfg b/tcl/target/omap5912.cfg
index d825df7..ed64f52 100644
--- a/tcl/target/omap5912.cfg
+++ b/tcl/target/omap5912.cfg
@@ -14,7 +14,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0x0692602f
 }
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 
 # NOTE:  presumes irlen 38 is the C55x DSP, matching BSDL for
 # its standalone siblings (like TMS320VC5502) of the same era
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index d77c3a8..8c9a93d 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -26,7 +26,7 @@ if { [info exists WORKAREASIZE] } {
 }
 
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
diff --git a/tcl/target/pxa270.cfg b/tcl/target/pxa270.cfg
index 6ca057c..7aaef8c 100644
--- a/tcl/target/pxa270.cfg
+++ b/tcl/target/pxa270.cfg
@@ -28,9 +28,9 @@ if { [info exists CPUTAPID2 ] } {
 }
 
 
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# set adapter_nsrst_delay to the delay introduced by your reset circuit
 # the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
+adapter_nsrst_delay 260
 # set the jtag_ntrst_delay to the delay introduced by a reset circuit
 # the rest of the needed delays are built into the openocd program
 jtag_ntrst_delay 250
diff --git a/tcl/target/pxa3xx.cfg b/tcl/target/pxa3xx.cfg
index 5d64986..62c325b 100644
--- a/tcl/target/pxa3xx.cfg
+++ b/tcl/target/pxa3xx.cfg
@@ -59,9 +59,9 @@ if { [info exists CPUTAPID_PXA32X_C0 ] } {
    set _CPUTAPID_PXA32X_C0 0x7E642013
 }
 
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# set adapter_nsrst_delay to the delay introduced by your reset circuit
 # the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
+adapter_nsrst_delay 260
 
 # set the jtag_ntrst_delay to the delay introduced by a reset circuit
 # the rest of the needed delays are built into the openocd program
diff --git a/tcl/target/samsung_s3c6410.cfg b/tcl/target/samsung_s3c6410.cfg
index 9137199..f9738c2 100644
--- a/tcl/target/samsung_s3c6410.cfg
+++ b/tcl/target/samsung_s3c6410.cfg
@@ -42,7 +42,7 @@ jtag newtap $_CHIPNAME cpu     -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN  -chain-position $_TARGETNAME -variant arm1176
 
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 #reset configuration
diff --git a/tcl/target/smp8634.cfg b/tcl/target/smp8634.cfg
index b6b037a..4f3959d 100644
--- a/tcl/target/smp8634.cfg
+++ b/tcl/target/smp8634.cfg
@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID 0x08630001
 }
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 reset_config trst_and_srst separate
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 29c9f7f..a13dc31 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -23,7 +23,7 @@ if { [info exists WORKAREASIZE] } {
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
 adapter_khz 1000
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #jtag scan chain
diff --git a/tcl/target/str730.cfg b/tcl/target/str730.cfg
index 3a84897..a1491ff 100644
--- a/tcl/target/str730.cfg
+++ b/tcl/target/str730.cfg
@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 #jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 set _TARGETNAME $_CHIPNAME.cpu
diff --git a/tcl/target/str750.cfg b/tcl/target/str750.cfg
index c2fb786..8a64226 100644
--- a/tcl/target/str750.cfg
+++ b/tcl/target/str750.cfg
@@ -29,7 +29,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 #jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 set _TARGETNAME $_CHIPNAME.cpu
diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg
index 2defe9f..6f2981a 100644
--- a/tcl/target/str912.cfg
+++ b/tcl/target/str912.cfg
@@ -15,7 +15,7 @@ if { [info exists ENDIAN] } {
 # jtag speed. We need to stick to 16kHz until we've finished reset.
 jtag_rclk 16
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
diff --git a/tcl/target/telo.cfg b/tcl/target/telo.cfg
index 99b9cd6..40674b9 100644
--- a/tcl/target/telo.cfg
+++ b/tcl/target/telo.cfg
@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
 jtag_nsrst_assert_width 100
 jtag_ntrst_assert_width 100
 # don't talk to JTAG after reset for: [ms]
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 reset_config trst_and_srst separate
 
diff --git a/tcl/target/tmpa900.cfg b/tcl/target/tmpa900.cfg
index 329e03c..a551391 100644
--- a/tcl/target/tmpa900.cfg
+++ b/tcl/target/tmpa900.cfg
@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst
-jtag_nsrst_delay 20
+adapter_nsrst_delay 20
 jtag_ntrst_delay 20
 
 ######################
diff --git a/tcl/target/tmpa910.cfg b/tcl/target/tmpa910.cfg
index 29d2d6e..fa6f87b 100644
--- a/tcl/target/tmpa910.cfg
+++ b/tcl/target/tmpa910.cfg
@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst
-jtag_nsrst_delay 20
+adapter_nsrst_delay 20
 jtag_ntrst_delay 20
 
 ######################
diff --git a/tcl/target/xba_revA3.cfg b/tcl/target/xba_revA3.cfg
index fb02c68..8ff5be9 100644
--- a/tcl/target/xba_revA3.cfg
+++ b/tcl/target/xba_revA3.cfg
@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
 
 reset_config trst_and_srst separate
 
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
 #jtag scan chain
diff --git a/tcl/test/syntax1.cfg b/tcl/test/syntax1.cfg
index c3d8ed9..79d5384 100644
--- a/tcl/test/syntax1.cfg
+++ b/tcl/test/syntax1.cfg
@@ -1,4 +1,4 @@
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 #use combined on interfaces or targets that can't set TRST/SRST separately

commit 96f9790279f74f39b35fc3ad09340fd03123180c
Author: David Brownell <dbr...@us...>
Date:   Mon Mar 15 08:37:43 2010 -0700

    rename jtag_khz as adapter_khz
    
    Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
    command group ...  it needs to be used with non-JTAG transports
    
    Includes a migration aid (in jtag/startup.tcl) so that old user scripts
    won't break.  That aid should Sunset in about a year.  (We may want to
    update it to include a nag message too.)
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/NEWS b/NEWS
index 77435e1..4e093dc 100644
--- a/NEWS
+++ b/NEWS
@@ -5,6 +5,11 @@ and other issues not mentioned here.
 
 JTAG Layer:
 	New driver for "Bus Pirate"
+	Rename various commands so they're not JTAG-specific
+	   There are migration procedures for these, but you should
+	   convert your scripts to the new names, since those procedures
+	   will not be around forever.
+	   	jtag_khz	... is now adapter_khz
 
 Boundary Scan:
 
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 93757d4..5a1e095 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -1516,7 +1516,7 @@ solution just avoids using that instruction with JTAG debuggers.
 If both the chip and the board support adaptive clocking,
 use the @command{jtag_rclk}
 command, in case your board is used with JTAG adapter which
-also supports it.  Otherwise use @command{jtag_khz}.
+also supports it.  Otherwise use @command{adapter_khz}.
 Set the slow rate at the beginning of the reset sequence,
 and the faster rate as soon as the clocks are at full speed.
 
@@ -2342,7 +2342,7 @@ you may encounter a problem.
 @deffn Command {parport_toggling_time} [nanoseconds]
 Displays how many nanoseconds the hardware needs to toggle TCK;
 the parport driver uses this value to obey the
-@command{jtag_khz} configuration.
+@command{adapter_khz} configuration.
 When the optional @var{nanoseconds} parameter is given,
 that setting is changed before displaying the current value.
 
@@ -2353,7 +2353,7 @@ To measure the toggling time with a logic analyzer or a digital storage
 oscilloscope, follow the procedure below:
 @example
 > parport_toggling_time 1000
-> jtag_khz 500
+> adapter_khz 500
 @end example
 This sets the maximum JTAG clock speed of the hardware, but
 the actual speed probably deviates from the requested 500 kHz.
@@ -2364,14 +2364,14 @@ Update the setting to match your measurement:
 @example
 > parport_toggling_time <measured nanoseconds>
 @end example
-Now the clock speed will be a better match for @command{jtag_khz rate}
+Now the clock speed will be a better match for @command{adapter_khz rate}
 commands given in OpenOCD scripts and event handlers.
 
 You can do something similar with many digital multimeters, but note
 that you'll probably need to run the clock continuously for several
 seconds before it decides what clock rate to show.  Adjust the
 toggling time up or down until the measured clock rate is a good
-match for the jtag_khz rate you specified; be conservative.
+match for the adapter_khz rate you specified; be conservative.
 @end quotation
 @end deffn
 
@@ -2470,10 +2470,10 @@ However, it introduces delays to synchronize clocks; so it
 may not be the fastest solution.
 
 @b{NOTE:} Script writers should consider using @command{jtag_rclk}
-instead of @command{jtag_khz}, but only for (ARM) cores and boards
+instead of @command{adapter_khz}, but only for (ARM) cores and boards
 which support adaptive clocking.
 
-@deffn {Command} jtag_khz max_speed_kHz
+@deffn {Command} adapter_khz max_speed_kHz
 A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
 JTAG interfaces usually support a limited number of
 speeds.  The speed actually used won't be faster
@@ -3881,7 +3881,7 @@ the target clocks are fully set up.)
 before @command{reset_init} is called.
 
 This is the most robust place to use @command{jtag_rclk}
-or @command{jtag_khz} to switch to a low JTAG clock rate,
+or @command{adapter_khz} to switch to a low JTAG clock rate,
 when reset disables PLLs needed to use a fast clock.
 @ignore
 @item @b{reset-wait-pos}
@@ -7290,7 +7290,7 @@ To set the JTAG frequency use the command:
 
 @example
 # Example: 1.234MHz
-jtag_khz 1234
+adapter_khz 1234
 @end example
 
 
diff --git a/src/jtag/core.c b/src/jtag/core.c
index e7cb48d..bdf968e 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1556,7 +1556,7 @@ unsigned jtag_get_speed_khz(void)
 	return speed_khz;
 }
 
-static int jtag_khz_to_speed(unsigned khz, int* speed)
+static int adapter_khz_to_speed(unsigned khz, int* speed)
 {
 	LOG_DEBUG("convert khz to interface specific speed value");
 	speed_khz = khz;
@@ -1576,11 +1576,11 @@ static int jtag_khz_to_speed(unsigned khz, int* speed)
 
 static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int* speed)
 {
-	int retval = jtag_khz_to_speed(0, speed);
+	int retval = adapter_khz_to_speed(0, speed);
 	if ((ERROR_OK != retval) && fallback_speed_khz)
 	{
 		LOG_DEBUG("trying fallback speed...");
-		retval = jtag_khz_to_speed(fallback_speed_khz, speed);
+		retval = adapter_khz_to_speed(fallback_speed_khz, speed);
 	}
 	return retval;
 }
@@ -1598,7 +1598,7 @@ int jtag_config_khz(unsigned khz)
 	LOG_DEBUG("handle jtag khz");
 	clock_mode = CLOCK_MODE_KHZ;
 	int speed = 0;
-	int retval = jtag_khz_to_speed(khz, &speed);
+	int retval = adapter_khz_to_speed(khz, &speed);
 	return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
 }
 
@@ -1621,7 +1621,7 @@ int jtag_get_speed(void)
 			speed = jtag_speed;
 			break;
 		case CLOCK_MODE_KHZ:
-			jtag_khz_to_speed(jtag_get_speed_khz(), &speed);
+			adapter_khz_to_speed(jtag_get_speed_khz(), &speed);
 			break;
 		case CLOCK_MODE_RCLK:
 			jtag_rclk_to_speed(rclk_fallback_speed_khz, &speed);
diff --git a/src/jtag/drivers/presto.c b/src/jtag/drivers/presto.c
index 72126a1..10bed27 100644
--- a/src/jtag/drivers/presto.c
+++ b/src/jtag/drivers/presto.c
@@ -680,7 +680,7 @@ static struct bitq_interface presto_bitq = {
 
 /* -------------------------------------------------------------------------- */
 
-static int presto_jtag_khz(int khz, int *jtag_speed)
+static int presto_adapter_khz(int khz, int *jtag_speed)
 {
 	if (khz < 0)
 	{
@@ -797,7 +797,7 @@ struct jtag_interface presto_interface = {
 
 	.execute_queue = bitq_execute_queue,
 	.speed = presto_jtag_speed,
-	.khz = presto_jtag_khz,
+	.khz = presto_adapter_khz,
 	.speed_div = presto_jtag_speed_div,
 	.init = presto_jtag_init,
 	.quit = presto_jtag_quit,
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 4e6d5fc..c49c43e 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -75,3 +75,12 @@ add_help_text srst_deasserted "Overridable procedure run when srst deassert is d
 proc srst_asserted {} {
 	puts "Sensed nSRST asserted."
 }
+
+# BEGIN MIGRATION AIDS ...  these adapter operations originally had
+# JTAG-specific names despite the fact that the operations were not
+# specific to JTAG.
+#
+# FIXME phase these aids out after about April 2011
+#
+proc jtag_khz args { eval adapter_khz $args }
+# END MIGRATION AIDS
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index ce17e4b..8faefd1 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1351,7 +1351,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_assert_width_command)
 	return ERROR_OK;
 }
 
-COMMAND_HANDLER(handle_jtag_khz_command)
+COMMAND_HANDLER(handle_adapter_khz_command)
 {
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1609,6 +1609,16 @@ COMMAND_HANDLER(handle_tms_sequence_command)
 
 static const struct command_registration interface_command_handlers[] = {
 	{
+		.name = "adapter_khz",
+		.handler = handle_adapter_khz_command,
+		.mode = COMMAND_ANY,
+		.help = "With an argument, change to the specified maximum "
+			"jtag speed.  For JTAG, 0 KHz signifies adaptive "
+			" clocking. "
+			"With or without argument, display current setting.",
+		.usage = "[khz]",
+	},
+	{
 		.name = "interface",
 		.handler = handle_interface_command,
 		.mode = COMMAND_CONFIG,
@@ -1637,15 +1647,6 @@ int interface_register_commands(struct command_context *ctx)
 
 static const struct command_registration jtag_command_handlers[] = {
 	{
-		.name = "jtag_khz",
-		.handler = handle_jtag_khz_command,
-		.mode = COMMAND_ANY,
-		.help = "With an argument, change to the specified maximum "
-			"jtag speed.  Pass 0 to require adaptive clocking. "
-			"With or without argument, display current setting.",
-		.usage = "[khz]",
-	},
-	{
 		.name = "jtag_rclk",
 		.handler = handle_jtag_rclk_command,
 		.mode = COMMAND_ANY,
diff --git a/src/svf/svf.c b/src/svf/svf.c
index fba499c..6e951e2 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -880,7 +880,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
 			// TODO: set jtag speed to
 			if (svf_para.frequency > 0)
 			{
-				command_run_linef(cmd_ctx, "jtag_khz %d", (int)svf_para.frequency / 1000);
+				command_run_linef(cmd_ctx, "adapter_khz %d", (int)svf_para.frequency / 1000);
 				LOG_DEBUG("\tfrequency = %f", svf_para.frequency);
 			}
 		}
diff --git a/tcl/board/at91eb40a.cfg b/tcl/board/at91eb40a.cfg
index 40f2e12..14f21a1 100644
--- a/tcl/board/at91eb40a.cfg
+++ b/tcl/board/at91eb40a.cfg
@@ -65,4 +65,4 @@ $_TARGETNAME configure -event reset-init {
 }
 
 # This target is pretty snappy...
-jtag_khz 16000
+adapter_khz 16000
diff --git a/tcl/board/at91rm9200-dk.cfg b/tcl/board/at91rm9200-dk.cfg
index 9a6f89e..476f5a8 100644
--- a/tcl/board/at91rm9200-dk.cfg
+++ b/tcl/board/at91rm9200-dk.cfg
@@ -15,7 +15,7 @@ flash_bank cfi 0x10000000 0x00200000 2 2 0
 proc at91rm9200_dk_init { } {
     # Try to run at 1khz... Yea, that slow!
     # Chip is really running @ 32khz
-    jtag_khz 8
+    adapter_khz 8
 
     mww 0xfffffc64 0xffffffff
     ##  disable all clocks but system clock
@@ -41,7 +41,7 @@ proc at91rm9200_dk_init { } {
     #========================================
     # CPU now runs at 180mhz
     # SYS runs at 60mhz.
-    jtag_khz 40000
+    adapter_khz 40000
     #========================================
 
 
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index fb6068c..f24f1a1 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -77,7 +77,7 @@ proc at91sam9g20_init { } {
 	# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur.  The processor
 	# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.
 
-	jtag_khz 2			# Slow-speed oscillator enabled at reset, so run jtag speed slow.
+	adapter_khz 2			# Slow-speed oscillator enabled at reset, so run jtag speed slow.
 	halt				# Make sure processor is halted, or error will result in following steps.
 	mww 0xfffffd08 0xa5000501	# RSTC_MR : enable user reset.
 	mww 0xfffffd44 0x00008000	# WDT_MR : disable watchdog.
@@ -112,7 +112,7 @@ proc at91sam9g20_init { } {
 
 	# Switch over to adaptive clocking.
 
-	jtag_khz 0
+	adapter_khz 0
 
 	# Enable faster DCC downloads.
 
diff --git a/tcl/board/csb337.cfg b/tcl/board/csb337.cfg
index b7bce48..5e225f5 100644
--- a/tcl/board/csb337.cfg
+++ b/tcl/board/csb337.cfg
@@ -19,7 +19,7 @@ if { [info exists ETM_DRIVER] } {
 
 proc csb337_clk_init { } {
 	# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
-	jtag_khz 8
+	adapter_khz 8
 
 	# CKGR_MOR:  start main oscillator (3.6864 MHz)
 	mww 0xfffffc20 0xff01
@@ -37,7 +37,7 @@ proc csb337_clk_init { } {
 	sleep 20
 
 	# CPU is in Normal Mode ... allows faster JTAG clock speed
-	jtag_khz 40000
+	adapter_khz 40000
 }
 
 proc csb337_nor_init { } {
diff --git a/tcl/board/dm365evm.cfg b/tcl/board/dm365evm.cfg
index f8ec4e0..8f268c4 100644
--- a/tcl/board/dm365evm.cfg
+++ b/tcl/board/dm365evm.cfg
@@ -103,7 +103,7 @@ proc dm365evm_init {} {
 	echo "Initialize DM365 EVM board"
 
 	# CLKIN	= 24 MHz ... can't talk quickly to ARM yet
-	jtag_khz 1500
+	adapter_khz 1500
 
 	# FIXME -- PLL init
 
diff --git a/tcl/board/ek-lm3s1968.cfg b/tcl/board/ek-lm3s1968.cfg
index bf4b097..6ce7f7f 100644
--- a/tcl/board/ek-lm3s1968.cfg
+++ b/tcl/board/ek-lm3s1968.cfg
@@ -4,7 +4,7 @@
 # http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html
 
 # NOTE:  to use J-Link instead of the on-board interface,
-# you may also need to reduce jtag_khz to be about 1200.
+# you may also need to reduce adapter_khz to be about 1200.
 # source [find interface/jlink.cfg]
 
 # include the FT2232 interface config for on-board JTAG interface
@@ -14,7 +14,7 @@ source [find interface/luminary.cfg]
 source [find target/lm3s1968.cfg]
 
 # jtag speed
-jtag_khz 3000
+adapter_khz 3000
 
 jtag_nsrst_delay 100
 
diff --git a/tcl/board/ek-lm3s811.cfg b/tcl/board/ek-lm3s811.cfg
index 5825c23..078cae1 100644
--- a/tcl/board/ek-lm3s811.cfg
+++ b/tcl/board/ek-lm3s811.cfg
@@ -10,7 +10,7 @@ source [find interface/luminary.cfg]
 source [find target/lm3s811.cfg]
 
 # jtag speed
-jtag_khz 500
+adapter_khz 500
 
 jtag_nsrst_delay 100
 
diff --git a/tcl/board/ek-lm3s9b9x.cfg b/tcl/board/ek-lm3s9b9x.cfg
index 407ecc8..b8be88b 100644
--- a/tcl/board/ek-lm3s9b9x.cfg
+++ b/tcl/board/ek-lm3s9b9x.cfg
@@ -9,7 +9,7 @@ source [find interface/luminary-icdi.cfg]
 source [find target/lm3s9b9x.cfg]
 
 # jtag speed
-jtag_khz 500
+adapter_khz 500
 
 jtag_nsrst_delay 100
 
diff --git a/tcl/board/ethernut3.cfg b/tcl/board/ethernut3.cfg
index f22e688..359cb0b 100644
--- a/tcl/board/ethernut3.cfg
+++ b/tcl/board/ethernut3.cfg
@@ -26,7 +26,7 @@ jtag_ntrst_delay 300
 
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable
-jtag_khz 16000
+adapter_khz 16000
 
 
 # Target events
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 7d06f74..35cc7d0 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -7,7 +7,7 @@ jtag_ntrst_delay 1
 
 # Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
 # Adaptive clocking through RTCK is not supported.
-jtag_khz 2000
+adapter_khz 2000
 
 # Target device: LPC29xx with ETB
 # The following variables are used by the LPC2900 script:
@@ -24,7 +24,7 @@ $_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
 # Event handlers
 $_TARGETNAME configure -event reset-start {
   # Back to the slow JTAG clock
-  jtag_khz 2000
+  adapter_khz 2000
 }
 
 # External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
@@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init {
   mww 0xFFFF8070 0x02000000     # SYS_CLK_CONF: PLL
 
   # Increase JTAG speed
-  jtag_khz 6000
+  adapter_khz 6000
 
   # Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
   mww 0xE0001138 0x0000001F     # P1.14 = D0
diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg
index af7527a..ade24f6 100644
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -5,7 +5,7 @@
 source [find interface/hitex_str9-comstick.cfg]
 
 # set jtag speed
-jtag_khz 3000
+adapter_khz 3000
 
 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
diff --git a/tcl/board/imx27lnst.cfg b/tcl/board/imx27lnst.cfg
index ae141d4..e0ed057 100644
--- a/tcl/board/imx27lnst.cfg
+++ b/tcl/board/imx27lnst.cfg
@@ -8,7 +8,7 @@ proc imx27lnst_init { } {
 	# This setup puts RAM at 0xA0000000
 
 	# reset the board correctly
-	jtag_khz 500
+	adapter_khz 500
 	reset run
 	reset halt
 
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index 47bebc4..b053c22 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -121,7 +121,7 @@ reset_config trst_and_srst
 # IMPORTANT! See README at top of this file.
 #-------------------------------------------------------------------------
 
-    jtag_khz 12000
+    adapter_khz 12000
     jtag interface
 
 #-------------------------------------------------------------------------
diff --git a/tcl/board/phytec_lpc3250.cfg b/tcl/board/phytec_lpc3250.cfg
index 78cb90d..51622ef 100644
--- a/tcl/board/phytec_lpc3250.cfg
+++ b/tcl/board/phytec_lpc3250.cfg
@@ -2,7 +2,7 @@ source [find target/lpc3250.cfg]
 
 jtag_nsrst_delay 200
 jtag_ntrst_delay 1
-jtag_khz 200
+adapter_khz 200
 reset_config trst_and_srst separate
 
 arm7_9 dcc_downloads enable
@@ -11,11 +11,11 @@ $_TARGETNAME configure -event gdb-attach { reset init }
 
 $_TARGETNAME configure -event reset-start {
              arm7_9 fast_memory_access disable
-             jtag_khz 200
+             adapter_khz 200
 }
 
 $_TARGETNAME configure -event reset-end {
-             jtag_khz 6000
+             adapter_khz 6000
              arm7_9 fast_memory_access enable
 }
 
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index 0cbdb81..cb4bc2a 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -26,11 +26,11 @@ reset_config trst_and_srst separate
 # issue telnet: reset init
 # issue gdb: monitor reset init
 $_TARGETNAME configure -event reset-init {
-	jtag_khz 100
+	adapter_khz 100
 	# this will setup Telo board
 	setupTelo
 	#turn up the JTAG speed
-	jtag_khz 3000
+	adapter_khz 3000
 	puts "JTAG speek now 3MHz"
 	puts "type helpC100 to get help on C100"
 }
diff --git a/tcl/board/topas910.cfg b/tcl/board/topas910.cfg
index ae72c4b..303fc77 100644
--- a/tcl/board/topas910.cfg
+++ b/tcl/board/topas910.cfg
@@ -99,7 +99,7 @@ proc topas910_init { } {
 	mww 0xf4300004 0x00000000
 
 	sleep 10
-#	jtag_khz NNNN
+#	adapter_khz NNNN
 
 # remap off in case of IROM boot
 	mww 0xf0000004 0x00000001
diff --git a/tcl/board/topasa900.cfg b/tcl/board/topasa900.cfg
index 5984f81..aa3f77f 100644
--- a/tcl/board/topasa900.cfg
+++ b/tcl/board/topasa900.cfg
@@ -105,7 +105,7 @@ proc topasa900_init { } {
 	mww 0xf4300004 0x00000000
 
 	sleep 10
-#	jtag_khz NNNN
+#	adapter_khz NNNN
 
 # remap off in case of IROM boot
 	mww 0xf0000004 0x00000001
diff --git a/tcl/board/zy1000.cfg b/tcl/board/zy1000.cfg
index 8278fa4..17594c2 100644
--- a/tcl/board/zy1000.cfg
+++ b/tcl/board/zy1000.cfg
@@ -66,7 +66,7 @@ $_TARGETNAME configure -event reset-init {
 # other things than flash programming.
 $_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
 
-jtag_khz 16000
+adapter_khz 16000
 
 
 proc production_info {} {
diff --git a/tcl/interface/altera-usb-blaster.cfg b/tcl/interface/altera-usb-blaster.cfg
index ae21465..9f542d0 100644
--- a/tcl/interface/altera-usb-blaster.cfg
+++ b/tcl/interface/altera-usb-blaster.cfg
@@ -8,4 +8,4 @@ interface usb_blaster
 # These are already the defaults.
 # usb_blaster_vid_pid 0x09FB 0x6001
 # usb_blaster_device_desc "USB-Blaster"
-jtag_khz 3000
+adapter_khz 3000
diff --git a/tcl/interface/oocdlink.cfg b/tcl/interface/oocdlink.cfg
index 9022afd..4e962f5 100644
--- a/tcl/interface/oocdlink.cfg
+++ b/tcl/interface/oocdlink.cfg
@@ -8,5 +8,5 @@ interface ft2232
 ft2232_device_desc "OOCDLink"
 ft2232_layout oocdlink
 ft2232_vid_pid 0x0403 0xbaf8
-jtag_khz 5
+adapter_khz 5
 
diff --git a/tcl/interface/openrd.cfg b/tcl/interface/openrd.cfg
index b01205b..322b508 100644
--- a/tcl/interface/openrd.cfg
+++ b/tcl/interface/openrd.cfg
@@ -8,5 +8,5 @@ interface ft2232
 ft2232_layout sheevaplug
 ft2232_vid_pid 0x0403 0x9e90
 ft2232_device_desc "OpenRD JTAGKey FT2232D B"
-jtag_khz 3000
+adapter_khz 3000
 
diff --git a/tcl/interface/sheevaplug.cfg b/tcl/interface/sheevaplug.cfg
index 556f44d..d46d71e 100644
--- a/tcl/interface/sheevaplug.cfg
+++ b/tcl/interface/sheevaplug.cfg
@@ -8,5 +8,5 @@ interface ft2232
 ft2232_layout sheevaplug
 ft2232_vid_pid 0x9e88 0x9e8f
 ft2232_device_desc "SheevaPlug JTAGKey FT2232D B"
-jtag_khz 2000
+adapter_khz 2000
 
diff --git a/tcl/interface/usb-jtag.cfg b/tcl/interface/usb-jtag.cfg
index b81028d..a3db11e 100644
--- a/tcl/interface/usb-jtag.cfg
+++ b/tcl/interface/usb-jtag.cfg
@@ -7,5 +7,5 @@
 interface usb_blaster
 usb_blaster_vid_pid 0x16C0 0x06AD
 usb_blaster_device_desc "USB-JTAG-IF"
-jtag_khz 3000
+adapter_khz 3000
 
diff --git a/tcl/interface/vsllink.cfg b/tcl/interface/vsllink.cfg
index 7c9de7f..07a5a06 100644
--- a/tcl/interface/vsllink.cfg
+++ b/tcl/interface/vsllink.cfg
@@ -19,7 +19,7 @@ vsllink_usb_bulkout	0x03
 vsllink_usb_interface	1
 
 # vsllink mode, dma or normal
-# for low jtag_khz, use normal
-# for high jtag_khz, use dma
+# for low adapter_khz, use normal
+# for high adapter_khz, use dma
 #vsllink_mode dma
 vsllink_mode normal
diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index 690406b..0359540 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -1,7 +1,7 @@
 
 
 
-jtag_khz 4
+adapter_khz 4
 
 
 ######################################
@@ -62,7 +62,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
 proc at91sam_init { } {
 
 	# at reset chip runs at 32khz
-	jtag_khz 8
+	adapter_khz 8
 	halt
 	mww 0xfffffd08 0xa5000501         # RSTC_MR : enable user reset
 	mww 0xfffffd44 0x00008000         # WDT_MR : disable watchdog
@@ -79,7 +79,7 @@ proc at91sam_init { } {
 	sleep 10                          # wait 10 ms
 
 	# Now run at anything fast... ie: 10mhz!
-	jtag_khz 10000                    # Increase JTAG Speed to 6 MHz
+	adapter_khz 10000                    # Increase JTAG Speed to 6 MHz
 	arm7_9 dcc_downloads enable       # Enable faster DCC downloads
 
 	mww 0xffffec00 0x0a0a0a0a         # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
diff --git a/tcl/target/c100.cfg b/tcl/target/c100.cfg
index b175f23..23eca0c 100644
--- a/tcl/target/c100.cfg
+++ b/tcl/target/c100.cfg
@@ -3,7 +3,7 @@
 # this script only configures one core (that is used to run Linux)
 
 # assume no PLL lock, start slowly
-jtag_khz 100
+adapter_khz 100
 
 if { [info exists CHIPNAME] } {
    set  _CHIPNAME $CHIPNAME
diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl
index 9658871..1fd58b6 100644
--- a/tcl/target/c100helper.tcl
+++ b/tcl/target/c100helper.tcl
@@ -504,7 +504,7 @@ proc reboot {} {
     mww $TIMER_WDT_HIGH_BOUND  0xffffff
     mww $TIMER_WDT_CURRENT_COUNT 0x0
     puts "JTAG speed lowered to 100kHz"
-    jtag_khz 100
+    adapter_khz 100
     mww $TIMER_WDT_CONTROL 0x1
     # wait until the reset
     puts -nonewline "Wating for watchdog to trigger..."
diff --git a/tcl/target/dsp56321.cfg b/tcl/target/dsp56321.cfg
index 4506837..281c4dd 100644
--- a/tcl/target/dsp56321.cfg
+++ b/tcl/target/dsp56321.cfg
@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 #jtag speed
-jtag_khz 4500
+adapter_khz 4500
 
 #has only srst
 reset_config srst_only
diff --git a/tcl/target/lm3s6965.cfg b/tcl/target/lm3s6965.cfg
index 02d85d4..c6e623e 100644
--- a/tcl/target/lm3s6965.cfg
+++ b/tcl/target/lm3s6965.cfg
@@ -13,7 +13,7 @@ if { [info exists CPUTAPID ] } {
 }
 
 # jtag speed
-jtag_khz 500
+adapter_khz 500
 
 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg
index 9a27aec..ce55952 100644
--- a/tcl/target/lpc2124.cfg
+++ b/tcl/target/lpc2124.cfg
@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
 
-jtag_khz 1000
+adapter_khz 1000
 
 #jtag scan chain
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index 4e50ac5..7eb0dab 100644
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -47,4 +47,4 @@ set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
 
 # 4MHz / 6 = 666kHz, so use 500
-jtag_khz 500
+adapter_khz 500
diff --git a/tcl/target/mc13224v.cfg b/tcl/target/mc13224v.cfg
index 497e376..33351ca 100644
--- a/tcl/target/mc13224v.cfg
+++ b/tcl/target/mc13224v.cfg
@@ -36,7 +36,7 @@ jtag_ntrst_delay 200
 
 # rclk hasn't been working well. This maybe the mc13224v or something else.
 #jtag_rclk 2000
-jtag_khz 2000
+adapter_khz 2000
 
 ######################
 # Target configuration
diff --git a/tcl/target/mega128.cfg b/tcl/target/mega128.cfg
index 2cf31d6..697ec45 100644
--- a/tcl/target/mega128.cfg
+++ b/tcl/target/mega128.cfg
@@ -4,7 +4,7 @@
    set  _ENDIAN little
 
 # jtag speed
-jtag_khz 4500
+adapter_khz 4500
 
 reset_config  srst_only
 jtag_nsrst_delay 100
@@ -27,7 +27,7 @@ flash bank $_FLASHNAME avr 0 0 0 0 $_TARGETNAME
 
 #to use it, script will be like:
 #init
-#jtag_khz 4500
+#adapter_khz 4500
 #reset init
 #verify_ircapture disable
 #
diff --git a/tcl/target/pxa255.cfg b/tcl/target/pxa255.cfg
index 44efdaa..5b745f8 100644
--- a/tcl/target/pxa255.cfg
+++ b/tcl/target/pxa255.cfg
@@ -28,8 +28,8 @@ target create $_TARGETNAME xscale -endian $_ENDIAN \
 # PXA255 comes out of reset using 3.6864 MHz oscillator.
 # Until the PLL kicks in, keep the JTAG clock slow enough
 # that we get no errors.
-jtag_khz 300
-$_TARGETNAME configure -event "reset-start" { jtag_khz 300 }
+adapter_khz 300
+$_TARGETNAME configure -event "reset-start" { adapter_khz 300 }
 
 # both TRST and SRST are *required* for debug
 # DCSR is often accessed with SRST active
diff --git a/tcl/target/readme.txt b/tcl/target/readme.txt
index 39f8d12..f028b11 100644
--- a/tcl/target/readme.txt
+++ b/tcl/target/readme.txt
@@ -26,12 +26,12 @@ assumed that all write-protect mechanisms should be disabled.
 flash write_image [file] <parameters>
 verify_image [file] <parameters>
 
-4. jtag_khz sets the maximum speed (or alternatively RCLK). If invoked
+4. adapter_khz sets the maximum speed (or alternatively RCLK). If invoked
 multiple times only the last setting is used.
 
 interface/xxx.cfg files are always executed *before* target/xxx.cfg
-files, so any jtag_khz in interface/xxx.cfg will be overridden by
-target/xxx.cfg. jtag_khz in interface/xxx.cfg would then, effectively,
+files, so any adapter_khz in interface/xxx.cfg will be overridden by
+target/xxx.cfg. adapter_khz in interface/xxx.cfg would then, effectively,
 set the default JTAG speed.
 
 Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
diff --git a/tcl/target/samsung_s3c2450.cfg b/tcl/target/samsung_s3c2450.cfg
index 071b271..0075426 100644
--- a/tcl/target/samsung_s3c2450.cfg
+++ b/tcl/target/samsung_s3c2450.cfg
@@ -7,11 +7,11 @@
 #
 # RCLK?
 #
-# jtag_khz 0
+# adapter_khz 0
 #
 # Really low clock during reset?
 #
-# jtag_khz 1
+# adapter_khz 1
 
 if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg
index 6fafac9..5f4428f 100644
--- a/tcl/target/stellaris.cfg
+++ b/tcl/target/stellaris.cfg
@@ -41,8 +41,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
 # NOTE:  this may be increased by a reset-init handler, after it
 # configures and enables the PLL.  Or ...
 
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