[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-24-ge70d42a

[David B. <dbr...@us...>]

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commit e70d42a727bebc5ae0ce0b1386620d30ea00b05b
Author: David Brownell <dbr...@us...>
Date:   Sat Feb 27 00:31:35 2010 -0800

    new "stellaris recover" command
    
    Stellaris chips have a procedure for restoring the chip to
    what's effectively the "as-manufactured" state, with all the
    non-volatile memory erased.  That includes all flash memory,
    plus things like the flash protection bits and various control
    words which can for example disable debugger access.  clearly,
    this can be useful during development.
    
    Luminary/TI provides an MS-Windows utility to perform this
    procedure along with its Stellaris developer kits.  Now OpenOCD
    users will no longer need to use that MS-Windows utility.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/NEWS b/NEWS
index b39b3a8..56c697f 100644
--- a/NEWS
+++ b/NEWS
@@ -10,6 +10,12 @@ Boundary Scan:
 Target Layer:
 
 Flash Layer:
+	New "stellaris recover" command, implements the procedure
+		to recover locked devices (restoring non-volatile
+		state to the factory defaults, including erasing
+		the flash and its protection bits, and possibly
+		re-enabling hardware debugging).
+
 
 Board, Target, and Interface Configuration Scripts:
 
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 61e39b2..aa8bed1 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4497,6 +4497,21 @@ flash bank stellaris 0 0 0 0 $_TARGETNAME
 @end example
 @end deffn
 
+@deffn Command {stellaris recover bank_id}
+Performs the @emph{Recovering a "Locked" Device} procedure to
+restore the flash specified by @var{bank_id} and its associated
+nonvolatile registers to their factory default values (erased).
+This is the only way to remove flash protection or re-enable
+debugging if that capability has been disabled.
+
+Note that the final "power cycle the chip" step in this procedure
+must be performed by hand, since OpenOCD can't do it.
+@quotation Warning
+if more than one Stellaris chip is connected, the procedure is
+applied to all of them.
+@end quotation
+@end deffn
+
 @deffn {Flash Driver} stm32x
 All members of the STM32 microcontroller family from ST Microelectronics
 include internal flash and use ARM Cortex M3 cores.
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index 107b1c6..21a0cff 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -1170,13 +1170,79 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command)
 	return ERROR_OK;
 }
 
+/**
+ * Perform the Stellaris "Recovering a 'Locked' Device procedure.
+ * This performs a mass erase and then restores all nonvolatile registers
+ * (including USER_* registers and flash lock bits) to their defaults.
+ * Accordingly, flash can be reprogrammed, and JTAG can be used.
+ *
+ * NOTE that DustDevil parts (at least rev A0 silicon) have errata which
+ * can affect this operation if flash protection has been enabled.
+ */
+COMMAND_HANDLER(stellaris_handle_recover_command)
+{
+	struct flash_bank *bank;
+	int retval;
+
+	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
+	if (retval != ERROR_OK)
+		return retval;
+
+	/* REVISIT ... it may be worth sanity checking that the AP is
+	 * inactive before we start.  ARM documents that switching a DP's
+	 * mode while it's active can cause fault modes that need a power
+	 * cycle to recover.
+	 */
+
+	/* assert SRST */
+	if (!(jtag_get_reset_config() & RESET_HAS_SRST)) {
+		LOG_ERROR("Can't recover Stellaris flash without SRST");
+		return ERROR_FAIL;
+	}
+	jtag_add_reset(0, 1);
+
+	for (int i = 0; i < 5; i++) {
+		retval = dap_to_swd(bank->target);
+		if (retval != ERROR_OK)
+			goto done;
+
+		retval = dap_to_jtag(bank->target);
+		if (retval != ERROR_OK)
+			goto done;
+	}
+
+	/* de-assert SRST */
+	jtag_add_reset(0, 0);
+	retval = jtag_execute_queue();
+
+	/* wait 400+ msec ... OK, "1+ second" is simpler */
+	sleep(1);
+
+	/* USER INTERVENTION required for the power cycle
+	 * Restarting OpenOCD is likely needed because of mode switching.
+	 */
+	LOG_INFO("USER ACTION:  "
+		"power cycle Stellaris chip, then restart OpenOCD.");
+
+done:
+	return retval;
+}
+
 static const struct command_registration stellaris_exec_command_handlers[] = {
 	{
 		.name = "mass_erase",
 		.handler = stellaris_handle_mass_erase_command,
 		.mode = COMMAND_EXEC,
+		.usage = "bank_id",
 		.help = "erase entire device",
 	},
+	{
+		.name = "recover",
+		.handler = stellaris_handle_recover_command,
+		.mode = COMMAND_EXEC,
+		.usage = "bank_id",
+		.help = "recover locked device",
+	},
 	COMMAND_REGISTRATION_DONE
 };
 static const struct command_registration stellaris_command_handlers[] = {

commit 3ef9beb52cd0ed57ae6d28f7858001bfb68d7e86
Author: David Brownell <dbr...@us...>
Date:   Sat Feb 27 00:31:35 2010 -0800

    ADIv5 DAP ops switching to JTAG or SWD modes
    
    Define two new DAP operations which use the new jtag_add_tms_seq()
    calls to put the DAP's transport into either SWD or JTAG mode, when
    the hardware allows.
    
    Tested with the Stellaris 'Recovering a "Locked" Device' procedure,
    which loops five times over both of these.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 41f00ec..6be60af 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1716,3 +1716,116 @@ DAP_COMMAND_HANDLER(dap_apid_command)
 
 	return retval;
 }
+
+/*
+ * This represents the bits which must be sent out on TMS/SWDIO to
+ * switch a DAP implemented using an SWJ-DP module into SWD mode.
+ * These bits are stored (and transmitted) LSB-first.
+ *
+ * See the DAP-Lite specification, section 2.2.5 for information
+ * about making the debug link select SWD or JTAG.  (Similar info
+ * is in a few other ARM documents.)
+ */
+static const uint8_t jtag2swd_bitseq[] = {
+	/* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+	 * putting both JTAG and SWD logic into reset state.
+	 */
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	/* Switching sequence enables SWD and disables JTAG
+	 * NOTE: bits in the DP's IDCODE may expose the need for
+	 * an old/deprecated sequence (0xb6 0xed).
+	 */
+	0x9e, 0xe7,
+	/* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+	 * putting both JTAG and SWD logic into reset state.
+	 */
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+};
+
+/**
+ * Put the debug link into SWD mode, if the target supports it.
+ * The link's initial mode may be either JTAG (for example,
+ * with SWJ-DP after reset) or SWD.
+ *
+ * @param target Enters SWD mode (if possible).
+ *
+ * Note that targets using the JTAG-DP do not support SWD, and that
+ * some targets which could otherwise support it may have have been
+ * configured to disable SWD signaling
+ *
+ * @return ERROR_OK or else a fault code.
+ */
+int dap_to_swd(struct target *target)
+{
+	int retval;
+
+	LOG_DEBUG("Enter SWD mode");
+
+	/* REVISIT it's nasty to need to make calls to a "jtag"
+	 * subsystem if the link isn't in JTAG mode...
+	 */
+
+	retval =  jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq),
+			jtag2swd_bitseq, TAP_INVALID);
+	if (retval == ERROR_OK)
+		retval = jtag_execute_queue();
+
+	/* REVISIT set up the DAP's ops vector for SWD mode. */
+
+	return retval;
+}
+
+/**
+ * This represents the bits which must be sent out on TMS/SWDIO to
+ * switch a DAP implemented using an SWJ-DP module into JTAG mode.
+ * These bits are stored (and transmitted) LSB-first.
+ *
+ * These bits are stored (and transmitted) LSB-first.
+ */
+static const uint8_t swd2jtag_bitseq[] = {
+	/* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+	 * putting both JTAG and SWD logic into reset state.
+	 */
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	/* Switching equence disables SWD and enables JTAG
+	 * NOTE: bits in the DP's IDCODE can expose the need for
+	 * the old/deprecated sequence (0xae 0xde).
+	 */
+	0x3c, 0xe7,
+	/* At least 50 TCK/SWCLK cycles with TMS/SWDIO high,
+	 * putting both JTAG and SWD logic into reset state.
+	 * NOTE:  some docs say "at least 5".
+	 */
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+};
+
+/** Put the debug link into JTAG mode, if the target supports it.
+ * The link's initial mode may be either SWD or JTAG.
+ *
+ * @param target Enters JTAG mode (if possible).
+ *
+ * Note that targets implemented with SW-DP do not support JTAG, and
+ * that some targets which could otherwise support it may have been
+ * configured to disable JTAG signaling
+ *
+ * @return ERROR_OK or else a fault code.
+ */
+int dap_to_jtag(struct target *target)
+{
+	int retval;
+
+	LOG_DEBUG("Enter JTAG mode");
+
+	/* REVISIT it's nasty to need to make calls to a "jtag"
+	 * subsystem if the link isn't in JTAG mode...
+	 */
+
+	retval = jtag_add_tms_seq(8 * sizeof(swd2jtag_bitseq),
+			swd2jtag_bitseq, TAP_RESET);
+	if (retval == ERROR_OK)
+		retval = jtag_execute_queue();
+
+	/* REVISIT set up the DAP's ops vector for JTAG mode. */
+
+	return retval;
+}
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 316701e..5c5ca4f 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -235,4 +235,12 @@ DAP_COMMAND_HANDLER(dap_memaccess_command);
 DAP_COMMAND_HANDLER(dap_apsel_command);
 DAP_COMMAND_HANDLER(dap_apid_command);
 
+struct target;
+
+/* Put debug link into SWD mode */
+int dap_to_swd(struct target *target);
+
+/* Put debug link into JTAG mode */
+int dap_to_jtag(struct target *target);
+
 #endif

commit 8c9b52e8b615198252ab53e1b5c7cf5f314c5ca1
Author: David Brownell <dbr...@us...>
Date:   Sat Feb 27 00:12:38 2010 -0800

    ft2232: implement TMS sequence command
    
    Implement the new TMS_SEQ command on FT2232 hardware.
    Also, swap a bogus exit() call with a clean failure return.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/src/jtag/drivers/ft2232.c b/src/jtag/drivers/ft2232.c
index 4b84fa8..5c6b655 100644
--- a/src/jtag/drivers/ft2232.c
+++ b/src/jtag/drivers/ft2232.c
@@ -1678,6 +1678,72 @@ static int ft2232_execute_statemove(struct jtag_command *cmd)
 	return retval;
 }
 
+/**
+ * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
+ * (or SWD) state machine.
+ */
+static int ft2232_execute_tms(struct jtag_command *cmd)
+{
+	int		retval = ERROR_OK;
+	unsigned	num_bits = cmd->cmd.tms->num_bits;
+	const uint8_t	*bits = cmd->cmd.tms->bits;
+	unsigned	count;
+
+	DEBUG_JTAG_IO("TMS: %d bits", num_bits);
+
+	/* only send the maximum buffer size that FT2232C can handle */
+	count = 3 * DIV_ROUND_UP(num_bits, 4);
+	if (ft2232_buffer_size + 3*count + 1 > FT2232_BUFFER_SIZE) {
+		if (ft2232_send_and_recv(first_unsent, cmd) != ERROR_OK)
+			retval = ERROR_JTAG_QUEUE_FAILED;
+
+		require_send = 0;
+		first_unsent = cmd;
+	}
+
+	/* Shift out in batches of at most 6 bits; there's a report of an
+	 * FT2232 bug in this area, where shifting exactly 7 bits can make
+	 * problems with TMS signaling for the last clock cycle:
+	 *
+	 *    http://developer.intra2net.com/mailarchive/html/
+	 *		libftdi/2009/msg00292.html
+	 *
+	 * Command 0x4b is: "Clock Data to TMS/CS Pin (no Read)"
+	 *
+	 * Note that pathmoves in JTAG are not often seven bits, so that
+	 * isn't a particularly likely situation outside of "special"
+	 * signaling such as switching between JTAG and SWD modes.
+	 */
+	while (num_bits) {
+		if (num_bits <= 6) {
+			buffer_write(0x4b);
+			buffer_write(num_bits - 1);
+			buffer_write(*bits & 0x3f);
+			break;
+		}
+
+		/* Yes, this is lazy ... we COULD shift out more data
+		 * bits per operation, but doing it in nybbles is easy
+		 */
+		buffer_write(0x4b);
+		buffer_write(3);
+		buffer_write(*bits & 0xf);
+		num_bits -= 4;
+
+		count  = (num_bits > 4) ? 4 : num_bits;
+
+		buffer_write(0x4b);
+		buffer_write(count - 1);
+		buffer_write((*bits >> 4) & 0xf);
+		num_bits -= count;
+
+		bits++;
+	}
+
+	require_send = 1;
+	return retval;
+}
+
 static int ft2232_execute_pathmove(struct jtag_command *cmd)
 {
 	int	predicted_size = 0;
@@ -1830,7 +1896,6 @@ static int ft2232_execute_stableclocks(struct jtag_command *cmd)
 static int ft2232_execute_command(struct jtag_command *cmd)
 {
 	int retval;
-	retval = ERROR_OK;
 
 	switch (cmd->type)
 	{
@@ -1841,9 +1906,13 @@ static int ft2232_execute_command(struct jtag_command *cmd)
 	case JTAG_SCAN:		retval = ft2232_execute_scan(cmd); break;
 	case JTAG_SLEEP:	retval = ft2232_execute_sleep(cmd); break;
 	case JTAG_STABLECLOCKS:	retval = ft2232_execute_stableclocks(cmd); break;
+	case JTAG_TMS:
+		retval = ft2232_execute_tms(cmd);
+		break;
 	default:
 		LOG_ERROR("BUG: unknown JTAG command type encountered");
-		exit(-1);
+		retval = ERROR_JTAG_QUEUE_FAILED;
+		break;
 	}
 	return retval;
 }
@@ -4108,6 +4177,7 @@ static const struct command_registration ft2232_command_handlers[] = {
 
 struct jtag_interface ft2232_interface = {
 	.name = "ft2232",
+	.supported = DEBUG_CAP_TMS_SEQ,
 	.commands = ft2232_command_handlers,
 
 	.init = ft2232_init,

commit a3245bd7cdd2d8c3740c5e8f31efcd78de67837a
Author: David Brownell <dbr...@us...>
Date:   Sat Feb 27 00:12:38 2010 -0800

    interface: define TMS sequence command
    
    For support of SWD we need to be able to clock out special bit
    sequences over TMS or SWDIO.  Create this as a generic operation,
    not yet called by anything, which is split as usual into:
    
     - upper level abstraction ... here, jtag_add_tms_seq();
     - midlayer implementation logic hooking that to the lowlevel code;
     - lowlevel minidriver operation ... here, interface_add_tms_seq();
     - message type for request queue, here JTAG_TMS.
    
    This is done slightly differently than other operations: there's a flag
    saying whether the interface driver supports this request.  (In fact a
    flag *word* so upper layers can learn about other capabilities too ...
    for example, supporting SWD operations.)
    
    That approach (flag) lets this method *eventually* be used to eliminate
    pathmove() and statemove() support from most adapter drivers, by moving
    all that logic into the mid-layer and increasing uniformity between the
    various drivers.  (Which will in turn reduce subtle bugginess.)
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/src/jtag/commands.h b/src/jtag/commands.h
index b10b545..692eee4 100644
--- a/src/jtag/commands.h
+++ b/src/jtag/commands.h
@@ -99,18 +99,38 @@ struct sleep_command {
 };
 
 /**
+ * Encapsulates a series of bits to be clocked out, affecting state
+ * and mode of the interface.
+ *
+ * In JTAG mode these are clocked out on TMS, using TCK.  They may be
+ * used for link resets, transitioning between JTAG and SWD modes, or
+ * to implement JTAG state machine transitions (implementing pathmove
+ * or statemove operations).
+ *
+ * In SWD mode these are clocked out on SWDIO, using SWCLK, and are
+ * used for link resets and transitioning between SWD and JTAG modes.
+ */
+struct tms_command {
+	/** How many bits should be clocked out. */
+	unsigned	num_bits;
+	/** The bits to clock out; the LSB is bit 0 of bits[0].  */
+	const uint8_t		*bits;
+};
+
+/**
  * Defines a container type that hold a pointer to a JTAG command
  * structure of any defined type.
  */
 union jtag_command_container {
-	struct scan_command*         scan;
-	struct statemove_command*    statemove;
-	struct pathmove_command*     pathmove;
-	struct runtest_command*      runtest;
-	struct stableclocks_command* stableclocks;
-	struct reset_command*        reset;
-	struct end_state_command*    end_state;
-	struct sleep_command* sleep;
+	struct scan_command		*scan;
+	struct statemove_command	*statemove;
+	struct pathmove_command		*pathmove;
+	struct runtest_command		*runtest;
+	struct stableclocks_command	*stableclocks;
+	struct reset_command		*reset;
+	struct end_state_command	*end_state;
+	struct sleep_command		*sleep;
+	struct tms_command		*tms;
 };
 
 /**
@@ -124,7 +144,8 @@ enum jtag_command_type {
 	JTAG_RESET        = 4,
 	JTAG_PATHMOVE     = 6,
 	JTAG_SLEEP        = 7,
-	JTAG_STABLECLOCKS = 8
+	JTAG_STABLECLOCKS = 8,
+	JTAG_TMS          = 9,
 };
 
 struct jtag_command {
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 4f517c0..7f417b7 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -488,6 +488,35 @@ void jtag_add_tlr(void)
 	jtag_notify_event(JTAG_TRST_ASSERTED);
 }
 
+/**
+ * If supported by the underlying adapter, this clocks a raw bit sequence
+ * onto TMS for switching betwen JTAG and SWD modes.
+ *
+ * DO NOT use this to bypass the integrity checks and logging provided
+ * by the jtag_add_pathmove() and jtag_add_statemove() calls.
+ *
+ * @param nbits How many bits to clock out.
+ * @param seq The bit sequence.  The LSB is bit 0 of seq[0].
+ * @param state The JTAG tap state to record on completion.  Use
+ *	TAP_INVALID to represent being in in SWD mode.
+ *
+ * @todo Update naming conventions to stop assuming everything is JTAG.
+ */
+int jtag_add_tms_seq(unsigned nbits, const uint8_t *seq, enum tap_state state)
+{
+	int retval;
+
+	if (!(jtag->supported & DEBUG_CAP_TMS_SEQ))
+		return ERROR_JTAG_NOT_IMPLEMENTED;
+
+	jtag_checks();
+	cmd_queue_cur_state = state;
+
+	retval = interface_add_tms_seq(nbits, seq);
+	jtag_set_error(retval);
+	return retval;
+}
+
 void jtag_add_pathmove(int num_states, const tap_state_t *path)
 {
 	tap_state_t cur_state = cmd_queue_cur_state;
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index 45c5d10..14efe96 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -388,6 +388,31 @@ int interface_jtag_add_tlr(void)
 	return ERROR_OK;
 }
 
+int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq)
+{
+	struct jtag_command *cmd;
+
+	cmd = cmd_queue_alloc(sizeof(struct jtag_command));
+	if (cmd == NULL)
+		return ERROR_FAIL;
+
+	cmd->type = JTAG_TMS;
+	cmd->cmd.tms = cmd_queue_alloc(sizeof(*cmd->cmd.tms));
+	if (!cmd->cmd.tms)
+		return ERROR_FAIL;
+
+	/* copy the bits; our caller doesn't guarantee they'll persist */
+	cmd->cmd.tms->num_bits = num_bits;
+	cmd->cmd.tms->bits = buf_cpy(seq,
+			cmd_queue_alloc(DIV_ROUND_UP(num_bits, 8)), num_bits);
+	if (!cmd->cmd.tms->bits)
+		return ERROR_FAIL;
+
+	jtag_queue_command(cmd);
+
+	return ERROR_OK;
+}
+
 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
 {
 	/* allocate memory for a new list member */
diff --git a/src/jtag/interface.h b/src/jtag/interface.h
index a264d69..0d47404 100644
--- a/src/jtag/interface.h
+++ b/src/jtag/interface.h
@@ -184,11 +184,29 @@ static inline tap_state_t jtag_debug_state_machine(const void *tms_buf,
 }
 #endif // _DEBUG_JTAG_IO_
 
+/**
+ * Represents a driver for a debugging interface.
+ *
+ * @todo Rename; perhaps "debug_driver".  This isn't an interface,
+ * it's a driver!  Also, not all drivers support JTAG.
+ *
+ * @todo We need a per-instance structure too, and changes to pass
+ * that structure to the driver.  Instances can for example be in
+ * either SWD or JTAG modes.  This will help remove globals, and
+ * eventually to cope with systems which have more than one such
+ * debugging interface.
+ */
 struct jtag_interface {
 	/// The name of the JTAG interface driver.
 	char* name;
 
 	/**
+	 * Bit vector listing capabilities exposed by this driver.
+	 */
+	unsigned supported;
+#define DEBUG_CAP_TMS_SEQ	(1 << 0)
+
+	/**
 	 * Execute queued commands.
 	 * @returns ERROR_OK on success, or an error code on failure.
 	 */
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 0555754..7e5dc10 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -575,6 +575,8 @@ tap_state_t jtag_get_end_state(void);
 
 void jtag_add_sleep(uint32_t us);
 
+int jtag_add_tms_seq(unsigned nbits, const uint8_t *seq, enum tap_state t);
+
 /**
  * Function jtag_add_clocks
  * first checks that the state in which the clocks are to be issued is
@@ -693,7 +695,7 @@ int jtag_error_clear(void);
 /**
  * Return true if it's safe for a background polling task to access the
  * JTAG scan chain.  Polling may be explicitly disallowed, and is also
- * unsafe while nTRST is active or the JTAG clock is gated off.,
+ * unsafe while nTRST is active or the JTAG clock is gated off.
  */
 bool is_jtag_poll_safe(void);
 
diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h
index 2109c75..5caec58 100644
--- a/src/jtag/minidriver.h
+++ b/src/jtag/minidriver.h
@@ -67,6 +67,8 @@ int interface_jtag_add_tlr(void);
 int interface_jtag_add_pathmove(int num_states, const tap_state_t* path);
 int interface_jtag_add_runtest(int num_cycles, tap_state_t endstate);
 
+int interface_add_tms_seq(unsigned num_bits, const uint8_t *bits);
+
 /**
  * This drives the actual srst and trst pins. srst will always be 0
  * if jtag_reset_config & RESET_SRST_PULLS_TRST != 0 and ditto for
diff --git a/src/jtag/minidummy/minidummy.c b/src/jtag/minidummy/minidummy.c
index 9c608cd..6410c2d 100644
--- a/src/jtag/minidummy/minidummy.c
+++ b/src/jtag/minidummy/minidummy.c
@@ -147,6 +147,13 @@ int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
 	return ERROR_OK;
 }
 
+int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq)
+{
+	/* synchronously do the operation here */
+
+	return ERROR_OK;
+}
+
 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
 {
 	int i;
diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c
index d920c30..e21104c 100644
--- a/src/jtag/zy1000/zy1000.c
+++ b/src/jtag/zy1000/zy1000.c
@@ -804,7 +804,16 @@ int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
 	return ERROR_OK;
 }
 
-
+int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq)
+{
+	/* FIXME just implement this, like pathmove but without
+	 * JTAG-specific state transition checking.  Then update
+	 * zy1000_interface to report that it's supported.
+	 *
+	 * Eventually interface_jtag_add_pathmove() could vanish.
+	 */
+	return ERROR_JTAG_NOT_IMPLEMENTED;
+}
 
 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
 {

-----------------------------------------------------------------------

Summary of changes:
 NEWS                           |    6 ++
 doc/openocd.texi               |   15 +++++
 src/flash/nor/stellaris.c      |   66 +++++++++++++++++++++++
 src/jtag/commands.h            |   39 +++++++++++---
 src/jtag/core.c                |   29 ++++++++++
 src/jtag/drivers/driver.c      |   25 +++++++++
 src/jtag/drivers/ft2232.c      |   74 +++++++++++++++++++++++++-
 src/jtag/interface.h           |   18 ++++++
 src/jtag/jtag.h                |    4 +-
 src/jtag/minidriver.h          |    2 +
 src/jtag/minidummy/minidummy.c |    7 +++
 src/jtag/zy1000/zy1000.c       |   11 ++++-
 src/target/arm_adi_v5.c        |  113 ++++++++++++++++++++++++++++++++++++++++
 src/target/arm_adi_v5.h        |    8 +++
 14 files changed, 404 insertions(+), 13 deletions(-)


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