[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-rc1-154-g3172be8

[David B. <dbr...@us...>]

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- Log -----------------------------------------------------------------
commit 3172be80a3e14f4c8c3628a37db348c04fd60fc4
Author: David Brownell <dbr...@us...>
Date:   Wed Jan 27 13:47:48 2010 -0800

    Cortex-M3: report lockup, and recover
    
    ARMv7-M defines a "lockup" state that's entered in certain double
    fault sequences which can't be recovered from without external help.
    OpenOCD has previously ignored this.
    
    Issue a diagnostic saying the chip has locked up, and force exit
    from this state by halting the core.  It's not clear this is the
    best way to handle lockup; but there should now be less confusion.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index adce4d9..3bbe42c 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -416,6 +416,21 @@ static int cortex_m3_poll(struct target *target)
 		return retval;
 	}
 
+	/* Recover from lockup.  See ARMv7-M architecture spec,
+	 * section B1.5.15 "Unrecoverable exception cases".
+	 *
+	 * REVISIT Is there a better way to report and handle this?
+	 */
+	if (cortex_m3->dcb_dhcsr & S_LOCKUP) {
+		LOG_WARNING("%s -- clearing lockup after double fault",
+				target_name(target));
+		cortex_m3_write_debug_halt_mask(target, C_HALT, 0);
+		target->debug_reason = DBG_REASON_DBGRQ;
+
+		/* refresh status bits */
+		mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
+	}
+
 	if (cortex_m3->dcb_dhcsr & S_RESET_ST)
 	{
 		/* check if still in reset */

commit d44f1aaeff45d26348826bdff07caf3d097eca15
Author: David Brownell <dbr...@us...>
Date:   Wed Jan 27 13:40:05 2010 -0800

    ARM ADIv5: messaging tweaks
    
    Add space missing after the invalid ACK value.  On init, say
    which AP is being used, and don't assume it's an AHP-AP.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index ba5db3b..2ba89e5 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -305,7 +305,7 @@ int swjdp_transaction_endcheck(struct swjdp_common *swjdp)
 			}
 			else
 			{
-				LOG_WARNING("Invalid ACK %#x"
+				LOG_WARNING("Invalid ACK %#x "
 						"in JTAG-DP transaction",
 						swjdp->ack);
 				return ERROR_JTAG_DEVICE_ERROR;
@@ -1058,6 +1058,7 @@ int mem_ap_read_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, u
  * @todo Rename this.  We also need an initialization scheme which account
  * for SWD transports not just JTAG; that will need to address differences
  * in layering.  (JTAG is useful without any debug target; but not SWD.)
+ * And this may not even use an AHB-AP ... e.g. DAP-Lite uses an APB-AP.
  */
 int ahbap_debugport_init(struct swjdp_common *swjdp)
 {
@@ -1125,7 +1126,9 @@ int ahbap_debugport_init(struct swjdp_common *swjdp)
 	dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &idreg);
 	dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &romaddr);
 
-	LOG_DEBUG("AHB-AP ID Register 0x%" PRIx32 ", Debug ROM Address 0x%" PRIx32 "", idreg, romaddr);
+	LOG_DEBUG("MEM-AP #%d ID Register 0x%" PRIx32
+		", Debug ROM Address 0x%" PRIx32,
+		swjdp->apsel, idreg, romaddr);
 
 	return ERROR_OK;
 }

commit 2b5c444a32725dd75833348e04620bd7b1bda2ad
Author: David Brownell <dbr...@us...>
Date:   Wed Jan 27 13:24:21 2010 -0800

    Cortex-A8: debug messaging tweaks
    
    Make that "TODO" message say what needs to be done.
    Say what part of examining failed.
    
    Signed-off-by: David Brownell <dbr...@us...>

diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 18edd95..bcdb526 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -1461,7 +1461,8 @@ static int cortex_a8_examine_first(struct target *target)
 	int retval = ERROR_OK;
 	uint32_t didr, ctypr, ttypr, cpuid;
 
-	LOG_DEBUG("TODO");
+	/* stop assuming this is an OMAP! */
+	LOG_DEBUG("TODO - autoconfigure");
 
 	/* Here we shall insert a proper ROM Table scan */
 	armv7a->debug_base = OMAP3530_DEBUG_BASE;
@@ -1474,28 +1475,28 @@ static int cortex_a8_examine_first(struct target *target)
 	if ((retval = mem_ap_read_atomic_u32(swjdp,
 			armv7a->debug_base + CPUDBG_CPUID, &cpuid)) != ERROR_OK)
 	{
-		LOG_DEBUG("Examine failed");
+		LOG_DEBUG("Examine %s failed", "CPUID");
 		return retval;
 	}
 
 	if ((retval = mem_ap_read_atomic_u32(swjdp,
 			armv7a->debug_base + CPUDBG_CTYPR, &ctypr)) != ERROR_OK)
 	{
-		LOG_DEBUG("Examine failed");
+		LOG_DEBUG("Examine %s failed", "CTYPR");
 		return retval;
 	}
 
 	if ((retval = mem_ap_read_atomic_u32(swjdp,
 			armv7a->debug_base + CPUDBG_TTYPR, &ttypr)) != ERROR_OK)
 	{
-		LOG_DEBUG("Examine failed");
+		LOG_DEBUG("Examine %s failed", "TTYPR");
 		return retval;
 	}
 
 	if ((retval = mem_ap_read_atomic_u32(swjdp,
 			armv7a->debug_base + CPUDBG_DIDR, &didr)) != ERROR_OK)
 	{
-		LOG_DEBUG("Examine failed");
+		LOG_DEBUG("Examine %s failed", "DIDR");
 		return retval;
 	}
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/arm_adi_v5.c |    7 +++++--
 src/target/cortex_a8.c  |   11 ++++++-----
 src/target/cortex_m3.c  |   15 +++++++++++++++
 3 files changed, 26 insertions(+), 7 deletions(-)


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