From: David B. <dbr...@us...> - 2009-11-18 23:49:37
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 94dba423137d25fbe898fe7b04c451c6225a0079 (commit) from f5093e160534c269b8bc3590f5809ed3baead56f (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 94dba423137d25fbe898fe7b04c451c6225a0079 Author: David Brownell <dbr...@us...> Date: Wed Nov 18 14:49:22 2009 -0800 ARM: add a default full_context() method If the core doesn't provide an optimized version of this method, provide one without core-specific optimizations. Use this to make Cortex-A8 support the "arm reg" command. Related: make the two register access methods properly static, have the "set" log a "not halted" error too, and make sure that the "valid" flag is set on successful reads. Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 562dc1f..a4c704e 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -299,7 +299,7 @@ static void arm_gdb_dummy_init(void) register_init_dummy(&arm_gdb_dummy_fps_reg); } -int armv4_5_get_core_reg(struct reg *reg) +static int armv4_5_get_core_reg(struct reg *reg) { int retval; struct armv4_5_core_reg *armv4_5 = reg->arch_info; @@ -311,13 +311,14 @@ int armv4_5_get_core_reg(struct reg *reg) return ERROR_TARGET_NOT_HALTED; } - /* retval = armv4_5->armv4_5_common->full_context(target); */ retval = armv4_5->armv4_5_common->read_core_reg(target, armv4_5->num, armv4_5->mode); + if (retval == ERROR_OK) + reg->valid = 1; return retval; } -int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf) +static int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf) { struct armv4_5_core_reg *armv4_5 = reg->arch_info; struct target *target = armv4_5->target; @@ -326,6 +327,7 @@ int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf) if (target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -1038,6 +1040,21 @@ int arm_blank_check_memory(struct target *target, return ERROR_OK; } +static int arm_full_context(struct target *target) +{ + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); + unsigned num_regs = armv4_5->core_cache->num_regs; + struct reg *reg = armv4_5->core_cache->reg_list; + int retval = ERROR_OK; + + for (; num_regs && retval == ERROR_OK; num_regs--, reg++) { + if (reg->valid) + continue; + retval = armv4_5_get_core_reg(reg); + } + return retval; +} + int armv4_5_init_arch_info(struct target *target, struct arm *armv4_5) { target->arch_info = armv4_5; @@ -1049,5 +1066,9 @@ int armv4_5_init_arch_info(struct target *target, struct arm *armv4_5) /* core_type may be overridden by subtype logic */ armv4_5->core_type = ARMV4_5_MODE_ANY; + /* default full_context() has no core-specific optimizations */ + if (!armv4_5->full_context && armv4_5->read_core_reg) + armv4_5->full_context = arm_full_context; + return ERROR_OK; } diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index b69f182..37e5e3e 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -1456,10 +1456,6 @@ int cortex_a8_init_arch_info(struct target *target, struct arm *armv4_5 = &armv7a->armv4_5_common; struct swjdp_common *swjdp = &armv7a->swjdp_info; - /* REVISIT v7a setup should be in a v7a-specific routine */ - armv4_5_init_arch_info(target, armv4_5); - armv7a->common_magic = ARMV7_COMMON_MAGIC; - /* Setup struct cortex_a8_common */ cortex_a8->common_magic = CORTEX_A8_COMMON_MAGIC; armv4_5->arch_info = armv7a; @@ -1503,12 +1499,10 @@ LOG_DEBUG(" "); armv4_5->read_core_reg = cortex_a8_read_core_reg; armv4_5->write_core_reg = cortex_a8_write_core_reg; -// armv4_5->full_context = arm7_9_full_context; -// armv4_5->load_core_reg_u32 = cortex_a8_load_core_reg_u32; -// armv4_5->store_core_reg_u32 = cortex_a8_store_core_reg_u32; -// armv4_5->read_core_reg = armv4_5_read_core_reg; /* this is default */ -// armv4_5->write_core_reg = armv4_5_write_core_reg; + /* REVISIT v7a setup should be in a v7a-specific routine */ + armv4_5_init_arch_info(target, armv4_5); + armv7a->common_magic = ARMV7_COMMON_MAGIC; target_register_timer_callback(cortex_a8_handle_target_request, 1, 1, target); ----------------------------------------------------------------------- Summary of changes: src/target/armv4_5.c | 27 ++++++++++++++++++++++++--- src/target/cortex_a8.c | 12 +++--------- 2 files changed, 27 insertions(+), 12 deletions(-) hooks/post-receive -- Main OpenOCD repository |