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[openocd-svn] Main OpenOCD repository branch, master, updated. v0.3.0-363-g38e8d60
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From: David B. <dbr...@us...> - 2009-11-13 22:45:11
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The branch, master has been updated
via 38e8d60f79fd51424c556e07653713254c2d9b4e (commit)
via afe0298399bd06700926822e6d49c5bc44151956 (commit)
from 6435e75e147a6559ed4f784b5e89c8390e787a2a (commit)
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- Log -----------------------------------------------------------------
commit 38e8d60f79fd51424c556e07653713254c2d9b4e
Author: David Brownell <dbr...@us...>
Date: Fri Nov 13 13:44:50 2009 -0800
target.cfg: label ETBs correctly
Various cores with an ETB have its TAP misnamed ... either as a
boundary scan TAP or as the iMX "Secure JTAG Controller" (which
is, among other things, a JRC that could be used to shorten
scan chains).
Use the correct name for these TAPs, which we can recognize since
their IDs were assigned by ARM and these chips all document the
presence of an ETB. The 0x2b900f0f is ETB11; the 0x1b900f0f
is an older module, just called "ETB".
Also shrink the ETB's IR configuration; the default IR-Capture
value is fine, and the mask can specify that all four bits are
safe to check (per ARM documentation).
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/tcl/target/imx25.cfg b/tcl/target/imx25.cfg
index 8f8fa05..6474a85 100644
--- a/tcl/target/imx25.cfg
+++ b/tcl/target/imx25.cfg
@@ -14,12 +14,12 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
-if { [info exists SJCTAPID ] } {
- set _SJCTAPID $SJCTAPID
+if { [info exists ETBTAPID ] } {
+ set _ETBTAPID $ETBTAPID
} else {
- set _SJCTAPID 0x1b900f0f
+ set _ETBTAPID 0x1b900f0f
}
-jtag newtap $_CHIPNAME sjc -irlen 4 -expected-id $_SJCTAPID
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0x0f -expected-id $_ETBTAPID
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
diff --git a/tcl/target/imx27.cfg b/tcl/target/imx27.cfg
index 4a93a67..039e83c 100644
--- a/tcl/target/imx27.cfg
+++ b/tcl/target/imx27.cfg
@@ -21,13 +21,13 @@ if { [info exists ENDIAN] } {
# Note above there are 2 taps
-# The bs tap
-if { [info exists BSTAPID ] } {
- set _BSTAPID $BSTAPID
+# trace buffer
+if { [info exists ETBTAPID ] } {
+ set _ETBTAPID $ETBTAPID
} else {
- set _BSTAPID 0x1b900f0f
+ set _ETBTAPID 0x1b900f0f
}
-jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
# The CPU tap
if { [info exists CPUTAPID ] } {
diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg
index 61a2925..9a2aed3 100644
--- a/tcl/target/imx31.cfg
+++ b/tcl/target/imx31.cfg
@@ -27,15 +27,15 @@ if { [info exists SDMATAPID ] } {
set _SDMATAPID 0x2190101d
}
-#========================================
-# The "system jtag controller"
-# IMX31 reference manual, page 6-28 - figure 6-14
-if { [info exists SJCTAPID ] } {
- set _SJCTAPID $SJCTAPID
+if { [info exists ETBTAPID ] } {
+ set _ETBTAPID $ETBTAPID
} else {
- set _SJCTAPID 0x2b900f0f
+ set _ETBTAPID 0x2b900f0f
}
-jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
+
+#========================================
+
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
# The "SDMA" - <S>mart <DMA> controller debug tap
# Based on some IO pins - this can be disabled & removed
diff --git a/tcl/target/imx35.cfg b/tcl/target/imx35.cfg
index 32748c5..b899084 100644
--- a/tcl/target/imx35.cfg
+++ b/tcl/target/imx35.cfg
@@ -27,17 +27,15 @@ if { [info exists SDMATAPID ] } {
set _SDMATAPID 0x0882601d
}
-#========================================
-# The "system jtag controller"
-# IMX31 reference manual, page 6-28 - figure 6-14
-if { [info exists SJCTAPID ] } {
- set _SJCTAPID $SJCTAPID
+if { [info exists ETBTAPID ] } {
+ set _ETBTAPID $ETBTAPID
} else {
- set _SJCTAPID 0x2b900f0f
+ set _ETBTAPID 0x2b900f0f
}
-jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
+#========================================
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
# No IDCODE for this TAP
diff --git a/tcl/target/samsung_s3c6410.cfg b/tcl/target/samsung_s3c6410.cfg
index 594d321..e451fd6 100644
--- a/tcl/target/samsung_s3c6410.cfg
+++ b/tcl/target/samsung_s3c6410.cfg
@@ -19,11 +19,12 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
-if { [info exists BSTAPID ] } {
- set _BSTAPID $BSTAPID
+# trace buffer
+if { [info exists ETBTAPID ] } {
+ set _ETBTAPID $ETBTAPID
} else {
# force an error till we get a good number
- set _BSTAPID 0x2b900f0f
+ set _ETBTAPID 0x2b900f0f
}
if { [info exists CPUTAPID ] } {
@@ -35,8 +36,7 @@ if { [info exists CPUTAPID ] } {
#jtag scan chain
-# I think the "unknown" is the boundry scan tap
-jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0xe -expected-id $_BSTAPID
+jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETBTAPID
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
commit afe0298399bd06700926822e6d49c5bc44151956
Author: David Brownell <dbr...@us...>
Date: Fri Nov 13 13:44:50 2009 -0800
ARM7/9: rm arm7_9_get_arch_pointers()
Remove the last external user of arm7_9_get_arch_pointers(), and
that annoying downcast utility. Add an is_arm7_9() predicate.
Stop returning specious success codes on various failure paths
in the ARM7/ARM9 commands which used that downcast utility.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/flash/ocl.c b/src/flash/ocl.c
index 26d2830..0b492c6 100644
--- a/src/flash/ocl.c
+++ b/src/flash/ocl.c
@@ -46,8 +46,6 @@ static int ocl_protect_check(struct flash_bank *bank)
/* flash_bank ocl 0 0 0 0 <target#> */
FLASH_BANK_COMMAND_HANDLER(ocl_flash_bank_command)
{
- int retval;
- struct arm *armv4_5;
struct arm7_9_common *arm7_9;
struct ocl_priv *ocl;
@@ -57,8 +55,9 @@ FLASH_BANK_COMMAND_HANDLER(ocl_flash_bank_command)
return ERROR_FLASH_BANK_INVALID;
}
- if ((retval = arm7_9_get_arch_pointers(bank->target, &armv4_5, &arm7_9)) != ERROR_OK)
- return retval;
+ arm7_9 = target_to_arm7_9(bank->target);
+ if (!is_arm7_9(arm7_9))
+ return ERROR_TARGET_INVALID;
ocl = bank->driver_priv = malloc(sizeof(struct ocl_priv));
ocl->jtag_info = &arm7_9->jtag_info;
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index ce2d4f0..ea04f3f 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -167,39 +167,6 @@ int arm7_9_setup(struct target *target)
}
/**
- * Retrieves the architecture information pointers for ARMv4/5 and ARM7/9
- * targets. A return of ERROR_OK signifies that the target is a valid target
- * and that the pointers have been set properly.
- *
- * @param target Pointer to the target device to get the pointers from
- * @param armv4_5_p Pointer to be filled in with the common struct for ARMV4/5
- * targets
- * @param arm7_9_p Pointer to be filled in with the common struct for ARM7/9
- * targets
- * @return ERROR_OK if successful
- */
-int arm7_9_get_arch_pointers(struct target *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p)
-{
- struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
-
- /* FIXME stop using this routine; just target_to_arm7_9() and
- * verify the resulting pointer using a replacement routine
- * that emits a usage message.
- */
- if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
- return ERROR_TARGET_INVALID;
-
- if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
- return ERROR_TARGET_INVALID;
-
- *armv4_5_p = armv4_5;
- *arm7_9_p = arm7_9;
-
- return ERROR_OK;
-}
-
-/**
* Set either a hardware or software breakpoint on an ARM7/9 target. The
* breakpoint is set up even if it is already set. Some actions, e.g. reset,
* might have erased the values in Embedded ICE.
@@ -2877,25 +2844,24 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
int spsr;
int retval;
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
command_print(cmd_ctx, "can't write registers while running");
- return ERROR_OK;
+ return ERROR_FAIL;
}
if (argc < 2)
{
command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr | spsr>");
- return ERROR_OK;
+ return ERROR_FAIL;
}
COMMAND_PARSE_NUMBER(u32, args[0], value);
@@ -2922,25 +2888,24 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_im8_command)
int spsr;
int retval;
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
command_print(cmd_ctx, "can't write registers while running");
- return ERROR_OK;
+ return ERROR_FAIL;
}
if (argc < 3)
{
command_print(cmd_ctx, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>");
- return ERROR_OK;
+ return ERROR_FAIL;
}
COMMAND_PARSE_NUMBER(u32, args[0], value);
@@ -2963,25 +2928,24 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
uint32_t mode;
int num;
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
command_print(cmd_ctx, "can't write registers while running");
- return ERROR_OK;
+ return ERROR_FAIL;
}
if (argc < 3)
{
command_print(cmd_ctx, "usage: write_core_reg <num> <mode> <value>");
- return ERROR_OK;
+ return ERROR_FAIL;
}
COMMAND_PARSE_NUMBER(int, args[0], num);
@@ -2994,13 +2958,12 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
{
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (argc > 0)
@@ -3027,13 +2990,12 @@ COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
{
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (argc > 0)
@@ -3060,13 +3022,12 @@ COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
{
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (argc > 0)
diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h
index 035c5fe..e46da88 100644
--- a/src/target/arm7_9_common.h
+++ b/src/target/arm7_9_common.h
@@ -115,6 +115,11 @@ target_to_arm7_9(struct target *target)
armv4_5_common);
}
+static inline bool is_arm7_9(struct arm7_9_common *arm7_9)
+{
+ return arm7_9->common_magic == ARM7_9_COMMON_MAGIC;
+}
+
int arm7_9_register_commands(struct command_context *cmd_ctx);
int arm7_9_poll(struct target *target);
@@ -154,6 +159,5 @@ void arm7_9_disable_eice_step(struct target *target);
int arm7_9_execute_sys_speed(struct target *target);
int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9);
-int arm7_9_get_arch_pointers(struct target *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p);
#endif /* ARM7_9_COMMON_H */
-----------------------------------------------------------------------
Summary of changes:
src/flash/ocl.c | 7 +--
src/target/arm7_9_common.c | 87 +++++++++++-----------------------------
src/target/arm7_9_common.h | 6 ++-
tcl/target/imx25.cfg | 8 ++--
tcl/target/imx27.cfg | 10 ++--
tcl/target/imx31.cfg | 14 +++---
tcl/target/imx35.cfg | 12 ++---
tcl/target/samsung_s3c6410.cfg | 10 ++--
8 files changed, 58 insertions(+), 96 deletions(-)
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