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[openocd-svn] Main OpenOCD repository branch, master, updated. v0.3.0-74-gb7e4c26
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From: David B. <dbr...@us...> - 2009-11-06 05:37:03
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- Log -----------------------------------------------------------------
commit b7e4c26b9bb10e6e0ebfb07e5d43f0d62526cde2
Author: David Brownell <dbr...@us...>
Date: Thu Nov 5 20:36:42 2009 -0800
ARM7TDMI: remove forward decls
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions; get rid of arm7tdmi_register_commands(), it's
not needed (just delegated); minor whitespace declutter.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index ec7b4f9..27a8337 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -31,57 +31,17 @@
#include "target_type.h"
+/*
+ * For information about ARM7TDMI, see ARM DDI 0210C (r4p1)
+ * or ARM DDI 0029G (r3). "Debug In Depth", Appendix B,
+ * covers JTAG support.
+ */
+
#if 0
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-/* forward declarations */
-
-int arm7tdmi_target_create(struct target_s *target,Jim_Interp *interp);
-
-/* target function declarations */
-int arm7tdmi_poll(struct target_s *target);
-int arm7tdmi_halt(target_t *target);
-
-target_type_t arm7tdmi_target =
-{
- .name = "arm7tdmi",
-
- .poll = arm7_9_poll,
- .arch_state = armv4_5_arch_state,
-
- .target_request_data = arm7_9_target_request_data,
-
- .halt = arm7_9_halt,
- .resume = arm7_9_resume,
- .step = arm7_9_step,
-
- .assert_reset = arm7_9_assert_reset,
- .deassert_reset = arm7_9_deassert_reset,
- .soft_reset_halt = arm7_9_soft_reset_halt,
-
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
-
- .read_memory = arm7_9_read_memory,
- .write_memory = arm7_9_write_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
-
- .run_algorithm = armv4_5_run_algorithm,
-
- .add_breakpoint = arm7_9_add_breakpoint,
- .remove_breakpoint = arm7_9_remove_breakpoint,
- .add_watchpoint = arm7_9_add_watchpoint,
- .remove_watchpoint = arm7_9_remove_watchpoint,
-
- .register_commands = arm7tdmi_register_commands,
- .target_create = arm7tdmi_target_create,
- .init_target = arm7tdmi_init_target,
- .examine = arm7tdmi_examine,
-};
-
-int arm7tdmi_examine_debug_reason(target_t *target)
+static int arm7tdmi_examine_debug_reason(target_t *target)
{
int retval = ERROR_OK;
/* get pointers to arch-specific information */
@@ -136,7 +96,8 @@ int arm7tdmi_examine_debug_reason(target_t *target)
return ERROR_OK;
}
-static int arm7tdmi_num_bits[]={1, 32};
+static const int arm7tdmi_num_bits[] = {1, 32};
+
static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, uint32_t out, int breakpoint)
{
uint32_t values[2]={breakpoint, flip_u32(out, 32)};
@@ -152,8 +113,13 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, uint32_t out
return ERROR_OK;
}
-/* put an instruction in the ARM7TDMI pipeline or write the data bus, and optionally read data */
-static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t out, uint32_t *deprecated, int breakpoint)
+/* put an instruction in the ARM7TDMI pipeline or write the data bus,
+ * and optionally read data
+ *
+ * FIXME remove the unused "deprecated" parameter
+ */
+static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info,
+ uint32_t out, uint32_t *deprecated, int breakpoint)
{
jtag_set_end_state(TAP_DRPAUSE);
arm_jtag_scann(jtag_info, 0x1);
@@ -163,7 +129,7 @@ static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t out, uint
}
/* clock the target, reading the databus */
-int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
+static int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
{
int retval = ERROR_OK;
scan_field_t fields[2];
@@ -192,21 +158,13 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
jtag_add_runtest(0, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
-{
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- {
- return retval;
- }
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ return retval;
- if (in)
- {
- LOG_DEBUG("in: 0x%8.8x", *in);
- }
- else
- {
- LOG_ERROR("BUG: called with in == NULL");
- }
-}
+ if (in)
+ LOG_DEBUG("in: 0x%8.8x", *in);
+ else
+ LOG_ERROR("BUG: called with in == NULL");
#endif
return ERROR_OK;
@@ -243,9 +201,12 @@ void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
}
}
-static int arm7endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm7endianness(jtag_callback_data_t arg,
+ jtag_callback_data_t size, jtag_callback_data_t be,
+ jtag_callback_data_t captured)
{
- uint8_t *in = (uint8_t *)arg;
+ uint8_t *in = (uint8_t *)arg;
+
arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
return ERROR_OK;
}
@@ -254,7 +215,8 @@ static int arm7endianness(jtag_callback_data_t arg, jtag_callback_data_t size, j
* the *in pointer points to a buffer where elements of 'size' bytes
* are stored in big (be == 1) or little (be == 0) endianness
*/
-int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
+static int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
+ void *in, int size, int be)
{
int retval = ERROR_OK;
scan_field_t fields[2];
@@ -303,7 +265,8 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
return ERROR_OK;
}
-void arm7tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
+static void arm7tdmi_change_to_arm(target_t *target,
+ uint32_t *r0, uint32_t *pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -360,7 +323,8 @@ void arm7tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
* The solution is to arrange for a large out/in scan in this loop and
* and convert data afterwards.
*/
-void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
+static void arm7tdmi_read_core_regs(target_t *target,
+ uint32_t mask, uint32_t* core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -386,7 +350,8 @@ void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg
}
}
-void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
+static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
+ uint32_t mask, void* buffer, int size)
{
int i;
/* get pointers to arch-specific information */
@@ -429,7 +394,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void
}
}
-void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -449,7 +414,7 @@ void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
arm7tdmi_clock_data_in(jtag_info, xpsr);
}
-void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -480,7 +445,8 @@ void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
}
-void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
+static void arm7tdmi_write_xpsr_im8(target_t *target,
+ uint8_t xpsr_im, int rot, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -499,7 +465,8 @@ void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int sps
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
}
-void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
+static void arm7tdmi_write_core_regs(target_t *target,
+ uint32_t mask, uint32_t core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -526,7 +493,7 @@ void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
}
-void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -539,7 +506,7 @@ void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), NULL, 0);
}
-void arm7tdmi_load_hword_reg(target_t *target, int num)
+static void arm7tdmi_load_hword_reg(target_t *target, int num)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -552,7 +519,7 @@ void arm7tdmi_load_hword_reg(target_t *target, int num)
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), NULL, 0);
}
-void arm7tdmi_load_byte_reg(target_t *target, int num)
+static void arm7tdmi_load_byte_reg(target_t *target, int num)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -565,7 +532,7 @@ void arm7tdmi_load_byte_reg(target_t *target, int num)
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0);
}
-void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -578,7 +545,7 @@ void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
arm7tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), NULL, 0);
}
-void arm7tdmi_store_hword_reg(target_t *target, int num)
+static void arm7tdmi_store_hword_reg(target_t *target, int num)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -591,7 +558,7 @@ void arm7tdmi_store_hword_reg(target_t *target, int num)
arm7tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), NULL, 0);
}
-void arm7tdmi_store_byte_reg(target_t *target, int num)
+static void arm7tdmi_store_byte_reg(target_t *target, int num)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -604,7 +571,7 @@ void arm7tdmi_store_byte_reg(target_t *target, int num)
arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0);
}
-void arm7tdmi_write_pc(target_t *target, uint32_t pc)
+static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -631,7 +598,7 @@ void arm7tdmi_write_pc(target_t *target, uint32_t pc)
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
}
-void arm7tdmi_branch_resume(target_t *target)
+static void arm7tdmi_branch_resume(target_t *target)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -642,7 +609,7 @@ void arm7tdmi_branch_resume(target_t *target)
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0);
}
-void arm7tdmi_branch_resume_thumb(target_t *target)
+static void arm7tdmi_branch_resume_thumb(target_t *target)
{
LOG_DEBUG("-");
@@ -703,7 +670,7 @@ void arm7tdmi_branch_resume_thumb(target_t *target)
arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0);
}
-void arm7tdmi_build_reg_cache(target_t *target)
+static void arm7tdmi_build_reg_cache(target_t *target)
{
reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
/* get pointers to arch-specific information */
@@ -814,7 +781,7 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_
return ERROR_OK;
}
-int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
{
arm7tdmi_common_t *arm7tdmi;
@@ -825,11 +792,41 @@ int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
return ERROR_OK;
}
-int arm7tdmi_register_commands(struct command_context_s *cmd_ctx)
+/** Holds methods for ARM7TDMI targets. */
+target_type_t arm7tdmi_target =
{
- int retval;
+ .name = "arm7tdmi",
- retval = arm7_9_register_commands(cmd_ctx);
+ .poll = arm7_9_poll,
+ .arch_state = armv4_5_arch_state,
- return retval;
-}
+ .target_request_data = arm7_9_target_request_data,
+
+ .halt = arm7_9_halt,
+ .resume = arm7_9_resume,
+ .step = arm7_9_step,
+
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
+ .soft_reset_halt = arm7_9_soft_reset_halt,
+
+ .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+
+ .read_memory = arm7_9_read_memory,
+ .write_memory = arm7_9_write_memory,
+ .bulk_write_memory = arm7_9_bulk_write_memory,
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+
+ .run_algorithm = armv4_5_run_algorithm,
+
+ .add_breakpoint = arm7_9_add_breakpoint,
+ .remove_breakpoint = arm7_9_remove_breakpoint,
+ .add_watchpoint = arm7_9_add_watchpoint,
+ .remove_watchpoint = arm7_9_remove_watchpoint,
+
+ .register_commands = arm7_9_register_commands,
+ .target_create = arm7tdmi_target_create,
+ .init_target = arm7tdmi_init_target,
+ .examine = arm7tdmi_examine,
+};
diff --git a/src/target/arm7tdmi.h b/src/target/arm7tdmi.h
index b3ece44..da5c040 100644
--- a/src/target/arm7tdmi.h
+++ b/src/target/arm7tdmi.h
@@ -34,7 +34,6 @@ typedef struct arm7tdmi_common_s
arm7_9_common_t arm7_9_common;
} arm7tdmi_common_t;
-int arm7tdmi_register_commands(struct command_context_s *cmd_ctx);
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap);
int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm7tdmi_examine(struct target_s *target);
commit 1e57376c1a54e2a6097d1578aaeb387276377969
Author: David Brownell <dbr...@us...>
Date: Thu Nov 5 20:36:27 2009 -0800
ARM720: remove exports and forward decls
Unneeded exports cause confusion about the module interfaces.
Make all functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Remove unneeded indirection for the write_memory() method. Make
a table static, remove a can't-happen case with nasty exit().
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index 836d347..cb21d5f 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -29,70 +29,17 @@
#include "target_type.h"
+/*
+ * ARM720 is an ARM7TDMI-S with MMU and ETM7. For information, see
+ * ARM DDI 0229C especially Chapter 9 about debug support.
+ */
+
#if 0
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-/* cli handling */
-int arm720t_register_commands(struct command_context_s *cmd_ctx);
-
-int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-
-/* forward declarations */
-int arm720t_target_create(struct target_s *target,Jim_Interp *interp);
-int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm720t_arch_state(struct target_s *target);
-int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm720t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm720t_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm720t_soft_reset_halt(struct target_s *target);
-
-static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
-static int arm720t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
-
-target_type_t arm720t_target =
-{
- .name = "arm720t",
-
- .poll = arm7_9_poll,
- .arch_state = arm720t_arch_state,
-
- .halt = arm7_9_halt,
- .resume = arm7_9_resume,
- .step = arm7_9_step,
-
- .assert_reset = arm7_9_assert_reset,
- .deassert_reset = arm7_9_deassert_reset,
- .soft_reset_halt = arm720t_soft_reset_halt,
-
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
-
- .read_memory = arm720t_read_memory,
- .write_memory = arm720t_write_memory,
- .read_phys_memory = arm720t_read_phys_memory,
- .write_phys_memory = arm720t_write_phys_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
-
- .run_algorithm = armv4_5_run_algorithm,
-
- .add_breakpoint = arm7_9_add_breakpoint,
- .remove_breakpoint = arm7_9_remove_breakpoint,
- .add_watchpoint = arm7_9_add_watchpoint,
- .remove_watchpoint = arm7_9_remove_watchpoint,
-
- .register_commands = arm720t_register_commands,
- .target_create = arm720t_target_create,
- .init_target = arm720t_init_target,
- .examine = arm7tdmi_examine,
- .mrc = arm720t_mrc,
- .mcr = arm720t_mcr,
-
-};
-
-int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruction, int clock)
+static int arm720t_scan_cp15(target_t *target,
+ uint32_t out, uint32_t *in, int instruction, int clock)
{
int retval = ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -154,7 +101,7 @@ int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruct
return ERROR_OK;
}
-int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value)
+static int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value)
{
/* fetch CP15 opcode */
arm720t_scan_cp15(target, opcode, NULL, 1, 1);
@@ -171,7 +118,7 @@ int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value)
return ERROR_OK;
}
-int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value)
+static int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value)
{
/* fetch CP15 opcode */
arm720t_scan_cp15(target, opcode, NULL, 1, 1);
@@ -187,7 +134,7 @@ int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value)
return ERROR_OK;
}
-uint32_t arm720t_get_ttb(target_t *target)
+static uint32_t arm720t_get_ttb(target_t *target)
{
uint32_t ttb = 0x0;
@@ -199,7 +146,8 @@ uint32_t arm720t_get_ttb(target_t *target)
return ttb;
}
-void arm720t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
+static void arm720t_disable_mmu_caches(target_t *target,
+ int mmu, int d_u_cache, int i_cache)
{
uint32_t cp15_control;
@@ -216,7 +164,8 @@ void arm720t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_
arm720t_write_cp15(target, 0xee010f10, cp15_control);
}
-void arm720t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
+static void arm720t_enable_mmu_caches(target_t *target,
+ int mmu, int d_u_cache, int i_cache)
{
uint32_t cp15_control;
@@ -233,7 +182,7 @@ void arm720t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_c
arm720t_write_cp15(target, 0xee010f10, cp15_control);
}
-void arm720t_post_debug_entry(target_t *target)
+static void arm720t_post_debug_entry(target_t *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -255,7 +204,7 @@ void arm720t_post_debug_entry(target_t *target)
jtag_execute_queue();
}
-void arm720t_pre_restore_context(target_t *target)
+static void arm720t_pre_restore_context(target_t *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -267,7 +216,9 @@ void arm720t_pre_restore_context(target_t *target)
arm720t_write_cp15(target, 0xee060f10, arm720t->far_reg);
}
-int arm720t_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p)
+static int arm720t_get_arch_pointers(target_t *target,
+ armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p,
+ arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9;
@@ -305,24 +256,18 @@ int arm720t_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, ar
return ERROR_OK;
}
-int arm720t_arch_state(struct target_s *target)
+static int arm720t_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info;
arm720t_common_t *arm720t = arm7tdmi->arch_info;
- char *state[] =
+ static const char *state[] =
{
"disabled", "enabled"
};
- if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
- {
- LOG_ERROR("BUG: called for a non-ARMv4/5 target");
- exit(-1);
- }
-
LOG_USER("target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
"MMU: %s, Cache: %s",
@@ -337,7 +282,8 @@ int arm720t_arch_state(struct target_s *target)
return ERROR_OK;
}
-int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int arm720t_read_memory(struct target_s *target,
+ uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -357,18 +303,8 @@ int arm720t_read_memory(struct target_s *target, uint32_t address, uint32_t size
return retval;
}
-int arm720t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
-{
- int retval;
-
- if ((retval = arm7_9_write_memory(target, address, size, count, buffer)) != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-
-int arm720t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int arm720t_read_phys_memory(struct target_s *target,
+ uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -378,7 +314,8 @@ int arm720t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t
return armv4_5_mmu_read_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer);
}
-int arm720t_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int arm720t_write_phys_memory(struct target_s *target,
+ uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -388,8 +325,7 @@ int arm720t_write_phys_memory(struct target_s *target, uint32_t address, uint32_
return armv4_5_mmu_write_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer);
}
-
-int arm720t_soft_reset_halt(struct target_s *target)
+static int arm720t_soft_reset_halt(struct target_s *target)
{
int retval = ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -460,15 +396,13 @@ int arm720t_soft_reset_halt(struct target_s *target)
return ERROR_OK;
}
-int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+static int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
{
- arm7tdmi_init_target(cmd_ctx, target);
-
- return ERROR_OK;
+ return arm7tdmi_init_target(cmd_ctx, target);
}
-
-int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap)
+static int arm720t_init_arch_info(target_t *target,
+ arm720t_common_t *arm720t, jtag_tap_t *tap)
{
arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common;
arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common;
@@ -493,31 +427,15 @@ int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap
return ERROR_OK;
}
-int arm720t_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm720t_target_create(struct target_s *target, Jim_Interp *interp)
{
arm720t_common_t *arm720t = calloc(1,sizeof(arm720t_common_t));
- arm720t_init_arch_info(target, arm720t, target->tap);
-
- return ERROR_OK;
-}
-
-int arm720t_register_commands(struct command_context_s *cmd_ctx)
-{
- int retval;
- command_t *arm720t_cmd;
-
-
- retval = arm7tdmi_register_commands(cmd_ctx);
-
- arm720t_cmd = register_command(cmd_ctx, NULL, "arm720t", NULL, COMMAND_ANY, "arm720t specific commands");
-
- register_command(cmd_ctx, arm720t_cmd, "cp15", arm720t_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <opcode> [value]");
-
- return ERROR_OK;
+ return arm720t_init_arch_info(target, arm720t, target->tap);
}
-int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
int retval;
target_t *target = get_current_target(cmd_ctx);
@@ -580,7 +498,6 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch
return ERROR_OK;
}
-
static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
{
if (cpnum!=15)
@@ -604,4 +521,63 @@ static int arm720t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2,
return arm720t_write_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value);
}
+static int arm720t_register_commands(struct command_context_s *cmd_ctx)
+{
+ int retval;
+ command_t *arm720t_cmd;
+
+
+ retval = arm7_9_register_commands(cmd_ctx);
+
+ arm720t_cmd = register_command(cmd_ctx, NULL, "arm720t",
+ NULL, COMMAND_ANY,
+ "arm720t specific commands");
+
+ register_command(cmd_ctx, arm720t_cmd, "cp15",
+ arm720t_handle_cp15_command, COMMAND_EXEC,
+ "display/modify cp15 register <opcode> [value]");
+
+ return ERROR_OK;
+}
+
+/** Holds methods for ARM720 targets. */
+target_type_t arm720t_target =
+{
+ .name = "arm720t",
+
+ .poll = arm7_9_poll,
+ .arch_state = arm720t_arch_state,
+
+ .halt = arm7_9_halt,
+ .resume = arm7_9_resume,
+ .step = arm7_9_step,
+
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
+ .soft_reset_halt = arm720t_soft_reset_halt,
+
+ .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+
+ .read_memory = arm720t_read_memory,
+ .write_memory = arm7_9_write_memory,
+ .read_phys_memory = arm720t_read_phys_memory,
+ .write_phys_memory = arm720t_write_phys_memory,
+ .bulk_write_memory = arm7_9_bulk_write_memory,
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+ .run_algorithm = armv4_5_run_algorithm,
+
+ .add_breakpoint = arm7_9_add_breakpoint,
+ .remove_breakpoint = arm7_9_remove_breakpoint,
+ .add_watchpoint = arm7_9_add_watchpoint,
+ .remove_watchpoint = arm7_9_remove_watchpoint,
+
+ .register_commands = arm720t_register_commands,
+ .target_create = arm720t_target_create,
+ .init_target = arm720t_init_target,
+ .examine = arm7tdmi_examine,
+ .mrc = arm720t_mrc,
+ .mcr = arm720t_mcr,
+
+};
commit dd96b2c28e8ab633678c13636410f9f9a541dbd3
Author: David Brownell <dbr...@us...>
Date: Thu Nov 5 20:36:18 2009 -0800
FA526: remove exports and forward decls
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/fa526.c b/src/target/fa526.c
index 4f8c3b2..53efaae 100644
--- a/src/target/fa526.c
+++ b/src/target/fa526.c
@@ -34,53 +34,13 @@
#include "arm920t.h"
#include "target_type.h"
-int fa526_target_create(struct target_s *target, Jim_Interp *interp);
-int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-
-target_type_t fa526_target =
-{
- .name = "fa526",
-
- .poll = arm7_9_poll,
- .arch_state = arm920t_arch_state,
-
- .target_request_data = arm7_9_target_request_data,
-
- .halt = arm7_9_halt,
- .resume = arm7_9_resume,
- .step = arm7_9_step,
-
- .assert_reset = arm7_9_assert_reset,
- .deassert_reset = arm7_9_deassert_reset,
- .soft_reset_halt = arm920t_soft_reset_halt,
-
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
-
- .read_memory = arm920t_read_memory,
- .write_memory = arm920t_write_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
-
- .run_algorithm = armv4_5_run_algorithm,
-
- .add_breakpoint = arm7_9_add_breakpoint,
- .remove_breakpoint = arm7_9_remove_breakpoint,
- .add_watchpoint = arm7_9_add_watchpoint,
- .remove_watchpoint = arm7_9_remove_watchpoint,
-
- .register_commands = arm920t_register_commands,
- .target_create = fa526_target_create,
- .init_target = fa526_init_target,
- .examine = arm9tdmi_examine,
-};
-
-void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
+static void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
{
LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
}
-void fa526_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
+static void fa526_read_core_regs(target_t *target,
+ uint32_t mask, uint32_t* core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -108,7 +68,8 @@ void fa526_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[1
}
}
-void fa526_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
+static void fa526_read_core_regs_target_buffer(target_t *target,
+ uint32_t mask, void* buffer, int size)
{
int i;
/* get pointers to arch-specific information */
@@ -151,7 +112,7 @@ void fa526_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* b
}
}
-void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -178,7 +139,7 @@ void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
}
-void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -216,7 +177,8 @@ void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void fa526_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
+static void fa526_write_xpsr_im8(target_t *target,
+ uint8_t xpsr_im, int rot, int spsr)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -244,7 +206,8 @@ void fa526_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
}
}
-void fa526_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
+static void fa526_write_core_regs(target_t *target,
+ uint32_t mask, uint32_t core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -273,7 +236,7 @@ void fa526_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[1
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void fa526_write_pc(target_t *target, uint32_t pc)
+static void fa526_write_pc(target_t *target, uint32_t pc)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -301,12 +264,13 @@ void fa526_write_pc(target_t *target, uint32_t pc)
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
}
-void fa526_branch_resume_thumb(target_t *target)
+static void fa526_branch_resume_thumb(target_t *target)
{
LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
}
-int fa526_init_arch_info_2(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap)
+static int fa526_init_arch_info_2(target_t *target,
+ arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap)
{
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
@@ -370,7 +334,8 @@ int fa526_init_arch_info_2(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_t
return ERROR_OK;
}
-int fa526_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap)
+static int fa526_init_arch_info(target_t *target,
+ arm920t_common_t *arm920t, jtag_tap_t *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common;
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
@@ -406,17 +371,48 @@ int fa526_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t
return ERROR_OK;
}
-int fa526_target_create(struct target_s *target, Jim_Interp *interp)
+static int fa526_target_create(struct target_s *target, Jim_Interp *interp)
{
arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t));
- fa526_init_arch_info(target, arm920t, target->tap);
-
- return ERROR_OK;
+ return fa526_init_arch_info(target, arm920t, target->tap);
}
-int fa526_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+/** Holds methods for FA526 targets. */
+target_type_t fa526_target =
{
- arm9tdmi_init_target(cmd_ctx, target);
- return ERROR_OK;
-}
+ .name = "fa526",
+
+ .poll = arm7_9_poll,
+ .arch_state = arm920t_arch_state,
+
+ .target_request_data = arm7_9_target_request_data,
+
+ .halt = arm7_9_halt,
+ .resume = arm7_9_resume,
+ .step = arm7_9_step,
+
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
+ .soft_reset_halt = arm920t_soft_reset_halt,
+
+ .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+
+ .read_memory = arm920t_read_memory,
+ .write_memory = arm920t_write_memory,
+ .bulk_write_memory = arm7_9_bulk_write_memory,
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+
+ .run_algorithm = armv4_5_run_algorithm,
+
+ .add_breakpoint = arm7_9_add_breakpoint,
+ .remove_breakpoint = arm7_9_remove_breakpoint,
+ .add_watchpoint = arm7_9_add_watchpoint,
+ .remove_watchpoint = arm7_9_remove_watchpoint,
+
+ .register_commands = arm920t_register_commands,
+ .target_create = fa526_target_create,
+ .init_target = arm9tdmi_init_target,
+ .examine = arm9tdmi_examine,
+};
commit b52fa7492cfaf079145222d31eb8a2c9c6108ac4
Author: David Brownell <dbr...@us...>
Date: Thu Nov 5 20:36:09 2009 -0800
ARM9TDMI: remove forward decls
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 72a24b4..3110f95 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -45,48 +45,7 @@
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-/* forward declarations */
-static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp);
-
-target_type_t arm9tdmi_target =
-{
- .name = "arm9tdmi",
-
- .poll = arm7_9_poll,
- .arch_state = armv4_5_arch_state,
-
- .target_request_data = arm7_9_target_request_data,
-
- .halt = arm7_9_halt,
- .resume = arm7_9_resume,
- .step = arm7_9_step,
-
- .assert_reset = arm7_9_assert_reset,
- .deassert_reset = arm7_9_deassert_reset,
- .soft_reset_halt = arm7_9_soft_reset_halt,
-
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
-
- .read_memory = arm7_9_read_memory,
- .write_memory = arm7_9_write_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
-
- .run_algorithm = armv4_5_run_algorithm,
-
- .add_breakpoint = arm7_9_add_breakpoint,
- .remove_breakpoint = arm7_9_remove_breakpoint,
- .add_watchpoint = arm7_9_add_watchpoint,
- .remove_watchpoint = arm7_9_remove_watchpoint,
-
- .register_commands = arm9tdmi_register_commands,
- .target_create = arm9tdmi_target_create,
- .init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
-};
-
-static arm9tdmi_vector_t arm9tdmi_vectors[] =
+static const arm9tdmi_vector_t arm9tdmi_vectors[] =
{
{"reset", ARM9TDMI_RESET_VECTOR},
{"undef", ARM9TDMI_UNDEF_VECTOR},
@@ -164,8 +123,11 @@ int arm9tdmi_examine_debug_reason(target_t *target)
return ERROR_OK;
}
-/* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */
-int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed)
+/* put an instruction in the ARM9TDMI pipeline or write the data bus,
+ * and optionally read data
+ */
+int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr,
+ uint32_t out, uint32_t *in, int sysspeed)
{
int retval = ERROR_OK;
scan_field_t fields[3];
@@ -295,9 +257,12 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
-static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+static int arm9endianness(jtag_callback_data_t arg,
+ jtag_callback_data_t size, jtag_callback_data_t be,
+ jtag_callback_data_t captured)
{
- uint8_t *in = (uint8_t *)arg;
+ uint8_t *in = (uint8_t *)arg;
+
arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
return ERROR_OK;
}
@@ -306,7 +271,8 @@ static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, j
* the *in pointer points to a buffer where elements of 'size' bytes
* are stored in big (be == 1) or little (be == 0) endianness
*/
-int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
+int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
+ void *in, int size, int be)
{
int retval = ERROR_OK;
scan_field_t fields[3];
@@ -417,7 +383,8 @@ static void arm9tdmi_change_to_arm(target_t *target,
*pc -= 0xc;
}
-void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
+void arm9tdmi_read_core_regs(target_t *target,
+ uint32_t mask, uint32_t* core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -572,7 +539,8 @@ static void arm9tdmi_write_xpsr_im8(target_t *target,
}
}
-void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
+void arm9tdmi_write_core_regs(target_t *target,
+ uint32_t mask, uint32_t core_regs[16])
{
int i;
/* get pointers to arch-specific information */
@@ -849,11 +817,10 @@ int arm9tdmi_examine(struct target_s *target)
return ERROR_OK;
}
-int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
+ struct target_s *target)
{
-
arm9tdmi_build_reg_cache(target);
-
return ERROR_OK;
}
@@ -1060,3 +1027,41 @@ int arm9tdmi_register_commands(struct command_context_s *cmd_ctx)
return retval;
}
+/** Holds methods for ARM9TDMI targets. */
+target_type_t arm9tdmi_target =
+{
+ .name = "arm9tdmi",
+
+ .poll = arm7_9_poll,
+ .arch_state = armv4_5_arch_state,
+
+ .target_request_data = arm7_9_target_request_data,
+
+ .halt = arm7_9_halt,
+ .resume = arm7_9_resume,
+ .step = arm7_9_step,
+
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
+ .soft_reset_halt = arm7_9_soft_reset_halt,
+
+ .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+
+ .read_memory = arm7_9_read_memory,
+ .write_memory = arm7_9_write_memory,
+ .bulk_write_memory = arm7_9_bulk_write_memory,
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+
+ .run_algorithm = armv4_5_run_algorithm,
+
+ .add_breakpoint = arm7_9_add_breakpoint,
+ .remove_breakpoint = arm7_9_remove_breakpoint,
+ .add_watchpoint = arm7_9_add_watchpoint,
+ .remove_watchpoint = arm7_9_remove_watchpoint,
+
+ .register_commands = arm9tdmi_register_commands,
+ .target_create = arm9tdmi_target_create,
+ .init_target = arm9tdmi_init_target,
+ .examine = arm9tdmi_examine,
+};
diff --git a/src/target/arm9tdmi.h b/src/target/arm9tdmi.h
index 9dfa886..8f89316 100644
--- a/src/target/arm9tdmi.h
+++ b/src/target/arm9tdmi.h
@@ -52,16 +52,22 @@ enum arm9tdmi_vector
ARM9TDMI_FIQ_VECTOR = 0x80,
};
-extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
+extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
+ struct target_s *target);
int arm9tdmi_examine(struct target_s *target);
-extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap);
+extern int arm9tdmi_init_arch_info(target_t *target,
+ arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap);
extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
-extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed);
+extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info,
+ uint32_t instr, uint32_t out, uint32_t *in, int sysspeed);
extern int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in);
-extern int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be);
-extern void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]);
-extern void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]);
+extern int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
+ void *in, int size, int be);
+extern void arm9tdmi_read_core_regs(target_t *target,
+ uint32_t mask, uint32_t* core_regs[16]);
+extern void arm9tdmi_write_core_regs(target_t *target,
+ uint32_t mask, uint32_t core_regs[16]);
extern int arm9tdmi_examine_debug_reason(target_t *target);
commit 20ff0a9682090912e84cc5c80be92b1e0ea78216
Author: David Brownell <dbr...@us...>
Date: Thu Nov 5 20:35:53 2009 -0800
ARM966: remove exports and forward decls
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also remove needless arm966e_init_target(), in favor of the
arm9tdmi routine to which it delegates its work.
This saved over 100 bytes of code on x86_32.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 5770895..30927f0 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -32,55 +32,6 @@
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-/* forward declarations */
-int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
-int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-
-target_type_t arm966e_target =
-{
- .name = "arm966e",
-
- .poll = arm7_9_poll,
- .arch_state = armv4_5_arch_state,
-
- .target_request_data = arm7_9_target_request_data,
-
- .halt = arm7_9_halt,
- .resume = arm7_9_resume,
- .step = arm7_9_step,
-
- .assert_reset = arm7_9_assert_reset,
- .deassert_reset = arm7_9_deassert_reset,
- .soft_reset_halt = arm7_9_soft_reset_halt,
-
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
-
- .read_memory = arm7_9_read_memory,
- .write_memory = arm7_9_write_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
-
- .run_algorithm = armv4_5_run_algorithm,
-
- .add_breakpoint = arm7_9_add_breakpoint,
- .remove_breakpoint = arm7_9_remove_breakpoint,
- .add_watchpoint = arm7_9_add_watchpoint,
- .remove_watchpoint = arm7_9_remove_watchpoint,
-
- .register_commands = arm966e_register_commands,
- .target_create = arm966e_target_create,
- .init_target = arm966e_init_target,
- .examine = arm9tdmi_examine,
-};
-
-int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
-{
- arm9tdmi_init_target(cmd_ctx, target);
-
- return ERROR_OK;
-}
-
int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
@@ -100,16 +51,16 @@ int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap
return ERROR_OK;
}
-int arm966e_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm966e_target_create(struct target_s *target, Jim_Interp *interp)
{
arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t));
- arm966e_init_arch_info(target, arm966e, target->tap);
-
- return ERROR_OK;
+ return arm966e_init_arch_info(target, arm966e, target->tap);
}
-int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
+static int arm966e_get_arch_pointers(target_t *target,
+ armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p,
+ arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9;
@@ -147,7 +98,7 @@ int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, ar
return ERROR_OK;
}
-int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value)
+static int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value)
{
int retval = ERROR_OK;
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -199,6 +150,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value)
return ERROR_OK;
}
+// EXPORTED to str9x (flash)
int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value)
{
int retval = ERROR_OK;
@@ -243,7 +195,8 @@ int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value)
return ERROR_OK;
}
-int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx,
+ char *cmd, char **args, int argc)
{
int retval;
target_t *target = get_current_target(cmd_ctx);
@@ -304,14 +257,58 @@ int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch
return ERROR_OK;
}
+/** Registers commands used to access coprocessor resources. */
int arm966e_register_commands(struct command_context_s *cmd_ctx)
{
int retval;
command_t *arm966e_cmd;
retval = arm9tdmi_register_commands(cmd_ctx);
- arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
- register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
+ arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e",
+ NULL, COMMAND_ANY,
+ "arm966e specific commands");
+ register_command(cmd_ctx, arm966e_cmd, "cp15",
+ arm966e_handle_cp15_command, COMMAND_EXEC,
+ "display/modify cp15 register <num> [value]");
return retval;
}
+
+/** Holds methods for ARM966 targets. */
+target_type_t arm966e_target =
+{
+ .name = "arm966e",
+
+ .poll = arm7_9_poll,
+ .arch_state = armv4_5_arch_state,
+
+ .target_request_data = arm7_9_target_request_data,
+
+ .halt = arm7_9_halt,
+ .resume = arm7_9_resume,
+ .step = arm7_9_step,
+
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
+ .soft_reset_halt = arm7_9_soft_reset_halt,
+
+ .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+
+ .read_memory = arm7_9_read_memory,
+ .write_memory = arm7_9_write_memory,
+ .bulk_write_memory = arm7_9_bulk_write_memory,
+ .checksum_memory = arm7_9_checksum_memory,
+ .blank_check_memory = arm7_9_blank_check_memory,
+
+ .run_algorithm = armv4_5_run_algorithm,
+
+ .add_breakpoint = arm7_9_add_breakpoint,
+ .remove_breakpoint = arm7_9_remove_breakpoint,
+ .add_watchpoint = arm7_9_add_watchpoint,
+ .remove_watchpoint = arm7_9_remove_watchpoint,
+
+ .register_commands = arm966e_register_commands,
+ .target_create = arm966e_target_create,
+ .init_target = arm9tdmi_init_target,
+ .examine = arm9tdmi_examine,
+};
diff --git a/src/target/arm966e.h b/src/target/arm966e.h
index c7a5b1b..21dee1e 100644
--- a/src/target/arm966e.h
+++ b/src/target/arm966e.h
@@ -36,7 +36,6 @@ typedef struct arm966e_common_s
extern int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap);
extern int arm966e_register_commands(struct command_context_s *cmd_ctx);
-extern int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value);
extern int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value);
#endif /* ARM966E_H */
commit ed9ac9b6fe3257bb728db059f4ae689fc5469fdd
Author: David Brownell <dbr...@us...>
Date: Thu Nov 5 20:35:47 2009 -0800
ARM926: more cleanup
An init_target() wrapper isn't needed, and target_create()
can shrink a bit. Add a header comment and some doxygen.
Remove arm926ejs_catch_broken_irscan() which has been a NOP
for quite a few months now, and in any case duplicates logic
in the JTAG core to validate IR capture data. But force the
capture mask to 0x0f, so those tests are most effective.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 03adc77..7147dbf 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -29,32 +29,21 @@
#include "target_type.h"
-#if 0
-#define _DEBUG_INSTRUCTION_EXECUTION_
-#endif
+/*
+ * The ARM926 is built around the ARM9EJ-S core, and most JTAG docs
+ * are in the ARM9EJ-S Technical Reference Manual (ARM DDI 0222B) not
+ * the ARM926 manual (ARM DDI 0198E). The scan chains are:
+ *
+ * 1 ... core debugging
+ * 2 ... EmbeddedICE
+ * 3 ... external boundary scan (SoC-specific, unused here)
+ * 6 ... ETM
+ * 15 ... coprocessor 15
+ */
-static int arm926ejs_catch_broken_irscan(uint8_t *captured, void *priv,
- scan_field_t *field)
-{
- /* FIX!!!! this code should be reenabled. For now it does not check
- * the queue...*/
- return 0;
#if 0
- /* The ARM926EJ-S' instruction register is 4 bits wide */
- uint8_t t = *captured & 0xf;
- uint8_t t2 = *field->in_check_value & 0xf;
- if (t == t2)
- {
- return ERROR_OK;
- }
- else if ((t == 0x0f) || (t == 0x00))
- {
- LOG_DEBUG("caught ARM926EJ-S invalid Capture-IR result after CP15 access");
- return ERROR_OK;
- }
- return ERROR_JTAG_QUEUE_FAILED;;
+#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-}
#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0))
@@ -136,7 +125,7 @@ static int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2,
LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value);
#endif
- arm_jtag_set_instr(jtag_info, 0xc, &arm926ejs_catch_broken_irscan);
+ arm_jtag_set_instr(jtag_info, 0xc, NULL);
return ERROR_OK;
}
@@ -227,7 +216,7 @@ static int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2,
LOG_DEBUG("addr: 0x%x value: %8.8x", address, value);
#endif
- arm_jtag_set_instr(jtag_info, 0xf, &arm926ejs_catch_broken_irscan);
+ arm_jtag_set_instr(jtag_info, 0xf, NULL);
return ERROR_OK;
}
@@ -543,6 +532,7 @@ static int arm926ejs_get_arch_pointers(target_t *target,
return ERROR_OK;
}
+/** Logs summary of ARM926 state for a halted target. */
int arm926ejs_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
@@ -644,6 +634,7 @@ int arm926ejs_soft_reset_halt(struct target_s *target)
return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
}
+/** Writes a buffer, in the specified word size, with current MMU settings. */
int arm926ejs_write_memory(struct target_s *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
@@ -732,14 +723,6 @@ static int arm926ejs_read_phys_memory(struct target_s *target,
return armv4_5_mmu_read_physical(target, &arm926ejs->armv4_5_mmu, address, size, count, buffer);
}
-static int arm926ejs_init_target(struct command_context_s *cmd_ctx,
- struct target_s *target)
-{
- arm9tdmi_init_target(cmd_ctx, target);
-
- return ERROR_OK;
-}
-
int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs,
jtag_tap_t *tap)
{
@@ -782,9 +765,10 @@ static int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp)
{
arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t));
- arm926ejs_init_arch_info(target, arm926ejs, target->tap);
+ /* ARM9EJ-S core always reports 0x1 in Capture-IR */
+ target->tap->ir_capture_mask = 0x0f;
- return ERROR_OK;
+ return arm926ejs_init_arch_info(target, arm926ejs, target->tap);
}
static int arm926ejs_handle_cp15_command(struct command_context_s *cmd_ctx,
@@ -915,6 +899,7 @@ static int arm926ejs_mmu(struct target_s *target, int *enabled)
return ERROR_OK;
}
+/** Registers commands to access coprocessor, cache, and debug resources. */
int arm926ejs_register_commands(struct command_context_s *cmd_ctx)
{
int retval;
@@ -938,6 +923,7 @@ int arm926ejs_register_commands(struct command_context_s *cmd_ctx)
return retval;
}
+/** Holds methods for ARM926 targets. */
target_type_t arm926ejs_target =
{
.name = "arm926ejs",
@@ -972,7 +958,7 @@ target_type_t arm926ejs_target =
.register_commands = arm926ejs_register_commands,
.target_create = arm926ejs_target_create,
- .init_target = arm926ejs_init_target,
+ .init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,
@@ -982,4 +968,3 @@ target_type_t arm926ejs_target =
.mrc = arm926ejs_mrc,
.mcr = arm926ejs_mcr,
};
-
commit aab023570b7cc8f884715fc6a8af9c296d24ea8e
Author: David Brownell <dbr...@us...>
Date: Thu Nov 5 20:35:37 2009 -0800
ARM920: remove exports and forward decls
Unneeded exports cause confusion about the module interfaces.
Make most functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
This saved almost 900 bytes of code on x86_32; it seems the
compiler can leverage its knowledge that these functions are
not called from the outside world...
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 40f4b4d..1c63327 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -26,73 +26,33 @@
#include "target_type.h"
+/*
+ * For information about the ARM920T, see ARM DDI 0151C especially
+ * Chapter 9 about debug support, which shows how to manipulate each
+ * of the different scan chains:
+ *
+ * 0 ... ARM920 signals, e.g. to rest of SOC (unused here)
+ * 1 ... debugging; watchpoint and breakpoint status, etc; also
+ * MMU and cache access in conjunction with scan chain 15
+ * 2 ... EmbeddedICE
+ * 3 ... external boundary scan (SoC-specific, unused here)
+ * 4 ... access to cache tag RAM
+ * 6 ... ETM9
+ * 15 ... access coprocessor 15, "physical" or "interpreted" modes
+ * "interpreted" works with a few actual MRC/MCR instructions
+ * "physical" provides register-like behaviors.
+ *
+ * The ARM922T is similar, but with smaller caches (8K each, vs 16K).
+ */
+
#if 0
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-/* cli handling */
-int arm920t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int arm920t_handle_cp15i_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int arm920t_handle_cache_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int arm920t_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm920t_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-
-int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-
-/* forward declarations */
-int arm920t_target_create(struct target_s *target, Jim_Interp *interp);
-int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
-static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
-static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
-
-
-target_type_t arm920t_target =
-{
- .name = "arm920t",
-
- .poll = arm7_9_poll,
- .arch_state = arm920t_arch_state,
-
- .target_request_data = arm7_9_target_request_data,
-
- .halt = arm7_9_halt,
- .resume = arm7_9_resume,
- .step = arm7_9_step,
-
- .assert_reset = arm7_9_assert_reset,
- .deassert_reset = arm7_9_deassert_reset,
- .soft_reset_halt = arm920t_soft_reset_halt,
-
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
-
- .read_memory = arm920t_read_memory,
- .write_memory = arm920t_write_memory,
- .read_phys_memory = arm920t_read_phys_memory,
- .write_phys_memory = arm920t_write_phys_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
-
- .run_algorithm = armv4_5_run_algorithm,
-
- .add_breakpoint = arm7_9_add_breakpoint,
- .remove_breakpoint = arm7_9_remove_breakpoint,
- .add_watchpoint = arm7_9_add_watchpoint,
- .remove_watchpoint = arm7_9_remove_watchpoint,
-
- .register_commands = arm920t_register_commands,
- .target_create = arm920t_target_create,
- .init_target = arm920t_init_target,
- .examine = arm9tdmi_examine,
- .mrc = arm920t_mrc,
- .mcr = arm920t_mcr,
-};
-
-int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value)
+static int arm920t_read_cp15_physical(target_t *target,
+ int reg_addr, uint32_t *value)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -134,7 +94,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value)
jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
- #ifdef _DEBUG_INSTRUCTION_EXECUTION_
+#ifdef _DEBUG_INSTRUCTION_EXECUTION_
jtag_execute_queue();
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
#endif
@@ -142,7 +102,8 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, ui...
[truncated message content] |
