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[openocd-svn] Main OpenOCD repository branch, master, updated. v0.3.0-23-g0f3117c
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From: Øyvind H. <go...@us...> - 2009-11-06 00:02:14
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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 0f3117c19d3b0bf8d693b25c2e97ff874d8acc99
Author: Ãyvind Harboe <oyv...@zy...>
Date: Tue Nov 3 12:54:26 2009 +0100
arm920t: add mrcmcr interface fn's.
The arm920t has a concept of read modify write cycles
that may have to be represented in the mrcmcr interface
eventually.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 835e4ee..2556002 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -46,6 +46,10 @@ int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ
#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
+static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+
+
target_type_t arm920t_target =
{
.name = "arm920t",
@@ -84,6 +88,8 @@ target_type_t arm920t_target =
.target_create = arm920t_target_create,
.init_target = arm920t_init_target,
.examine = arm9tdmi_examine,
+ .mrc = arm920t_mrc,
+ .mcr = arm920t_mcr,
};
int arm920t_read_cp15_physical(target_t *target, int reg_addr, uint32_t *value)
@@ -1407,3 +1413,26 @@ int arm920t_handle_cache_info_command(struct command_context_s *cmd_ctx, char *c
return armv4_5_handle_cache_info_command(cmd_ctx, &arm920t->armv4_5_mmu.armv4_5_cache);
}
+
+
+static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+{
+ if (cpnum!=15)
+ {
+ LOG_ERROR("Only cp15 is supported");
+ return ERROR_FAIL;
+ }
+
+ return arm920t_read_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value);
+}
+
+static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+{
+ if (cpnum!=15)
+ {
+ LOG_ERROR("Only cp15 is supported");
+ return ERROR_FAIL;
+ }
+
+ return arm920t_write_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value);
+}
commit dc98c64d714c3c2e04bb96400955864b59655575
Author: Ãyvind Harboe <oyv...@zy...>
Date: Tue Oct 27 13:43:42 2009 +0100
arm11: check if target is halted before executing mrc/mcr commands.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/target/arm11.c b/src/target/arm11.c
index f1e062a..5411b04 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -2201,6 +2201,13 @@ int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args,
static int arm11_mrc_inner(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value, bool read)
{
int retval;
+
+ if (target->state != TARGET_HALTED)
+ {
+ LOG_ERROR("Target not halted");
+ return ERROR_FAIL;
+ }
+
arm11_common_t * arm11 = target->arch_info;
uint32_t instr = 0xEE000010 |
commit 051eaf795023e990519b093423dd697b4d757f10
Author: Ãyvind Harboe <oyv...@zy...>
Date: Mon Oct 26 18:57:52 2009 +0100
target: fix ordering of arguments to mcr and mrc commands
Now matches machine code syntax and old arm11 syntax.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/target/target.c b/src/target/target.c
index 9b07df1..9502490 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -722,25 +722,25 @@ static int arm_cp_check(struct target_s *target, int cpnum, uint32_t op1, uint32
return ERROR_FAIL;
}
- if (op1>7)
+ if (op1 > 7)
{
LOG_ERROR("Illegal op1");
return ERROR_FAIL;
}
- if (op2>7)
+ if (op2 > 7)
{
LOG_ERROR("Illegal op2");
return ERROR_FAIL;
}
- if (CRn>15)
+ if (CRn > 15)
{
LOG_ERROR("Illegal CRn");
return ERROR_FAIL;
}
- if (CRm>7)
+ if (CRm > 15)
{
LOG_ERROR("Illegal CRm");
return ERROR_FAIL;
@@ -4899,19 +4899,19 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
if (e != JIM_OK) {
return e;
}
- op2 = l;
+ CRn = l;
e = Jim_GetLong(interp, argv[4], &l);
if (e != JIM_OK) {
return e;
}
- CRn = l;
+ CRm = l;
e = Jim_GetLong(interp, argv[5], &l);
if (e != JIM_OK) {
return e;
}
- CRm = l;
+ op2 = l;
value = 0;
commit 4e3c2676f15a130d0594b7c5164ae09f8bd41648
Author: Ãyvind Harboe <oyv...@zy...>
Date: Mon Oct 26 18:53:19 2009 +0100
target: check args to mrc/mcr.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/target/target.c b/src/target/target.c
index d4662f7..9b07df1 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -722,6 +722,30 @@ static int arm_cp_check(struct target_s *target, int cpnum, uint32_t op1, uint32
return ERROR_FAIL;
}
+ if (op1>7)
+ {
+ LOG_ERROR("Illegal op1");
+ return ERROR_FAIL;
+ }
+
+ if (op2>7)
+ {
+ LOG_ERROR("Illegal op2");
+ return ERROR_FAIL;
+ }
+
+ if (CRn>15)
+ {
+ LOG_ERROR("Illegal CRn");
+ return ERROR_FAIL;
+ }
+
+ if (CRm>7)
+ {
+ LOG_ERROR("Illegal CRm");
+ return ERROR_FAIL;
+ }
+
return ERROR_OK;
}
commit 4441c1ffdcc30a3c51a6d407a2f178a1b3fba28a
Author: Ãyvind Harboe <oyv...@zy...>
Date: Mon Oct 26 14:39:32 2009 +0100
ARM11: added mrc/mcr support to arm11 code.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/TODO b/TODO
index 11318a9..8713e81 100644
--- a/TODO
+++ b/TODO
@@ -143,7 +143,7 @@ Once the above are completed:
- regression: "reset halt" between 729(works) and 788(fails): @par
https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
- mcr/mrc target->type support
- - missing from ARM11, ARM920t, ARM966e, XScale.
+ - missing from ARM920t, ARM966e, XScale.
It's possible that the current syntax is unable to support read-modify-write
operations(see arm966e).
- mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 1e82b93..f1e062a 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -60,6 +60,10 @@ bool arm11_config_hardware_step = false;
#define ARM11_HANDLER(x) \
.x = arm11_##x
+
+static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+
target_type_t arm11_target =
{
.name = "arm11",
@@ -97,6 +101,9 @@ target_type_t arm11_target =
ARM11_HANDLER(target_create),
ARM11_HANDLER(init_target),
ARM11_HANDLER(examine),
+ .mrc = arm11_mrc,
+ .mcr = arm11_mcr,
+
};
int arm11_regs_arch_type = -1;
@@ -2191,6 +2198,52 @@ int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args,
return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, false);
}
+static int arm11_mrc_inner(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value, bool read)
+{
+ int retval;
+ arm11_common_t * arm11 = target->arch_info;
+
+ uint32_t instr = 0xEE000010 |
+ (cpnum << 8) |
+ (op1 << 21) |
+ (CRn << 16) |
+ (CRm << 0) |
+ (op2 << 5);
+
+ if (read)
+ instr |= 0x00100000;
+
+ retval = arm11_run_instr_data_prepare(arm11);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (read)
+ {
+ retval = arm11_run_instr_data_from_core_via_r0(arm11, instr, value);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+ else
+ {
+ retval = arm11_run_instr_data_to_core_via_r0(arm11, instr, *value);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
+ return arm11_run_instr_data_finish(arm11);
+}
+
+static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+{
+ return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, value, true);
+}
+
+static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+{
+ return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
+}
+
+
int arm11_register_commands(struct command_context_s *cmd_ctx)
{
FNC_INFO;
commit cca7cf1e74ef0fd910e090eaa22c9099c30b06c9
Author: Ãyvind Harboe <oyv...@zy...>
Date: Sat Oct 24 14:50:57 2009 +0200
TODO: Wrote up list of remaining tasks for target->type->mrc/mcr
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/TODO b/TODO
index 7bdd626..11318a9 100644
--- a/TODO
+++ b/TODO
@@ -142,6 +142,12 @@ Once the above are completed:
https://lists.berlios.de/pipermail/openocd-development/2009-May/006590.html
- regression: "reset halt" between 729(works) and 788(fails): @par
https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
+- mcr/mrc target->type support
+ - missing from ARM11, ARM920t, ARM966e, XScale.
+ It's possible that the current syntax is unable to support read-modify-write
+ operations(see arm966e).
+ - mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been
+ tested from: arm926ejs, arm720t, cortex_a8
- ARM7/9:
- clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par
https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html
commit b64503e37f1080b8d78cc9303363179ae8e38269
Author: Ãyvind Harboe <oyv...@zy...>
Date: Sat Oct 24 13:24:35 2009 +0200
target: Only register mrc mcr commands when one of the targets support them.
This avoids polluting help for targets that can never support mrc/mcr
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/target/target.c b/src/target/target.c
index 55fc2c8..d4662f7 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -816,11 +816,22 @@ int target_init(struct command_context_s *cmd_ctx)
if (target->type->mcr == NULL)
{
target->type->mcr = default_mcr;
+ } else
+ {
+ /* FIX! multiple targets will generally register global commands
+ * multiple times. Only register this one if *one* of the
+ * targets need the command. Hmm... make it a command on the
+ * Jim Tcl target object?
+ */
+ register_jim(cmd_ctx, "mcr", jim_mcrmrc, "write coprocessor <cpnum> <op1> <op2> <CRn> <CRm> <value>");
}
if (target->type->mrc == NULL)
{
target->type->mrc = default_mrc;
+ } else
+ {
+ register_jim(cmd_ctx, "mrc", jim_mcrmrc, "read coprocessor <cpnum> <op1> <op2> <CRn> <CRm>");
}
@@ -1660,9 +1671,6 @@ int target_register_user_commands(struct command_context_s *cmd_ctx)
register_jim(cmd_ctx, "ocd_mem2array", jim_mem2array, "read memory and return as a TCL array for script processing <ARRAYNAME> <WIDTH = 32/16/8> <ADDRESS> <COUNT>");
register_jim(cmd_ctx, "ocd_array2mem", jim_array2mem, "convert a TCL array to memory locations and write the values <ARRAYNAME> <WIDTH = 32/16/8> <ADDRESS> <COUNT>");
- register_jim(cmd_ctx, "mrc", jim_mcrmrc, "read coprocessor <cpnum> <op1> <op2> <CRn> <CRm>");
- register_jim(cmd_ctx, "mcr", jim_mcrmrc, "write coprocessor <cpnum> <op1> <op2> <CRn> <CRm> <value>");
-
register_command(cmd_ctx, NULL, "fast_load_image", handle_fast_load_image_command, COMMAND_ANY,
"same args as load_image, image stored in memory - mainly for profiling purposes");
commit 1ebdc244941c02503fc042e538991d617157184f
Author: Ãyvind Harboe <oyv...@zy...>
Date: Sat Oct 24 13:17:04 2009 +0200
cortex_a8: add mrc mcr interface.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 11068ba..29fffae 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -70,6 +70,11 @@ int cortex_a8_dap_write_coreregister_u32(target_t *target,
int cortex_a8_assert_reset(target_t *target);
int cortex_a8_deassert_reset(target_t *target);
+static int cortex_a8_mrc(target_t *target, int cpnum, uint32_t op1,
+ uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+static int cortex_a8_mcr(target_t *target, int cpnum, uint32_t op1,
+ uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+
target_type_t cortexa8_target =
{
.name = "cortex_a8",
@@ -106,6 +111,8 @@ target_type_t cortexa8_target =
.target_create = cortex_a8_target_create,
.init_target = cortex_a8_init_target,
.examine = cortex_a8_examine,
+ .mrc = cortex_a8_mrc,
+ .mcr = cortex_a8_mcr,
};
/*
@@ -275,6 +282,28 @@ int cortex_a8_write_cp15(target_t *target, uint32_t op1, uint32_t op2,
return cortex_a8_write_cp(target, value, 15, op1, CRn, CRm, op2);
}
+static int cortex_a8_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+{
+ if (cpnum!=15)
+ {
+ LOG_ERROR("Only cp15 is supported");
+ return ERROR_FAIL;
+ }
+ return cortex_a8_read_cp15(target, op1, op2, CRn, CRm, value);
+}
+
+static int cortex_a8_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+{
+ if (cpnum!=15)
+ {
+ LOG_ERROR("Only cp15 is supported");
+ return ERROR_FAIL;
+ }
+ return cortex_a8_write_cp15(target, op1, op2, CRn, CRm, value);
+}
+
+
+
int cortex_a8_dap_read_coreregister_u32(target_t *target,
uint32_t *value, int regnum)
{
-----------------------------------------------------------------------
Summary of changes:
TODO | 6 ++++
src/target/arm11.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++
src/target/arm920t.c | 29 +++++++++++++++++++++++
src/target/cortex_a8.c | 29 +++++++++++++++++++++++
src/target/target.c | 44 ++++++++++++++++++++++++++++++----
5 files changed, 162 insertions(+), 6 deletions(-)
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