From: David B. <dbr...@us...> - 2009-10-28 03:26:12
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via 76afa936ba4bfa5a5780dbad562c6637c252524b (commit) via 39dd68bca649e9275c602fa212f448ae8497f306 (commit) from 993fe4ab633eff4f04dd63e4751ccc2a6ea2d52e (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 76afa936ba4bfa5a5780dbad562c6637c252524b Author: Nicolas Pitre <ni...@fl...> Date: Tue Oct 27 21:19:43 2009 -0400 ARM: fix single-step of Thumb unconditional branch Only type 1 branch instruction has a condition code, not type 2. Currently they're both tagged with ARM_B which doesn't allow for the distinction. Signed-off-by: Nicolas Pitre <ni...@ma...> Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index c50a52c..27957b2 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -317,8 +317,8 @@ int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_si return retval; instruction_size = 2; - /* check condition code (only for branch instructions) */ - if (instruction.type == ARM_B && + /* check condition code (only for branch (1) instructions) */ + if ((opcode & 0xf000) == 0xd000 && !thumb_pass_branch_condition(sim->get_cpsr(sim, 0, 32), opcode)) { if (dry_run_pc) commit 39dd68bca649e9275c602fa212f448ae8497f306 Author: Nicolas Pitre <ni...@fl...> Date: Tue Oct 27 21:19:42 2009 -0400 ARM: fix target address when disassembling Thumb BLX A Thumb BLX instruction is branching to ARM code, and therefore the first 2 bits of the target address must be cleared. Signed-off-by: Nicolas Pitre <ni...@ma...> Signed-off-by: David Brownell <dbr...@us...> diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 5b0046b..ee087b1 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -1768,6 +1768,7 @@ static int evaluate_b_bl_blx_thumb(uint16_t opcode, case 1: instruction->type = ARM_BLX; mnemonic = "BLX"; + target_address &= 0xfffffffc; break; /* BL/BLX prefix */ case 2: ----------------------------------------------------------------------- Summary of changes: src/target/arm_disassembler.c | 1 + src/target/arm_simulator.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) hooks/post-receive -- Main OpenOCD repository |