From: <ml...@ma...> - 2009-10-02 18:50:45
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Author: mlu Date: 2009-10-02 18:50:42 +0200 (Fri, 02 Oct 2009) New Revision: 2795 Modified: trunk/src/target/cortex_a8.c Log: It is not possible to invalidate I-Cache on memory writes while the target is running Modified: trunk/src/target/cortex_a8.c =================================================================== --- trunk/src/target/cortex_a8.c 2009-10-02 16:44:16 UTC (rev 2794) +++ trunk/src/target/cortex_a8.c 2009-10-02 16:50:42 UTC (rev 2795) @@ -1332,6 +1332,8 @@ exit(-1); } + if (target->state == TARGET_HALTED) + { /* The Cache handling will NOT work with MMU active, the wrong addresses will be invalidated */ /* invalidate I-Cache */ if (armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled) @@ -1349,6 +1351,7 @@ for (uint32_t cacheline=address; cacheline<address+size*count; cacheline+=64) armv7a->write_cp15(target, 0, 1, 7, 6, cacheline); /* U/D cache to PoC */ } + } return retval; } |