[Openocd-svn] r2740 - trunk/tcl/target

[dbrownell at B. <dbr...@ma...>]

Author: dbrownell
Date: 2009-09-21 02:37:58 +0200 (Mon, 21 Sep 2009)
New Revision: 2740

Modified:
   trunk/tcl/target/ti_dm355.cfg
   trunk/tcl/target/ti_dm365.cfg
   trunk/tcl/target/ti_dm6446.cfg
Log:
Ensure that DaVinci chips can't start with a too-fast JTAG clock.
It can be sped up later, once it's known the PLLs are active.

Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.


Modified: trunk/tcl/target/ti_dm355.cfg
===================================================================
--- trunk/tcl/target/ti_dm355.cfg	2009-09-21 00:04:35 UTC (rev 2739)
+++ trunk/tcl/target/ti_dm355.cfg	2009-09-21 00:37:58 UTC (rev 2740)
@@ -86,6 +86,12 @@
 	-work-area-size 0x4000 \
 	-work-area-backup 0
 
+# be absolutely certain the JTAG clock will work with the worst-case
+# CLKIN = 24 MHz (best case: 36 MHz) even when no bootloader turns
+# on the PLL and starts using it.  OK to speed up after clock setup.
+jtag_rclk 1500
+$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable
 

Modified: trunk/tcl/target/ti_dm365.cfg
===================================================================
--- trunk/tcl/target/ti_dm365.cfg	2009-09-21 00:04:35 UTC (rev 2739)
+++ trunk/tcl/target/ti_dm365.cfg	2009-09-21 00:37:58 UTC (rev 2740)
@@ -88,6 +88,12 @@
 	-work-area-size 0x4000 \
 	-work-area-backup 0
 
+# be absolutely certain the JTAG clock will work with the worst-case
+# CLKIN = 19.2 MHz (best case: 36 MHz) even when no bootloader turns
+# on the PLL and starts using it.  OK to speed up after clock setup.
+jtag_rclk 1500
+$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable
 

Modified: trunk/tcl/target/ti_dm6446.cfg
===================================================================
--- trunk/tcl/target/ti_dm6446.cfg	2009-09-21 00:04:35 UTC (rev 2739)
+++ trunk/tcl/target/ti_dm6446.cfg	2009-09-21 00:37:58 UTC (rev 2740)
@@ -68,6 +68,12 @@
 target create $_TARGETNAME arm926ejs -chain-position $_TARGETNAME
 $_TARGETNAME configure -work-area-phys 0x0000a000 -work-area-size 0x2000
 
+# be absolutely certain the JTAG clock will work with the worst-case
+# CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
+# on the PLL and starts using it.  OK to speed up after clock setup.
+jtag_rclk 1500
+$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable