[Openocd-svn] r2677 - trunk/src/target

[<ml...@ma...>]

Author: mlu
Date: 2009-09-08 17:31:24 +0200 (Tue, 08 Sep 2009)
New Revision: 2677

Modified:
   trunk/src/target/cortex_a8.c
Log:
Load PC with bit 0 set to 1 when resuming  to say in Thumb instruction state.

Modified: trunk/src/target/cortex_a8.c
===================================================================
--- trunk/src/target/cortex_a8.c	2009-09-08 06:18:45 UTC (rev 2676)
+++ trunk/src/target/cortex_a8.c	2009-09-08 15:31:24 UTC (rev 2677)
@@ -85,7 +85,6 @@
 	.deassert_reset = NULL,
 	.soft_reset_halt = NULL,
 
-//	.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
 	.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
 
 	.read_memory = cortex_a8_read_memory,
@@ -509,6 +508,13 @@
 	{
 		resume_pc &= 0xFFFFFFFC;
 	}
+	/* When the return address is loaded into PC
+	 * bit 0 must be 1 to stay in Thumb state
+	 */
+	if (armv7a->core_state == ARMV7A_STATE_THUMB)
+	{
+		resume_pc |= 0x1;
+	}
 	LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc);
 	buf_set_u32(ARMV7A_CORE_REG_MODE(armv4_5->core_cache,
 				armv4_5->core_mode, 15).value,
@@ -592,7 +598,6 @@
 	retval = mem_ap_write_atomic_u32(swjdp,
 			OMAP3530_DEBUG_BASE + CPUDBG_DSCR, dscr);
 
-
 	/* Examine debug reason */
 	switch ((cortex_a8->cpudbg_dscr >> 2)&0xF)
 	{