[Openocd-svn] r2568 - trunk/src/target

[oharboe at B. <oh...@ma...>]

Author: oharboe
Date: 2009-07-26 22:00:39 +0200 (Sun, 26 Jul 2009)
New Revision: 2568

Modified:
   trunk/src/target/arm_disassembler.c
Log:
David Brownell <da...@pa...> More testcase work:

       A5.3.11 Data processing (shifted register)

The usual kinds of problems; the most noteworthy were that
the "S"et flags bit was mis-handled in these instructions.
---
This is the last patch from a quickie set of tests covering all
encodings of the instructions with 32-bit opcodes.  There may
be some corner cases left, plus the instructions that aren't
yet handled, but the Thumb2 disassembler is no longer just
"lightly" tested with GCC output ... the new code paths have
mostly been verified.

Modified: trunk/src/target/arm_disassembler.c
===================================================================
--- trunk/src/target/arm_disassembler.c	2009-07-26 19:59:33 UTC (rev 2567)
+++ trunk/src/target/arm_disassembler.c	2009-07-26 20:00:39 UTC (rev 2568)
@@ -1395,6 +1395,7 @@
 	}
 	else
 	{
+		/* REVISIT:  if reg_imm == 0, display as "MOVS" */
 		instruction->type = ARM_ADD;
 		mnemonic = "ADDS";
 	}
@@ -3017,17 +3018,18 @@
 	char *mnemonic;
 	char *suffix = "";
 
-	immed |= (opcode >> 10) & 0x7;
-	if (opcode & (1 << 21))
+	immed |= (opcode >> 10) & 0x1c;
+	if (opcode & (1 << 20))
 		suffix = "S";
 
 	switch (op) {
 	case 0:
 		if (rd == 0xf) {
-			if (!(opcode & (1 << 21)))
+			if (!(opcode & (1 << 20)))
 				return ERROR_INVALID_ARGUMENTS;
 			instruction->type = ARM_TST;
 			mnemonic = "TST";
+			suffix = "";
 			goto two;
 		}
 		instruction->type = ARM_AND;
@@ -3058,7 +3060,7 @@
 				break;
 			default:
 				if (immed == 0) {
-					sprintf(cp, "RRX%s.W\tr%d, r%d",
+					sprintf(cp, "RRX%s\tr%d, r%d",
 						suffix, rd,
 						(int) (opcode & 0xf));
 					return ERROR_OK;
@@ -3085,10 +3087,11 @@
 		break;
 	case 4:
 		if (rd == 0xf) {
-			if (!(opcode & (1 << 21)))
+			if (!(opcode & (1 << 20)))
 				return ERROR_INVALID_ARGUMENTS;
 			instruction->type = ARM_TEQ;
 			mnemonic = "TEQ";
+			suffix = "";
 			goto two;
 		}
 		instruction->type = ARM_EOR;
@@ -3096,10 +3099,11 @@
 		break;
 	case 8:
 		if (rd == 0xf) {
-			if (!(opcode & (1 << 21)))
+			if (!(opcode & (1 << 20)))
 				return ERROR_INVALID_ARGUMENTS;
 			instruction->type = ARM_CMN;
 			mnemonic = "CMN";
+			suffix = "";
 			goto two;
 		}
 		instruction->type = ARM_ADD;
@@ -3119,6 +3123,7 @@
 				return ERROR_INVALID_ARGUMENTS;
 			instruction->type = ARM_CMP;
 			mnemonic = "CMP";
+			suffix = "";
 			goto two;
 		}
 		instruction->type = ARM_SUB;
@@ -3146,13 +3151,17 @@
 		break;
 	case 1:
 		suffix = "LSR";
+		if (immed == 32)
+			immed = 0;
 		break;
 	case 2:
 		suffix = "ASR";
+		if (immed == 32)
+			immed = 0;
 		break;
 	case 3:
 		if (immed == 0) {
-			strcpy(cp, "RRX");
+			strcpy(cp, ", RRX");
 			return ERROR_OK;
 		}
 		suffix = "ROR";