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From: <du...@ma...> - 2009-06-21 05:16:08
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Author: duane
Date: 2009-06-21 05:16:05 +0200 (Sun, 21 Jun 2009)
New Revision: 2311
Modified:
trunk/src/target/armv7m.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/armv7m.c
===================================================================
--- trunk/src/target/armv7m.c 2009-06-21 03:15:59 UTC (rev 2310)
+++ trunk/src/target/armv7m.c 2009-06-21 03:16:05 UTC (rev 2311)
@@ -231,7 +231,7 @@
armv7m->core_cache->reg_list[num].dirty = armv7m->core_cache->reg_list[num].valid;
return ERROR_JTAG_DEVICE_ERROR;
}
- LOG_DEBUG("write core reg %i value 0x%x", num , reg_value);
+ LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
armv7m->core_cache->reg_list[num].valid = 1;
armv7m->core_cache->reg_list[num].dirty = 0;
@@ -316,7 +316,7 @@
armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
if (pc != exit_point)
{
- LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
+ LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
return ERROR_TARGET_TIMEOUT;
}
@@ -444,7 +444,7 @@
regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
if (regvalue != context[i])
{
- LOG_DEBUG("restoring register %s with value 0x%8.8x", armv7m->core_cache->reg_list[i].name, context[i]);
+ LOG_DEBUG("restoring register %s with value 0x%8.8" PRIx32 "", armv7m->core_cache->reg_list[i].name, context[i]);
buf_set_u32(armv7m->core_cache->reg_list[i].value, 0, 32, context[i]);
armv7m->core_cache->reg_list[i].valid = 1;
armv7m->core_cache->reg_list[i].dirty = 1;
@@ -461,7 +461,7 @@
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
- LOG_USER("target halted due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
+ LOG_USER("target halted due to %s, current mode: %s %s\nxPSR: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "",
Jim_Nvp_value2name_simple( nvp_target_debug_reason,target->debug_reason)->name,
armv7m_mode_strings[armv7m->core_mode],
armv7m_exception_string(armv7m->exception_number),
@@ -720,7 +720,7 @@
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "0x%8.8x", baseaddr);
+ command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr);
if (apselsave != apsel)
{
@@ -756,7 +756,7 @@
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "0x%8.8x", apid);
+ command_print(cmd_ctx, "0x%8.8" PRIx32 "", apid);
if (apselsave != apsel)
{
dap_ap_select(swjdp, apselsave);
@@ -782,7 +782,7 @@
dap_ap_select(swjdp, apsel);
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "ap %i selected, identification register 0x%8.8x", apsel, apid);
+ command_print(cmd_ctx, "ap %i selected, identification register 0x%8.8" PRIx32 "", (int)apsel, apid);
return retval;
}
@@ -801,7 +801,7 @@
}
swjdp->memaccess_tck = memaccess_tck;
- command_print(cmd_ctx, "memory bus access delay set to %i tck", swjdp->memaccess_tck);
+ command_print(cmd_ctx, "memory bus access delay set to %i tck", (int)(swjdp->memaccess_tck));
return ERROR_OK;
}
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