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[Openocd-svn] r2280 - trunk/src/flash
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From: <zw...@ma...> - 2009-06-18 09:11:08
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Author: zwelch
Date: 2009-06-18 09:10:25 +0200 (Thu, 18 Jun 2009)
New Revision: 2280
Modified:
trunk/src/flash/aduc702x.c
trunk/src/flash/at91sam7.c
trunk/src/flash/at91sam7.h
trunk/src/flash/avrf.c
trunk/src/flash/cfi.c
trunk/src/flash/cfi.h
trunk/src/flash/davinci_nand.c
trunk/src/flash/ecos.c
trunk/src/flash/flash.c
trunk/src/flash/flash.h
trunk/src/flash/lpc2000.c
trunk/src/flash/lpc2000.h
trunk/src/flash/lpc288x.c
trunk/src/flash/lpc288x.h
trunk/src/flash/lpc3180_nand_controller.c
trunk/src/flash/lpc3180_nand_controller.h
trunk/src/flash/mflash.c
trunk/src/flash/mflash.h
trunk/src/flash/nand.c
trunk/src/flash/nand.h
trunk/src/flash/non_cfi.h
trunk/src/flash/ocl.c
trunk/src/flash/orion_nand.c
trunk/src/flash/pic32mx.c
trunk/src/flash/pic32mx.h
trunk/src/flash/s3c2440_nand.c
trunk/src/flash/s3c24xx_nand.h
trunk/src/flash/stellaris.c
trunk/src/flash/stellaris.h
trunk/src/flash/stm32x.c
trunk/src/flash/stm32x.h
trunk/src/flash/str7x.c
trunk/src/flash/str7x.h
trunk/src/flash/str9x.c
trunk/src/flash/str9x.h
trunk/src/flash/str9xpec.c
trunk/src/flash/str9xpec.h
trunk/src/flash/tms470.c
trunk/src/flash/tms470.h
Log:
Transform 'u32' to 'uint32_t' in src/flash.
- Replace '\([^_]\)u32' with '\1uint32_t'.
Modified: trunk/src/flash/aduc702x.c
===================================================================
--- trunk/src/flash/aduc702x.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/aduc702x.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -33,9 +33,9 @@
static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
-static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
-static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int aduc702x_probe(struct flash_bank_s *bank);
static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
static int aduc702x_protect_check(struct flash_bank_s *bank);
@@ -54,14 +54,14 @@
#define ADUC702x_FLASH_FEEHIDE (7*4)
typedef struct {
- u32 feesta;
- u32 feemod;
- u32 feecon;
- u32 feedat;
- u32 feeadr;
- u32 feesign;
- u32 feepro;
- u32 feehide;
+ uint32_t feesta;
+ uint32_t feemod;
+ uint32_t feecon;
+ uint32_t feedat;
+ uint32_t feeadr;
+ uint32_t feesign;
+ uint32_t feepro;
+ uint32_t feehide;
} ADUC702x_FLASH_MMIO;
typedef struct
@@ -111,7 +111,7 @@
//aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
int i = 0;
- u32 offset = 0;
+ uint32_t offset = 0;
// sector size is 512
bank->num_sectors = bank->size / 512;
@@ -139,7 +139,7 @@
//int res;
int x;
int count;
- //u32 v;
+ //uint32_t v;
target_t *target = bank->target;
aduc702x_set_write_enable(target, 1);
@@ -193,13 +193,13 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
target_t *target = bank->target;
- u32 buffer_size = 7000;
+ uint32_t buffer_size = 7000;
working_area_t *source;
- u32 address = bank->base + offset;
+ uint32_t address = bank->base + offset;
reg_param_t reg_params[6];
armv4_5_algorithm_t armv4_5_info;
int retval = ERROR_OK;
@@ -218,7 +218,7 @@
r6 - set to 2, used to write flash command
*/
- u32 aduc702x_flash_write_code[] = {
+ uint32_t aduc702x_flash_write_code[] = {
//<_start>:
0xe3a05008, // mov r5, #8 ; 0x8
0xe5845004, // str r5, [r4, #4]
@@ -279,7 +279,7 @@
while (count > 0)
{
- u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
+ uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
target_write_buffer(target, source->address, thisrun_count * 2, buffer);
@@ -322,9 +322,9 @@
/* All-JTAG, single-access method. Very slow. Used only if there is no
* working area available. */
-static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
- u32 x;
+ uint32_t x;
uint8_t b;
target_t *target = bank->target;
@@ -363,7 +363,7 @@
return ERROR_OK;
}
-int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
Modified: trunk/src/flash/at91sam7.c
===================================================================
--- trunk/src/flash/at91sam7.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/at91sam7.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -47,16 +47,16 @@
static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int at91sam7_probe(struct flash_bank_s *bank);
//static int at91sam7_auto_probe(struct flash_bank_s *bank);
static int at91sam7_erase_check(struct flash_bank_s *bank);
static int at91sam7_protect_check(struct flash_bank_s *bank);
static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
-static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
+static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number);
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
-static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -75,9 +75,9 @@
.info = at91sam7_info
};
-static u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-static u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-static u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
+static uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
+static uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
+static uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
@@ -111,9 +111,9 @@
return ERROR_OK;
}
-static u32 at91sam7_get_flash_status(target_t *target, int bank_number)
+static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number)
{
- u32 fsr;
+ uint32_t fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
return fsr;
@@ -124,7 +124,7 @@
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
- u32 mckr, mcfr, pllr, mor;
+ uint32_t mckr, mcfr, pllr, mor;
unsigned long tmp = 0, mainfreq;
/* Read Clock Generator Main Oscillator Register */
@@ -201,7 +201,7 @@
/* Setup the timimg registers for nvbits or normal flash */
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
{
- u32 fmr, fmcn = 0, fws = 0;
+ uint32_t fmr, fmcn = 0, fws = 0;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
@@ -247,9 +247,9 @@
at91sam7_info->flashmode = mode;
}
-static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout)
{
- u32 status;
+ uint32_t status;
while ((!((status = at91sam7_get_flash_status(bank->target, bank->bank_number)) & waitbits)) && (timeout-- > 0))
{
@@ -276,7 +276,7 @@
/* Send one command to the AT91SAM flash controller */
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen)
{
- u32 fcr;
+ uint32_t fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
@@ -311,15 +311,15 @@
uint16_t bnk, sec;
uint16_t arch;
- u32 cidr;
+ uint32_t cidr;
uint8_t banks_num = 0;
uint16_t num_nvmbits = 0;
uint16_t sectors_num = 0;
uint16_t pages_per_sector = 0;
uint16_t page_size = 0;
- u32 ext_freq;
- u32 bank_size;
- u32 base_address = 0;
+ uint32_t ext_freq;
+ uint32_t bank_size;
+ uint32_t base_address = 0;
char *target_name = "Unknown";
at91sam7_info = t_bank->driver_priv;
@@ -622,7 +622,7 @@
{
target_t *target = bank->target;
uint16_t retval;
- u32 blank;
+ uint32_t blank;
uint16_t fast_check;
uint8_t *buffer;
uint16_t nSector;
@@ -687,7 +687,7 @@
static int at91sam7_protect_check(struct flash_bank_s *bank)
{
uint8_t lock_pos, gpnvm_pos;
- u32 status;
+ uint32_t status;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -750,9 +750,9 @@
at91sam7_flash_bank_t *at91sam7_info;
target_t *target = t_bank->target;
- u32 base_address;
- u32 bank_size;
- u32 ext_freq;
+ uint32_t base_address;
+ uint32_t bank_size;
+ uint32_t ext_freq;
int chip_width;
int bus_width;
@@ -860,7 +860,7 @@
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int sec;
- u32 nbytes, pos;
+ uint32_t nbytes, pos;
uint8_t *buffer;
uint8_t erase_all;
@@ -926,9 +926,9 @@
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
{
- u32 cmd;
+ uint32_t cmd;
int sector;
- u32 pagen;
+ uint32_t pagen;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
@@ -974,13 +974,13 @@
return ERROR_OK;
}
-static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
- u32 dst_min_alignment, wcount, bytes_remaining = count;
- u32 first_page, last_page, pagen, buffer_pos;
+ uint32_t dst_min_alignment, wcount, bytes_remaining = count;
+ uint32_t first_page, last_page, pagen, buffer_pos;
if (at91sam7_info->cidr == 0)
{
@@ -1128,7 +1128,7 @@
flash_bank_t *bank;
int bit;
uint8_t flashcmd;
- u32 status;
+ uint32_t status;
at91sam7_flash_bank_t *at91sam7_info;
int retval;
Modified: trunk/src/flash/at91sam7.h
===================================================================
--- trunk/src/flash/at91sam7.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/at91sam7.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -28,7 +28,7 @@
typedef struct at91sam7_flash_bank_s
{
/* chip id register */
- u32 cidr;
+ uint32_t cidr;
uint16_t cidr_ext;
uint16_t cidr_nvptyp;
uint16_t cidr_arch;
@@ -62,10 +62,10 @@
/* main clock status */
uint8_t mck_valid;
- u32 mck_freq;
+ uint32_t mck_freq;
/* external clock frequency */
- u32 ext_freq;
+ uint32_t ext_freq;
} at91sam7_flash_bank_t;
Modified: trunk/src/flash/avrf.c
===================================================================
--- trunk/src/flash/avrf.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/avrf.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -60,7 +60,7 @@
static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int avrf_erase(struct flash_bank_s *bank, int first, int last);
static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int avrf_probe(struct flash_bank_s *bank);
static int avrf_auto_probe(struct flash_bank_s *bank);
//static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -70,7 +70,7 @@
static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
extern int avr_jtag_sendinstr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out);
-extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
+extern int avr_jtag_senddat(jtag_tap_t *tap, uint32_t *dr_in, uint32_t dr_out, int len);
extern int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
extern int mcu_write_dr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
@@ -78,8 +78,8 @@
extern int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
extern int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
-extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
-extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
+extern int mcu_write_ir_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti);
+extern int mcu_write_dr_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int dr_len, int rti);
extern int mcu_execute_queue(void);
flash_driver_t avr_flash =
@@ -98,7 +98,7 @@
};
/* avr program functions */
-static int avr_jtag_reset(avr_common_t *avr, u32 reset)
+static int avr_jtag_reset(avr_common_t *avr, uint32_t reset)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
@@ -106,7 +106,7 @@
return ERROR_OK;
}
-static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)
+static int avr_jtag_read_jtagid(avr_common_t *avr, uint32_t *id)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
@@ -140,7 +140,7 @@
static int avr_jtagprg_chiperase(avr_common_t *avr)
{
- u32 poll_value;
+ uint32_t poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
@@ -161,9 +161,9 @@
return ERROR_OK;
}
-static int avr_jtagprg_writeflashpage(avr_common_t *avr, uint8_t *page_buf, u32 buf_size, u32 addr, u32 page_size)
+static int avr_jtagprg_writeflashpage(avr_common_t *avr, uint8_t *page_buf, uint32_t buf_size, uint32_t addr, uint32_t page_size)
{
- u32 i, poll_value;
+ uint32_t i, poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
@@ -249,11 +249,11 @@
return ERROR_OK;
}
-static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
target_t *target = bank->target;
avr_common_t *avr = target->arch_info;
- u32 cur_size, cur_buffer_size, page_size;
+ uint32_t cur_size, cur_buffer_size, page_size;
if (bank->target->state != TARGET_HALTED)
{
@@ -307,7 +307,7 @@
avr_common_t *avr = target->arch_info;
avrf_type_t *avr_info = NULL;
int i;
- u32 device_id;
+ uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
@@ -388,7 +388,7 @@
avr_common_t *avr = target->arch_info;
avrf_type_t *avr_info = NULL;
int i;
- u32 device_id;
+ uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/cfi.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -33,7 +33,7 @@
static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int cfi_erase(struct flash_bank_s *bank, int first, int last);
static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int cfi_probe(struct flash_bank_s *bank);
static int cfi_auto_probe(struct flash_bank_s *bank);
static int cfi_protect_check(struct flash_bank_s *bank);
@@ -109,8 +109,8 @@
}
}
-/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */
-static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
+/* inline uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset) */
+static __inline__ uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -161,7 +161,7 @@
* flash banks are expected to be made of similar chips
* the query result should be the same for all
*/
-static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
+static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
@@ -178,7 +178,7 @@
* in case of a bank made of multiple chips,
* the individual values are ORed
*/
-static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
+static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
@@ -203,7 +203,7 @@
}
}
-static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
+static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -225,7 +225,7 @@
return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8;
}
-static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
+static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -979,7 +979,7 @@
/* NOTE:
* The data to flash must not be changed in endian! We write a bytestrem in
* target byte order already. Only the control and status byte lane of the flash
- * WSM is interpreted by the CPU in different ways, when read a uint16_t or u32
+ * WSM is interpreted by the CPU in different ways, when read a uint16_t or uint32_t
* word (data seems to be in the upper or lower byte lane for uint16_t accesses).
*/
@@ -1005,9 +1005,9 @@
/* Convert code image to target endian */
/* FIXME create general block conversion fcts in target.c?) */
-static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const u32 *src, u32 count)
+static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const uint32_t *src, uint32_t count)
{
- u32 i;
+ uint32_t i;
for (i=0; i< count; i++)
{
target_buffer_set_u32(target, dest, *src);
@@ -1016,7 +1016,7 @@
}
}
-static u32 cfi_command_val(flash_bank_t *bank, uint8_t cmd)
+static uint32_t cfi_command_val(flash_bank_t *bank, uint8_t cmd)
{
target_t *target = bank->target;
@@ -1039,15 +1039,15 @@
}
}
-static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
+static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
reg_param_t reg_params[7];
armv4_5_algorithm_t armv4_5_info;
working_area_t *source;
- u32 buffer_size = 32768;
- u32 write_command_val, busy_pattern_val, error_pattern_val;
+ uint32_t buffer_size = 32768;
+ uint32_t write_command_val, busy_pattern_val, error_pattern_val;
/* algorithm register usage:
* r0: source address (in RAM)
@@ -1059,7 +1059,7 @@
* r6: error test pattern
*/
- static const u32 word_32_code[] = {
+ static const uint32_t word_32_code[] = {
0xe4904004, /* loop: ldr r4, [r0], #4 */
0xe5813000, /* str r3, [r1] */
0xe5814000, /* str r4, [r1] */
@@ -1076,7 +1076,7 @@
0xeafffffe /* done: b -2 */
};
- static const u32 word_16_code[] = {
+ static const uint32_t word_16_code[] = {
0xe0d040b2, /* loop: ldrh r4, [r0], #2 */
0xe1c130b0, /* strh r3, [r1] */
0xe1c140b0, /* strh r4, [r1] */
@@ -1093,7 +1093,7 @@
0xeafffffe /* done: b -2 */
};
- static const u32 word_8_code[] = {
+ static const uint32_t word_8_code[] = {
0xe4d04001, /* loop: ldrb r4, [r0], #1 */
0xe5c13000, /* strb r3, [r1] */
0xe5c14000, /* strb r4, [r1] */
@@ -1110,8 +1110,8 @@
0xeafffffe /* done: b -2 */
};
uint8_t target_code[4*CFI_MAX_INTEL_CODESIZE];
- const u32 *target_code_src;
- u32 target_code_size;
+ const uint32_t *target_code_src;
+ uint32_t target_code_size;
int retval = ERROR_OK;
@@ -1208,8 +1208,8 @@
/* Programming main loop */
while (count > 0)
{
- u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
- u32 wsm_error;
+ uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
+ uint32_t wsm_error;
if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK)
{
@@ -1229,7 +1229,7 @@
/* Execute algorithm, assume breakpoint for last instruction */
retval = target_run_algorithm(target, 0, NULL, 7, reg_params,
cfi_info->write_algorithm->address,
- cfi_info->write_algorithm->address + target_code_size - sizeof(u32),
+ cfi_info->write_algorithm->address + target_code_size - sizeof(uint32_t),
10000, /* 10s should be enough for max. 32k of data */
&armv4_5_info);
@@ -1283,7 +1283,7 @@
return retval;
}
-static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
+static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
@@ -1291,8 +1291,8 @@
reg_param_t reg_params[10];
armv4_5_algorithm_t armv4_5_info;
working_area_t *source;
- u32 buffer_size = 32768;
- u32 status;
+ uint32_t buffer_size = 32768;
+ uint32_t status;
int retval, retvaltemp;
int exit_code = ERROR_OK;
@@ -1313,7 +1313,7 @@
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
- static const u32 word_32_code[] = {
+ static const uint32_t word_32_code[] = {
/* 00008100 <sp_32_code>: */
0xe4905004, /* ldr r5, [r0], #4 */
0xe5889000, /* str r9, [r8] */
@@ -1347,7 +1347,7 @@
0xeafffffe /* b 8154 <sp_32_done> */
};
- static const u32 word_16_code[] = {
+ static const uint32_t word_16_code[] = {
/* 00008158 <sp_16_code>: */
0xe0d050b2, /* ldrh r5, [r0], #2 */
0xe1c890b0, /* strh r9, [r8] */
@@ -1381,7 +1381,7 @@
0xeafffffe /* b 81ac <sp_16_done> */
};
- static const u32 word_8_code[] = {
+ static const uint32_t word_8_code[] = {
/* 000081b0 <sp_16_code_end>: */
0xe4d05001, /* ldrb r5, [r0], #1 */
0xe5c89000, /* strb r9, [r8] */
@@ -1424,7 +1424,7 @@
{
uint8_t *target_code;
int target_code_size;
- const u32 *src;
+ const uint32_t *src;
/* convert bus-width dependent algorithm code to correct endiannes */
switch (bank->bus_width)
@@ -1496,7 +1496,7 @@
while (count > 0)
{
- u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
+ uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
retvaltemp = target_write_buffer(target, source->address, thisrun_count, buffer);
@@ -1545,7 +1545,7 @@
return exit_code;
}
-static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
+static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1579,7 +1579,7 @@
return ERROR_OK;
}
-static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
+static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1587,9 +1587,9 @@
uint8_t command[8];
/* Calculate buffer size and boundary mask */
- u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- u32 buffermask = buffersize-1;
- u32 bufferwsize;
+ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
+ uint32_t buffermask = buffersize-1;
+ uint32_t bufferwsize;
/* Check for valid range */
if (address & buffermask)
@@ -1671,7 +1671,7 @@
return ERROR_OK;
}
-static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
+static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1717,7 +1717,7 @@
return ERROR_OK;
}
-static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
+static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1726,9 +1726,9 @@
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
/* Calculate buffer size and boundary mask */
- u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- u32 buffermask = buffersize-1;
- u32 bufferwsize;
+ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
+ uint32_t buffermask = buffersize-1;
+ uint32_t bufferwsize;
/* Check for valid range */
if (address & buffermask)
@@ -1809,7 +1809,7 @@
return ERROR_OK;
}
-static int cfi_write_word(struct flash_bank_s *bank, uint8_t *word, u32 address)
+static int cfi_write_word(struct flash_bank_s *bank, uint8_t *word, uint32_t address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1830,7 +1830,7 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-static int cfi_write_words(struct flash_bank_s *bank, uint8_t *word, u32 wordcount, u32 address)
+static int cfi_write_words(struct flash_bank_s *bank, uint8_t *word, uint32_t wordcount, uint32_t address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1851,12 +1851,12 @@
return ERROR_FLASH_OPERATION_FAILED;
}
-int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
- u32 address = bank->base + offset; /* address of first byte to be programmed */
- u32 write_p, copy_p;
+ uint32_t address = bank->base + offset; /* address of first byte to be programmed */
+ uint32_t write_p, copy_p;
int align; /* number of unaligned bytes */
int blk_count; /* number of bus_width bytes for block copy */
uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */
@@ -1950,9 +1950,9 @@
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
{
//adjust buffersize for chip width
- u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- u32 buffermask = buffersize-1;
- u32 bufferwsize;
+ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
+ uint32_t buffermask = buffersize-1;
+ uint32_t bufferwsize;
switch(bank->chip_width)
{
@@ -1967,7 +1967,7 @@
bufferwsize/=(bank->bus_width / bank->chip_width);
/* fall back to memory writes */
- while (count >= (u32)bank->bus_width)
+ while (count >= (uint32_t)bank->bus_width)
{
int fallback;
if ((write_p & 0xff) == 0)
@@ -2083,7 +2083,7 @@
for (i = 0; i < cfi_info->num_erase_regions / 2; i++)
{
int j = (cfi_info->num_erase_regions - 1) - i;
- u32 swap;
+ uint32_t swap;
swap = cfi_info->erase_region_info[i];
cfi_info->erase_region_info[i] = cfi_info->erase_region_info[j];
@@ -2110,8 +2110,8 @@
int num_sectors = 0;
int i;
int sector = 0;
- u32 unlock1 = 0x555;
- u32 unlock2 = 0x2aa;
+ uint32_t unlock1 = 0x555;
+ uint32_t unlock2 = 0x2aa;
int retval;
if (bank->target->state != TARGET_HALTED)
@@ -2353,7 +2353,7 @@
}
else
{
- u32 offset = 0;
+ uint32_t offset = 0;
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
@@ -2365,7 +2365,7 @@
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
- u32 j;
+ uint32_t j;
for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++)
{
bank->sectors[sector].offset = offset;
Modified: trunk/src/flash/cfi.h
===================================================================
--- trunk/src/flash/cfi.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/cfi.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -62,11 +62,11 @@
uint8_t status_poll_mask;
/* flash geometry */
- u32 dev_size;
+ uint32_t dev_size;
uint16_t interface_desc;
uint16_t max_buf_write_size;
uint8_t num_erase_regions;
- u32 *erase_region_info;
+ uint32_t *erase_region_info;
void *pri_ext;
void *alt_ext;
@@ -81,7 +81,7 @@
char pri[3];
uint8_t major_version;
uint8_t minor_version;
- u32 feature_support;
+ uint32_t feature_support;
uint8_t suspend_cmd_support;
uint16_t blk_status_reg_mask;
uint8_t vcc_optimal;
@@ -113,8 +113,8 @@
uint8_t VppMax;
uint8_t TopBottom;
int _reversed_geometry;
- u32 _unlock1;
- u32 _unlock2;
+ uint32_t _unlock1;
+ uint32_t _unlock2;
} cfi_spansion_pri_ext_t;
/* Atmel primary extended query table as defined for and used by
@@ -138,8 +138,8 @@
typedef struct cfi_unlock_addresses_s
{
- u32 unlock1;
- u32 unlock2;
+ uint32_t unlock1;
+ uint32_t unlock2;
} cfi_unlock_addresses_t;
typedef struct cfi_fixup_s
Modified: trunk/src/flash/davinci_nand.c
===================================================================
--- trunk/src/flash/davinci_nand.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/davinci_nand.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -44,18 +44,18 @@
uint8_t eccmode;
/* Async EMIF controller base */
- u32 aemif;
+ uint32_t aemif;
/* NAND chip addresses */
- u32 data; /* without CLE or ALE */
- u32 cmd; /* with CLE */
- u32 addr; /* with ALE */
+ uint32_t data; /* without CLE or ALE */
+ uint32_t cmd; /* with CLE */
+ uint32_t addr; /* with ALE */
/* page i/o for the relevant flavor of hardware ECC */
- int (*read_page)(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
- int (*write_page)(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+ int (*read_page)(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
+ int (*write_page)(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
};
#define NANDFCR 0x60 /* flash control register */
@@ -84,7 +84,7 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nandfcr;
+ uint32_t nandfcr;
if (!halted(target, "init"))
return ERROR_NAND_OPERATION_FAILED;
@@ -114,7 +114,7 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nandfsr;
+ uint32_t nandfsr;
/* NOTE: return code is zero/error, else success; not ERROR_* */
@@ -188,8 +188,8 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nfdata = info->data;
- u32 tmp;
+ uint32_t nfdata = info->data;
+ uint32_t tmp;
if (!halted(target, "read_block"))
return ERROR_NAND_OPERATION_FAILED;
@@ -221,8 +221,8 @@
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- u32 nfdata = info->data;
- u32 tmp;
+ uint32_t nfdata = info->data;
+ uint32_t tmp;
if (!halted(target, "write_block"))
return ERROR_NAND_OPERATION_FAILED;
@@ -245,8 +245,8 @@
return ERROR_OK;
}
-static int davinci_write_page(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
uint8_t *ooballoc = NULL;
@@ -290,8 +290,8 @@
return status;
}
-static int davinci_read_page(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_read_page(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
@@ -303,7 +303,7 @@
return info->read_page(nand, page, data, data_size, oob, oob_size);
}
-static void davinci_write_pagecmd(struct nand_device_s *nand, uint8_t cmd, u32 page)
+static void davinci_write_pagecmd(struct nand_device_s *nand, uint8_t cmd, uint32_t page)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -327,7 +327,7 @@
}
static int davinci_writepage_tail(struct nand_device_s *nand,
- uint8_t *oob, u32 oob_size)
+ uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
@@ -358,15 +358,15 @@
/*
* All DaVinci family chips support 1-bit ECC on a per-chipselect basis.
*/
-static int davinci_write_page_ecc1(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page_ecc1(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
unsigned oob_offset;
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- const u32 fcr_addr = info->aemif + NANDFCR;
- const u32 ecc1_addr = info->aemif + NANDFECC + info->chipsel;
- u32 fcr, ecc1;
+ const uint32_t fcr_addr = info->aemif + NANDFCR;
+ const uint32_t ecc1_addr = info->aemif + NANDFECC + info->chipsel;
+ uint32_t fcr, ecc1;
/* Write contiguous ECC bytes starting at specified offset.
* NOTE: Linux reserves twice as many bytes as we need; and
@@ -425,8 +425,8 @@
* is read first, so its ECC data can be used incrementally), but the
* manufacturer bad block markers are safe. Contrast: old "infix" style.
*/
-static int davinci_write_page_ecc4(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page_ecc4(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
static const uint8_t ecc512[] = {
0, 1, 2, 3, 4, /* 5== mfr badblock */
@@ -452,9 +452,9 @@
struct davinci_nand *info = nand->controller_priv;
const uint8_t *l;
target_t *target = info->target;
- const u32 fcr_addr = info->aemif + NANDFCR;
- const u32 ecc4_addr = info->aemif + NAND4BITECC;
- u32 fcr, ecc4;
+ const uint32_t fcr_addr = info->aemif + NANDFCR;
+ const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
+ uint32_t fcr, ecc4;
/* Use the same ECC layout Linux uses. For small page chips
* it's a bit cramped.
@@ -485,7 +485,7 @@
fcr |= (1 << 12) | (info->chipsel << 4);
do {
- u32 raw_ecc[4], *p;
+ uint32_t raw_ecc[4], *p;
int i;
/* start 4bit ecc on csX */
@@ -527,14 +527,14 @@
* older second stage loaders (ABL/U-Boot, etc) or other system software
* (MVL 4.x/5.x kernels, filesystems, etc) may need it more generally.
*/
-static int davinci_write_page_ecc4infix(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_write_page_ecc4infix(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
- const u32 fcr_addr = info->aemif + NANDFCR;
- const u32 ecc4_addr = info->aemif + NAND4BITECC;
- u32 fcr, ecc4;
+ const uint32_t fcr_addr = info->aemif + NANDFCR;
+ const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
+ uint32_t fcr, ecc4;
davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
@@ -546,7 +546,7 @@
fcr |= (1 << 12) | (info->chipsel << 4);
do {
- u32 raw_ecc[4], *p;
+ uint32_t raw_ecc[4], *p;
uint8_t *l;
int i;
@@ -584,8 +584,8 @@
return davinci_writepage_tail(nand, NULL, 0);
}
-static int davinci_read_page_ecc4infix(struct nand_device_s *nand, u32 page,
- uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
+static int davinci_read_page_ecc4infix(struct nand_device_s *nand, uint32_t page,
+ uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
davinci_write_pagecmd(nand, NAND_CMD_READ0, page);
Modified: trunk/src/flash/ecos.c
===================================================================
--- trunk/src/flash/ecos.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/ecos.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -30,15 +30,15 @@
static int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int ecosflash_erase(struct flash_bank_s *bank, int first, int last);
static int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int ecosflash_probe(struct flash_bank_s *bank);
static int ecosflash_protect_check(struct flash_bank_s *bank);
static int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size);
#if 0
-static u32 ecosflash_get_flash_status(flash_bank_t *bank);
+static uint32_t ecosflash_get_flash_status(flash_bank_t *bank);
static void ecosflash_set_flash_mode(flash_bank_t *bank,int mode);
-static u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
+static uint32_t ecosflash_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout);
static int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
#endif
@@ -63,7 +63,7 @@
working_area_t *write_algorithm;
working_area_t *erase_check_algorithm;
char *driverPath;
- u32 start_address;
+ uint32_t start_address;
} ecosflash_flash_bank_t;
static const int sectorSize=0x10000;
@@ -152,7 +152,7 @@
* driver.
*/
int i = 0;
- u32 offset = 0;
+ uint32_t offset = 0;
bank->num_sectors=bank->size/sectorSize;
bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
for (i = 0; i < bank->num_sectors; i++)
@@ -175,8 +175,8 @@
static int loadDriver(ecosflash_flash_bank_t *info)
{
- u32 buf_cnt;
- u32 image_size;
+ uint32_t buf_cnt;
+ uint32_t image_size;
image_t image;
image.base_address_set = 0;
@@ -223,8 +223,8 @@
static int const OFFSET_GET_WORKAREA_SIZE=0x4;
static int runCode(ecosflash_flash_bank_t *info,
- u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2,
- u32 *result,
+ uint32_t codeStart, uint32_t codeStop, uint32_t r0, uint32_t r1, uint32_t r2,
+ uint32_t *result,
/* timeout in ms */
int timeout)
{
@@ -263,7 +263,7 @@
return ERROR_OK;
}
-static int eCosBoard_erase(ecosflash_flash_bank_t *info, u32 address, u32 len)
+static int eCosBoard_erase(ecosflash_flash_bank_t *info, uint32_t address, uint32_t len)
{
int retval;
int timeout = (len / 20480 + 1) * 1000; /*asume 20 KB/s*/
@@ -272,7 +272,7 @@
if (retval!=ERROR_OK)
return retval;
- u32 flashErr;
+ uint32_t flashErr;
retval=runCode(info,
info->start_address+OFFSET_ERASE,
info->start_address+OFFSET_ERASE+OFFSET_ERASE_SIZE,
@@ -294,7 +294,7 @@
return ERROR_OK;
}
-static int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 len)
+static int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, uint32_t address, uint32_t len)
{
target_t *target=info->target;
const int chunk=8192;
@@ -305,7 +305,7 @@
if (retval!=ERROR_OK)
return retval;
- u32 buffer;
+ uint32_t buffer;
retval=runCode(info,
info->start_address+OFFSET_GET_WORKAREA,
info->start_address+OFFSET_GET_WORKAREA+OFFSET_GET_WORKAREA_SIZE,
@@ -318,7 +318,7 @@
return retval;
- u32 i;
+ uint32_t i;
for (i=0; i<len; i+=chunk)
{
int t=len-i;
@@ -332,7 +332,7 @@
if (retval != ERROR_OK)
return retval;
- u32 flashErr;
+ uint32_t flashErr;
retval=runCode(info,
info->start_address+OFFSET_FLASH,
info->start_address+OFFSET_FLASH+OFFSET_FLASH_SIZE,
@@ -389,9 +389,9 @@
#endif
#if 0
-static u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
+static uint32_t ecosflash_address(struct flash_bank_s *bank, uint32_t address)
{
- u32 retval = 0;
+ uint32_t retval = 0;
switch(bank->bus_width)
{
case 4:
@@ -418,7 +418,7 @@
return ERROR_OK;
}
-static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int ecosflash_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
struct flash_bank_s *c=bank;
@@ -438,7 +438,7 @@
}
#if 0
-static u32 ecosflash_get_flash_status(flash_bank_t *bank)
+static uint32_t ecosflash_get_flash_status(flash_bank_t *bank)
{
return ERROR_OK;
}
@@ -448,7 +448,7 @@
}
-static u32 ecosflash_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
+static uint32_t ecosflash_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout)
{
return ERROR_OK;
}
Modified: trunk/src/flash/flash.c
===================================================================
--- trunk/src/flash/flash.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/flash.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -85,7 +85,7 @@
static command_t *flash_cmd;
/* wafer thin wrapper for invoking the flash driver */
-static int flash_driver_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int flash_driver_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
@@ -330,7 +330,7 @@
static int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *p;
- u32 i = 0;
+ uint32_t i = 0;
int j = 0;
int retval;
@@ -624,7 +624,7 @@
target_t *target = get_current_target(cmd_ctx);
image_t image;
- u32 written;
+ uint32_t written;
duration_t duration;
char *duration_text;
@@ -707,19 +707,19 @@
static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int err = ERROR_OK, retval;
- u32 address;
- u32 pattern;
- u32 count;
+ uint32_t address;
+ uint32_t pattern;
+ uint32_t count;
uint8_t chunk[1024];
uint8_t readback[1024];
- u32 wrote = 0;
- u32 cur_size = 0;
- u32 chunk_count;
+ uint32_t wrote = 0;
+ uint32_t cur_size = 0;
+ uint32_t chunk_count;
char *duration_text;
duration_t duration;
target_t *target = get_current_target(cmd_ctx);
- u32 i;
- u32 wordsize;
+ uint32_t i;
+ uint32_t wordsize;
if (argc != 3)
{
@@ -822,9 +822,9 @@
static int handle_flash_write_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
- u32 offset;
+ uint32_t offset;
uint8_t *buffer;
- u32 buf_cnt;
+ uint32_t buf_cnt;
fileio_t fileio;
@@ -901,7 +901,7 @@
}
/* lookup flash bank by address */
-flash_bank_t *get_flash_bank_by_addr(target_t *target, u32 addr)
+flash_bank_t *get_flash_bank_by_addr(target_t *target, uint32_t addr)
{
flash_bank_t *c;
@@ -925,7 +925,7 @@
}
/* erase given flash region, selects proper bank according to target and address */
-int flash_erase_address_range(target_t *target, u32 addr, u32 length)
+int flash_erase_address_range(target_t *target, uint32_t addr, uint32_t length)
{
flash_bank_t *c;
int first = -1;
@@ -974,12 +974,12 @@
}
/* write (optional verify) an image to flash memory of the given target */
-int flash_write(target_t *target, image_t *image, u32 *written, int erase)
+int flash_write(target_t *target, image_t *image, uint32_t *written, int erase)
{
int retval=ERROR_OK;
int section;
- u32 section_offset;
+ uint32_t section_offset;
flash_bank_t *c;
int *padding;
@@ -1003,12 +1003,12 @@
/* loop until we reach end of the image */
while (section < image->num_sections)
{
- u32 buffer_size;
+ uint32_t buffer_size;
uint8_t *buffer;
int section_first;
int section_last;
- u32 run_address = image->sections[section].base_address + section_offset;
- u32 run_size = image->sections[section].size - section_offset;
+ uint32_t run_address = image->sections[section].base_address + section_offset;
+ uint32_t run_size = image->sections[section].size - section_offset;
int pad_bytes = 0;
if (image->sections[section].size == 0)
@@ -1067,7 +1067,7 @@
/* read sections to the buffer */
while (buffer_size < run_size)
{
- u32 size_read;
+ uint32_t size_read;
size_read = run_size - buffer_size;
if (size_read > image->sections[section].size - section_offset)
@@ -1132,7 +1132,7 @@
uint8_t buffer[1024];
int buffer_size = sizeof(buffer);
int i;
- u32 nBytes;
+ uint32_t nBytes;
if (bank->target->state != TARGET_HALTED)
{
@@ -1142,12 +1142,12 @@
for (i = 0; i < bank->num_sectors; i++)
{
- u32 j;
+ uint32_t j;
bank->sectors[i].is_erased = 1;
for (j = 0; j < bank->sectors[i].size; j += buffer_size)
{
- u32 chunk;
+ uint32_t chunk;
int retval;
chunk = buffer_size;
if (chunk > (j - bank->sectors[i].size))
@@ -1179,7 +1179,7 @@
int i;
int retval;
int fast_check = 0;
- u32 blank;
+ uint32_t blank;
if (bank->target->state != TARGET_HALTED)
{
@@ -1189,8 +1189,8 @@
for (i = 0; i < bank->num_sectors; i++)
{
- u32 address = bank->base + bank->sectors[i].offset;
- u32 size = bank->sectors[i].size;
+ uint32_t address = bank->base + bank->sectors[i].offset;
+ uint32_t size = bank->sectors[i].size;
if ((retval = target_blank_check_memory(target, address, size, &blank)) != ERROR_OK)
{
Modified: trunk/src/flash/flash.h
===================================================================
--- trunk/src/flash/flash.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/flash.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -41,9 +41,9 @@
typedef struct flash_sector_s
{
/// Bus offset from start of the flash chip (in bytes).
- u32 offset;
+ uint32_t offset;
/// Number of bytes in this flash sector.
- u32 size;
+ uint32_t size;
/**
* Indication of erasure status: 0=not erased, 1=erased,
* other=unknown. Set by @c flash_driver_s::erase_check.
@@ -166,7 +166,7 @@
* @param count The number of bytes to write.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
- int (*write)(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+ int (*write)(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
/**
* Probe to determine what kind of flash is present.
@@ -246,8 +246,8 @@
void *driver_priv; /**< Private driver storage pointer */
int bank_number; /**< The 'bank' (or chip number) of this instance. */
- u32 base; /**< The base address of this bank */
- u32 size; /**< The size of this chip bank, in bytes */
+ uint32_t base; /**< The base address of this bank */
+ uint32_t size; /**< The size of this chip bank, in bytes */
int chip_width; /**< Width of the chip in bytes (1,2,4 bytes) */
int bus_width; /**< Maximum bus width, in bytes (1,2,4 bytes) */
@@ -273,7 +273,7 @@
* Erases @a length bytes in the @a target flash, starting at @a addr.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
-extern int flash_erase_address_range(struct target_s *target, u32 addr, u32 length);
+extern int flash_erase_address_range(struct target_s *target, uint32_t addr, uint32_t length);
/**
* Writes @a image into the @a target flash. The @a written parameter
* will contain the
@@ -284,7 +284,7 @@
* erase the corresponding banks or sectors before programming.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
-extern int flash_write(struct target_s *target, struct image_s *image, u32 *written, int erase);
+extern int flash_write(struct target_s *target, struct image_s *image, uint32_t *written, int erase);
/**
* Forces targets to re-examine their erase/protection state.
* This routine must be called when the system may modify the status.
@@ -325,7 +325,7 @@
* @param addr An address that is within the range of the bank.
* @returns The flash_bank_t located at @a addr, or NULL.
*/
-extern flash_bank_t *get_flash_bank_by_addr(struct target_s *target, u32 addr);
+extern flash_bank_t *get_flash_bank_by_addr(struct target_s *target, uint32_t addr);
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
Modified: trunk/src/flash/lpc2000.c
===================================================================
--- trunk/src/flash/lpc2000.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc2000.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -49,7 +49,7 @@
static int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int lpc2000_erase(struct flash_bank_s *bank, int first, int last);
static int lpc2000_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int lpc2000_probe(struct flash_bank_s *bank);
static int lpc2000_erase_check(struct flash_bank_s *bank);
static int lpc2000_protect_check(struct flash_bank_s *bank);
@@ -92,7 +92,7 @@
if (lpc2000_info->variant == 1)
{
int i = 0;
- u32 offset = 0;
+ uint32_t offset = 0;
/* variant 1 has different layout for 128kb and 256kb flashes */
if (bank->size == 128 * 1024)
@@ -148,7 +148,7 @@
{
int num_sectors;
int i;
- u32 offset = 0;
+ uint32_t offset = 0;
/* variant 2 has a uniform layout, only number of sectors differs */
switch (bank->size)
@@ -233,7 +233,7 @@
* 0x20 to 0x2b: command result table
* 0x2c to 0xac: stack (only 128b needed)
*/
-static int lpc2000_iap_call(flash_bank_t *bank, int code, u32 param_table[5], u32 result_table[2])
+static int lpc2000_iap_call(flash_bank_t *bank, int code, uint32_t param_table[5], uint32_t result_table[2])
{
int retval;
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
@@ -241,7 +241,7 @@
mem_param_t mem_params[2];
reg_param_t reg_params[5];
armv4_5_algorithm_t armv4_5_info;
- u32 status_code;
+ uint32_t status_code;
/* regrab previously allocated working_area, or allocate a new one */
if (!lpc2000_info->iap_working_area)
@@ -318,8 +318,8 @@
static int lpc2000_iap_blank_check(struct flash_bank_s *bank, int first, int last)
{
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
int i;
@@ -410,8 +410,8 @@
static int lpc2000_erase(struct flash_bank_s *bank, int first, int last)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
if (bank->target->state != TARGET_HALTED)
@@ -465,17 +465,17 @@
return ERROR_OK;
}
-static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
target_t *target = bank->target;
- u32 dst_min_alignment;
- u32 bytes_remaining = count;
- u32 bytes_written = 0;
+ uint32_t dst_min_alignment;
+ uint32_t bytes_remaining = count;
+ uint32_t bytes_written = 0;
int first_sector = 0;
int last_sector = 0;
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
int i;
working_area_t *download_area;
@@ -514,7 +514,7 @@
/* check if exception vectors should be flashed */
if ((offset == 0) && (count >= 0x20) && lpc2000_info->calc_checksum)
{
- u32 checksum = 0;
+ uint32_t checksum = 0;
int i = 0;
for (i = 0; i < 8; i++)
{
@@ -525,7 +525,7 @@
checksum = 0 - checksum;
LOG_DEBUG("checksum: 0x%8.8x", checksum);
- u32 original_value=buf_get_u32(buffer + (5 * 4), 0, 32);
+ uint32_t original_value=buf_get_u32(buffer + (5 * 4), 0, 32);
if (original_value!=checksum)
{
LOG_WARNING("Verification will fail since checksum in image(0x%8.8x) written to flash was different from calculated vector checksum(0x%8.8x).",
@@ -545,7 +545,7 @@
while (bytes_remaining > 0)
{
- u32 thisrun_bytes;
+ uint32_t thisrun_bytes;
if (bytes_remaining >= lpc2000_info->cmd51_max_buffer)
thisrun_bytes = lpc2000_info->cmd51_max_buffer;
else if (bytes_remaining >= 1024)
@@ -590,7 +590,7 @@
else
{
uint8_t *last_buffer = malloc(thisrun_bytes);
- u32 i;
+ uint32_t i;
memcpy(last_buffer, buffer + bytes_written, bytes_remaining);
for (i = bytes_remaining; i < thisrun_bytes; i++)
last_buffer[i] = 0xff;
@@ -675,8 +675,8 @@
static int lpc2000_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
- u32 param_table[5];
- u32 result_table[2];
+ uint32_t param_table[5];
+ uint32_t result_table[2];
int status_code;
if (argc < 1)
Modified: trunk/src/flash/lpc2000.h
===================================================================
--- trunk/src/flash/lpc2000.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc2000.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -26,12 +26,12 @@
{
int variant;
struct working_area_s *iap_working_area;
- u32 cclk;
+ uint32_t cclk;
int cmd51_dst_boundary;
int cmd51_can_256b;
int cmd51_can_8192b;
int calc_checksum;
- u32 cmd51_max_buffer;
+ uint32_t cmd51_max_buffer;
} lpc2000_flash_bank_t;
enum lpc2000_status_codes
Modified: trunk/src/flash/lpc288x.c
===================================================================
--- trunk/src/flash/lpc288x.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc288x.c 2009-06-18 07:10:25 UTC (rev 2280)
@@ -88,15 +88,15 @@
static int lpc288x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int lpc288x_erase(struct flash_bank_s *bank, int first, int last);
static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
+static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int lpc288x_probe(struct flash_bank_s *bank);
static int lpc288x_erase_check(struct flash_bank_s *bank);
static int lpc288x_protect_check(struct flash_bank_s *bank);
static int lpc288x_info(struct flash_bank_s *bank, char *buf, int buf_size);
-static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
+static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout);
static void lpc288x_load_timer(int erase, struct target_s *target);
static void lpc288x_set_flash_clk(struct flash_bank_s *bank);
-static u32 lpc288x_system_ready(struct flash_bank_s *bank);
+static uint32_t lpc288x_system_ready(struct flash_bank_s *bank);
flash_driver_t lpc288x_flash =
{
@@ -118,9 +118,9 @@
return ERROR_OK;
}
-static u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
+static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
{
- u32 status;
+ uint32_t status;
target_t *target = bank->target;
do
{
@@ -142,10 +142,10 @@
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
target_t *target = bank->target;
- u32 cidr;
+ uint32_t cidr;
int i = 0;
- u32 offset;
+ uint32_t offset;
if (lpc288x_info->cidr == 0x0102100A)
return ERROR_OK; /* already probed, multiple probes may cause memory leak, not allowed */
@@ -221,7 +221,7 @@
* CLK_DIV = 60 ? */
static void lpc288x_set_flash_clk(struct flash_bank_s *bank)
{
- u32 clk_time;
+ uint32_t clk_time;
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
clk_time = (lpc288x_info->cclk / 66000) / 3;
target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN);
@@ -246,7 +246,7 @@
}
}
-static u32 lpc288x_system_ready(struct flash_bank_s *bank)
+static uint32_t lpc288x_system_ready(struct flash_bank_s *bank)
{
lpc288x_flash_bank_t *lpc288x_info = bank->driver_priv;
if (lpc288x_info->cidr == 0)
@@ -264,7 +264,7 @@
static int lpc288x_erase_check(struct flash_bank_s *bank)
{
- u32 status = lpc288x_system_ready(bank); /* probed? halted? */
+ uint32_t status = lpc288x_system_ready(bank); /* probed? halted? */
if (status != ERROR_OK)
{
LOG_INFO("Processor not halted/not probed");
@@ -276,7 +276,7 @@
static int lpc288x_erase(struct flash_bank_s *bank, int first, int last)
{
- u32 status;
+ uint32_t status;
int sector;
target_t *target = bank->target;
@@ -315,13 +315,13 @@
return ERROR_OK;
}
-static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
+static int lpc288x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint8_t page_buffer[FLASH_PAGE_SIZE];
- u32 status, source_offset,dest_offset;
+ uint32_t status, source_offset,dest_offset;
target_t *target = bank->target;
- u32 bytes_remaining = count;
- u32 first_sector, last_sector, sector, page;
+ uint32_t bytes_remaining = count;
+ uint32_t first_sector, last_sector, sector, page;
int i;
/* probed? halted? */
@@ -463,7 +463,7 @@
static int lpc288x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
int lockregion, status;
- u32 value;
+ uint32_t value;
target_t *target = bank->target;
/* probed? halted? */
Modified: trunk/src/flash/lpc288x.h
===================================================================
--- trunk/src/flash/lpc288x.h 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc288x.h 2009-06-18 07:10:25 UTC (rev 2280)
@@ -25,15 +25,15 @@
typedef struct lpc288x_flash_bank_s
{
- u32 working_area;
- u32 working_area_size;
+ uint32_t working_area;
+ uint32_t working_area_size;
/* chip id register */
- u32 cidr;
+ uint32_t cidr;
char * target_name;
- u32 cclk;
+ uint32_t cclk;
- u32 sector_size_break;
+ uint32_t sector_size_break;
} lpc288x_flash_bank_t;
#endif /* lpc288x_H */
Modified: trunk/src/flash/lpc3180_nand_controller.c
===================================================================
--- trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:09:35 UTC (rev 2279)
+++ trunk/src/flash/lpc3180_nand_controller.c 2009-06-18 07:10:25 UTC (rev 228...
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