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[Openocd-svn] r1478 - in trunk/src: jtag target/target
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From: ntfreak at B. <nt...@ma...> - 2009-04-21 00:38:30
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Author: ntfreak
Date: 2009-04-21 00:38:27 +0200 (Tue, 21 Apr 2009)
New Revision: 1478
Modified:
trunk/src/jtag/at91rm9200.c
trunk/src/target/target/lpc2124.cfg
trunk/src/target/target/lpc2378.cfg
Log:
- fix at91rm9200 warning. Thanks Zach Welch <zw...@su...>
- add missing svn props from previous commit
Modified: trunk/src/jtag/at91rm9200.c
===================================================================
--- trunk/src/jtag/at91rm9200.c 2009-04-20 10:52:08 UTC (rev 1477)
+++ trunk/src/jtag/at91rm9200.c 2009-04-20 22:38:27 UTC (rev 1478)
@@ -104,7 +104,7 @@
struct device_t devices[] =
{
{ "rea_ecr", PIOD, P27, PIOA, NC, PIOD, P23, PIOD, P24, PIOD, P26, PIOC, P5 },
- { NULL, 0 }
+ { .name = NULL },
};
/* configuration */
Modified: trunk/src/target/target/lpc2124.cfg
===================================================================
--- trunk/src/target/target/lpc2124.cfg 2009-04-20 10:52:08 UTC (rev 1477)
+++ trunk/src/target/target/lpc2124.cfg 2009-04-20 22:38:27 UTC (rev 1478)
@@ -1,38 +1,38 @@
-#LPC-2124 CPU
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME lpc2124
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- # force an error till we get a good number
- set _CPUTAPID 0x4f1f0f0f
-}
-
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst srst_pulls_trst
-jtag_nsrst_delay 10
-jtag_khz 1000
-
-#jtag scan chain
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
-
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
-
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14745 calc_checksum
+#LPC-2124 CPU
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lpc2124
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ # force an error till we get a good number
+ set _CPUTAPID 0x4f1f0f0f
+}
+
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst srst_pulls_trst
+jtag_nsrst_delay 10
+jtag_khz 1000
+
+#jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
+
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14745 calc_checksum
Property changes on: trunk/src/target/target/lpc2124.cfg
___________________________________________________________________
Name: svn:eol-style
+ native
Modified: trunk/src/target/target/lpc2378.cfg
===================================================================
--- trunk/src/target/target/lpc2378.cfg 2009-04-20 10:52:08 UTC (rev 1477)
+++ trunk/src/target/target/lpc2378.cfg 2009-04-20 22:38:27 UTC (rev 1478)
@@ -1,49 +1,49 @@
-# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME lpc2378
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x4f1f0f0f
-}
-
-#delays on reset lines
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-# LPC2000 -> SRST causes TRST
-reset_config trst_and_srst srst_pulls_trst
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
-
-# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
-
-$_TARGETNAME configure -event reset-init {
- # Force target into ARM state
- soft_reset_halt
- #do not remap 0x0000-0x0020 to anything but the flash
- mwb 0xE01FC040 0x01
-}
-
-# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
-# After reset the chip uses its internal 4MHz RC oscillator
-#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
-flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum
-
-# 4MHz / 6 = 666kHz, so use 500
-jtag_khz 500
+# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lpc2378
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x4f1f0f0f
+}
+
+#delays on reset lines
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+
+# LPC2000 -> SRST causes TRST
+reset_config trst_and_srst srst_pulls_trst
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+
+# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init {
+ # Force target into ARM state
+ soft_reset_halt
+ #do not remap 0x0000-0x0020 to anything but the flash
+ mwb 0xE01FC040 0x01
+}
+
+# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
+# After reset the chip uses its internal 4MHz RC oscillator
+#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
+flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum
+
+# 4MHz / 6 = 666kHz, so use 500
+jtag_khz 500
Property changes on: trunk/src/target/target/lpc2378.cfg
___________________________________________________________________
Name: svn:eol-style
+ native
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