[Openocd-svn] r1419 - trunk/src/target/target

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-19 23:27:43 +0100 (Thu, 19 Mar 2009)
New Revision: 1419

Modified:
   trunk/src/target/target/str9comstick.cfg
Log:
- fix incorrect str9comstick cfg

Modified: trunk/src/target/target/str9comstick.cfg
===================================================================
--- trunk/src/target/target/str9comstick.cfg	2009-03-19 15:51:28 UTC (rev 1418)
+++ trunk/src/target/target/str9comstick.cfg	2009-03-19 22:27:43 UTC (rev 1419)
@@ -10,7 +10,18 @@
 #jtag scan chain
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME str912
+}
 
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
 if { [info exists FLASHTAPID ] } {
    set _FLASHTAPID $FLASHTAPID
 } else {
@@ -25,7 +36,6 @@
 }
 jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0xf -irmask 0xf -expected-id $_CPUTAPID
 
-
 if { [info exists BSTAPID ] } {
    set _BSTAPID $BSTAPID
 } else {
@@ -36,7 +46,20 @@
 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
 target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
 
+$_TARGETNAME configure -event reset-init {
+	# We can increase speed now that we know the target is halted.
+	#jtag_rclk 3000
+	
+	# -- Enable 96K RAM
+	# PFQBC enabled / DTCM & AHB wait-states disabled
+	mww 0x5C002034 0x0191 
+
+	str9x flash_config 0 4 2 0 0x80000
+	flash protect 0 0 7 off
+}
+
 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
 
 #flash bank <driver> <base> <size> <chip_width> <bus_width>
 flash bank str9x 0x00000000 0x00080000 0 0 0
+flash bank str9x 0x00080000 0x00008000 0 0 0