[Openocd-svn] r1413 - trunk/src/target

[ntfreak at B. <nt...@ma...>]

Author: ntfreak
Date: 2009-03-16 23:42:29 +0100 (Mon, 16 Mar 2009)
New Revision: 1413

Modified:
   trunk/src/target/cortex_m3.c
Log:
- fix issue with cortex_m3 reset run. Thanks Perry Hung
- https://lists.berlios.de/pipermail/openocd-development/2009-March/005028.html

Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c	2009-03-14 18:39:05 UTC (rev 1412)
+++ trunk/src/target/cortex_m3.c	2009-03-16 22:42:29 UTC (rev 1413)
@@ -243,6 +243,10 @@
 	swjdp_transaction_endcheck(swjdp);
 	
 	armv7m_invalidate_core_regs(target);
+	
+	/* make sure we have latest dhcsr flags */
+	ahbap_read_system_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
+	
 	return ERROR_OK;
 }
 
@@ -724,8 +728,12 @@
 		/* Set/Clear C_MASKINTS in a separate operation */
 		if (cortex_m3->dcb_dhcsr & C_MASKINTS)
 			ahbap_write_system_atomic_u32(swjdp, DCB_DHCSR, DBGKEY | C_DEBUGEN | C_HALT);
-	
+
+		/* clear any debug flags before resuming */
 		cortex_m3_clear_halt(target);
+		
+		/* clear C_HALT in dhcsr reg */
+		cortex_m3_write_debug_halt_mask(target, 0, C_HALT);
 							
 		/* Enter debug state on reset, cf. end_reset_event() */	
 		ahbap_write_system_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR);