Re: [Openocd-development] adapter_khz ...

[Laurent G. <lau...@am...>]

Hi David,

 Brownell wrote:
> On Thursday 25 March 2010, Laurent Gauch wrote:
>   
>> Again, having adapter_khz in the target scripts is really confusing.
>>     
>
>  .... SO DON'T DO THAT!!
>   
 ... OK, but we do not resolve the problem by DON'T DO THAT!!

Actually there are a lot of target scripts working with JTAGkey but not 
with JTAGkey-2, just because the JTAGkey-2 run by default at his highest 
30Mhz frequency and because the target does not accept so high JTAG 
frequency. Note that this trouble will come with all new JTAG/SWD 
emulators able to run high-speed JTAG frequency from 24MHz to xxxMHz. 
 From parallel port dongle to j-link the 12Mhz-16MHz is tolerated by the 
major part of target openocd supports, but NOT a 30MHz as on the amontec 
JTAGkey-2.

@ 6MHz can connect (JTAGkey default JTAG frequency)
@ 30MHz cannot connect (JTAGkey-2 default JTAG frequency)

Fro me the only solution is that the target script gives the max 
frequency of his JTAG SWD interface, by adding adapter_khz or a similar 
command ?

Sorry, but actually you do not provided any solution to this problem. 
What's your solution  please?


> As repeated elsewhere ... i's board-specific, so it normally doesn't
> belong there.  When it's in the board config files, no confusion.
>
> If you persist in *DOING THE WRONG THING* you will stay confused,
> and things won't work right for you
>   
I do not persist. I try to resolve a real openocd problem !

Laurent
  http://www.amontec.com
>
> There are some rare exceptions, related to hardware limitations on the
> order of "chip *must* boot with oscillator of frequency <X, Y, or Z>
>
> In those cases the reset-start event handlers in target files should be
> used to set a floor on the clock rate.  example (from a JTAG-only target):
>
>   # be absolutely certain the JTAG clock will work with the worst-case
>   # CLKIN = 24 MHz (best case: 36 MHz) even when no bootloader turns
>   # on the PLL and starts using it.  OK to speed up after clock setup.
>   jtag_rclk 1500
>   $_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
>
> That "after clock setup" might be in a board's "reset-init" handler.
> That's where you might set up e.g. a 30 MHz JTAG clock, once it's
> known that the chip is ready for such a rate.
>
>
> Thre could also be target-specific conventions about how boards pass
> clock rates down to target config files.
>
> But the basic rule remains:  things that vary between boards should
> never be constants in target config files.
>
>