From: <ram...@bl...> - 2008-10-23 19:16:43
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I did a mistake with the logs, forget about the previous message I apologize... Can you poste details? I'm using 6.8 without any problems... I'm using: -eclipse with Zylin plugin (thank you!). -LM3S6965 EVB INITIALIZE COMMANDS: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! target remote localhost:3333 monitor soft_reset_halt monitor sleep 200 monitor flash cond_write_image erase ../cortex-m3-bootloader/release/Bootloader.bin 0 bin !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! RUN COMMANDS: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! monitor soft_reset_halt monitor sleep 200 nexti !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! CONFIG FILE: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! ############################################################################# # Daemons configuration ############################################################################# # telnet_port <number> telnet_port 4444 # gdb_port <number> gdb_port 3333 # tcl_port <number> tcl_port 6666 ############################################################################# # Interface configuration ############################################################################# # interface <name> interface ft2232 # ft2232_device_desc <description> ft2232_device_desc "Stellaris Evaluation Board A" # ft2232_layout <name> ft2232_layout evb_lm3s811 ############################################################################# # JTAG configuration ############################################################################# # jtag_khz <speed kHz> jtag_khz 1000 # jtag_nsrst_delay <ms> jtag_nsrst_delay 100 # jtag_ntrst_delay <ms> jtag_ntrst_delay 100 ############################################################################# # Reset configuration ############################################################################# # reset_config <signals> [combination] [trst type] [srst type] reset_config srst_only ############################################################################# # Device configuration ############################################################################# # jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction> jtag_device 4 0x1 0xf 0xe ############################################################################# # Target configuration ############################################################################# # target <type> <endianess> <JTAG pos> <variant> target cortex_m3 little 0 lm3s # working_area <target#> <address> <size> <backup|nobackup> working_area 0 0x20000000 0xF000 nobackup # flash bank stellaris <base> <size> 0 0 <target#> flash bank stellaris 0 0 0 0 0 !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! OpenOCD LOG: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! Open On-Chip Debugger 1.0 (2008-10-23-18:48) svn:exported BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS $URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $ Debug: 5 0 configuration.c:88 find_file(): found luminary.cfg Debug: 7 0 command.c:82 script_command(): script_command - telnet_port Debug: 8 0 command.c:99 script_command(): script_command - telnet_port, argv[0]=ocd_telnet_port Debug: 9 0 command.c:99 script_command(): script_command - telnet_port, argv[1]=4444 Debug: 11 0 command.c:82 script_command(): script_command - gdb_port Debug: 12 0 command.c:99 script_command(): script_command - gdb_port, argv[0]=ocd_gdb_port Debug: 13 0 command.c:99 script_command(): script_command - gdb_port, argv[1]=3333 Debug: 15 15 command.c:82 script_command(): script_command - tcl_port Debug: 16 15 command.c:99 script_command(): script_command - tcl_port, argv[0]=ocd_tcl_port Debug: 17 15 command.c:99 script_command(): script_command - tcl_port, argv[1]=6666 Debug: 19 15 command.c:82 script_command(): script_command - interface Debug: 20 15 command.c:99 script_command(): script_command - interface, argv[0]=ocd_interface Debug: 21 15 command.c:99 script_command(): script_command - interface, argv[1]=ft2232 Debug: 23 15 command.c:82 script_command(): script_command - ft2232_device_desc Debug: 24 15 command.c:99 script_command(): script_command - ft2232_device_desc, argv[0]=ocd_ft2232_device_desc Debug: 25 15 command.c:99 script_command(): script_command - ft2232_device_desc, argv[1]=Stellaris Evaluation Board A Debug: 27 15 command.c:82 script_command(): script_command - ft2232_layout Debug: 28 15 command.c:99 script_command(): script_command - ft2232_layout, argv[0]=ocd_ft2232_layout Debug: 29 15 command.c:99 script_command(): script_command - ft2232_layout, argv[1]=evb_lm3s811 Debug: 31 15 command.c:82 script_command(): script_command - jtag_khz Debug: 32 15 command.c:99 script_command(): script_command - jtag_khz, argv[0]=ocd_jtag_khz Debug: 33 15 command.c:99 script_command(): script_command - jtag_khz, argv[1]=1000 Debug: 34 15 jtag.c:1965 handle_jtag_khz_command(): handle jtag khz User: 35 15 command.c:363 command_print(): jtag_khz: 1000 Debug: 37 15 command.c:82 script_command(): script_command - jtag_nsrst_delay Debug: 38 15 command.c:99 script_command(): script_command - jtag_nsrst_delay, argv[0]=ocd_jtag_nsrst_delay Debug: 39 15 command.c:99 script_command(): script_command - jtag_nsrst_delay, argv[1]=100 Debug: 41 15 command.c:82 script_command(): script_command - jtag_ntrst_delay Debug: 42 15 command.c:99 script_command(): script_command - jtag_ntrst_delay, argv[0]=ocd_jtag_ntrst_delay Debug: 43 15 command.c:99 script_command(): script_command - jtag_ntrst_delay, argv[1]=100 Debug: 45 15 command.c:82 script_command(): script_command - reset_config Debug: 46 15 command.c:99 script_command(): script_command - reset_config, argv[0]=ocd_reset_config Debug: 47 15 command.c:99 script_command(): script_command - reset_config, argv[1]=srst_only Debug: 49 15 command.c:82 script_command(): script_command - jtag_device Debug: 50 15 command.c:99 script_command(): script_command - jtag_device, argv[0]=ocd_jtag_device Debug: 51 15 command.c:99 script_command(): script_command - jtag_device, argv[1]=4 Debug: 52 15 command.c:99 script_command(): script_command - jtag_device, argv[2]=0x1 Debug: 53 15 command.c:99 script_command(): script_command - jtag_device, argv[3]=0xf Debug: 54 15 command.c:99 script_command(): script_command - jtag_device, argv[4]=0xe Debug: 55 15 target.c:3859 jim_target(): Target command params: Debug: 56 15 target.c:3860 jim_target(): target cortex_m3 little 0 lm3s Debug: 57 15 target.c:3938 jim_target(): Target OLD SYNTAX - converted to new syntax Debug: 58 15 target.c:3859 jim_target(): Target command params: Debug: 59 15 target.c:3860 jim_target(): target create target0 cortex_m3 -endian little -chain-position 0 -variant lm3s Debug: 61 15 command.c:82 script_command(): script_command - working_area Debug: 62 15 command.c:99 script_command(): script_command - working_area, argv[0]=ocd_working_area Debug: 63 15 command.c:99 script_command(): script_command - working_area, argv[1]=0 Debug: 64 15 command.c:99 script_command(): script_command - working_area, argv[2]=0x20000000 Debug: 65 15 command.c:99 script_command(): script_command - working_area, argv[3]=0xF000 Debug: 66 15 command.c:99 script_command(): script_command - working_area, argv[4]=nobackup Debug: 68 15 command.c:82 script_command(): script_command - bank Debug: 69 15 command.c:99 script_command(): script_command - bank, argv[0]=ocd_flash_bank Debug: 70 15 command.c:99 script_command(): script_command - bank, argv[1]=stellaris Debug: 71 15 command.c:99 script_command(): script_command - bank, argv[2]=0 Debug: 72 15 command.c:99 script_command(): script_command - bank, argv[3]=0 Debug: 73 15 command.c:99 script_command(): script_command - bank, argv[4]=0 Debug: 74 15 command.c:99 script_command(): script_command - bank, argv[5]=0 Debug: 75 15 command.c:99 script_command(): script_command - bank, argv[6]=0 Debug: 77 15 command.c:82 script_command(): script_command - init Debug: 78 15 command.c:99 script_command(): script_command - init, argv[0]=ocd_init Debug: 79 15 openocd.c:133 handle_init_command(): target init complete Debug: 80 15 ft2232.c:1382 ft2232_init_ftd2xx(): 'ft2232' interface using FTD2XX with 'evb_lm3s811' layout (0403: 6010) Debug: 81 31 ft2232.c:1471 ft2232_init_ftd2xx(): current latency timer: 2 Debug: 82 31 ft2232.c:1714 usbjtag_init(): 80 88 8b Debug: 83 31 ft2232.c:256 ft2232_speed(): 86 05 00 Debug: 84 46 openocd.c:140 handle_init_command(): jtag interface init complete Debug: 85 46 jtag.c:1621 jtag_init_inner(): Init JTAG chain Debug: 86 46 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 87 46 jtag.c:1301 jtag_reset_callback(): - Debug: 88 62 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 89 62 jtag.c:1301 jtag_reset_callback(): - Info: 90 62 jtag.c:1410 jtag_examine_chain(): JTAG device found: 0x3ba00477 (Manufacturer: 0x23b, Part: 0xba00, Version: 0x3) Debug: 91 62 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 92 62 jtag.c:1301 jtag_reset_callback(): - Debug: 93 62 openocd.c:146 handle_init_command(): jtag init complete Debug: 94 62 cortex_swjdp.c:968 ahbap_debugport_init(): Debug: 95 78 cortex_swjdp.c:1012 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003 Debug: 96 78 target.c:1192 target_read_u32(): address: 0xe000ed00, value: 0x411fc231 Debug: 97 78 cortex_m3.c:1365 cortex_m3_examine(): CORTEX-M3 processor detected Debug: 98 78 cortex_m3.c:1366 cortex_m3_examine(): cpuid: 0x411fc231 Debug: 99 78 target.c:1192 target_read_u32(): address: 0xe000e004, value: 0x00000001 Debug: 100 78 target.c:1192 target_read_u32(): address: 0xe000e100, value: 0x00000000 Debug: 101 78 cortex_m3.c:1374 cortex_m3_examine(): interrupt enable[0] = 0x00000000 Debug: 102 93 target.c:1192 target_read_u32(): address: 0xe000e104, value: 0x00000000 Debug: 103 93 cortex_m3.c:1374 cortex_m3_examine(): interrupt enable[1] = 0x00000000 Debug: 104 93 target.c:1192 target_read_u32(): address: 0xe0002000, value: 0x00000261 Debug: 105 93 cortex_m3.c:1389 cortex_m3_examine(): FPB fpcr 0x261, numcode 6, numlit 2 Debug: 106 93 target.c:1192 target_read_u32(): address: 0xe0001000, value: 0x40000000 Debug: 107 93 openocd.c:149 handle_init_command(): jtag examine complete Debug: 108 93 openocd.c:155 handle_init_command(): flash init complete Debug: 109 93 openocd.c:159 handle_init_command(): mflash init complete Debug: 110 93 openocd.c:163 handle_init_command(): NAND init complete Debug: 111 93 openocd.c:167 handle_init_command(): pld init complete Debug: 112 109 gdb_server.c:2168 gdb_init(): gdb service for target cortex_m3 at port 3333 Info: 113 6453 server.c:84 add_connection(): accepting 'gdb' connection from 0 Debug: 114 6453 cortex_m3.c:458 cortex_m3_halt(): target->state: halted Debug: 115 6453 cortex_m3.c:462 cortex_m3_halt(): target was already halted Debug: 116 6453 target.c:709 target_call_event_callbacks(): target event 24 (gdb-attach) Debug: 117 6453 target.c:2995 target_handle_event(): event: 24 gdb-attach - no action Debug: 118 6453 target.c:2995 target_handle_event(): event: 24 gdb-attach - no action Debug: 119 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'qSupported' Debug: 120 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'QStartNoAckMode' Warning: 121 6453 gdb_server.c:567 gdb_get_packet_inner(): acknowledgment received, but no packet pending Debug: 122 6453 gdb_server.c:1997 gdb_input_inner(): received packet: '?' User: 123 6453 gdb_server.c:100 gdb_last_signal(): undefined debug reason 6 - target needs reset Debug: 124 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'Hc-1' Debug: 125 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'qC' Debug: 126 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'qOffsets' Debug: 127 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'Hg0' Debug: 128 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'g' Debug: 129 6453 gdb_server.c:1997 gdb_input_inner(): received packet: 'qXfer:memory-map:read::0,fff' Debug: 130 6468 target.c:1192 target_read_u32(): address: 0x400fe000, value: 0x10010002 Debug: 131 6468 target.c:1192 target_read_u32(): address: 0x400fe004, value: 0x1073402d Debug: 132 6468 target.c:1192 target_read_u32(): address: 0x400fe008, value: 0x00ff007f Debug: 133 6468 target.c:1192 target_read_u32(): address: 0x400fe010, value: 0x001133ff Debug: 134 6468 stellaris.c:455 stellaris_read_part_info(): did0 0x10010002, did1 0x1073402d, dc0 0xff007f, dc1 0x1133ff Debug: 135 6484 target.c:1192 target_read_u32(): address: 0x400fe134, value: 0xffffffff Debug: 136 6484 target.c:1192 target_read_u32(): address: 0x400fe060, value: 0x01ce0380 Debug: 137 6484 stellaris.c:354 stellaris_read_clock_info(): Stellaris RCC 1ce0380 Debug: 138 6484 target.c:1192 target_read_u32(): address: 0x400fe064, value: 0x00000640 Debug: 139 6484 stellaris.c:356 stellaris_read_clock_info(): Stellaris PLLCFG 640 Debug: 140 6484 stellaris.c:404 stellaris_set_flash_mode(): usecrl = 49 Debug: 141 6484 target.c:1260 target_write_u32(): address: 0x400fe140, value: 0x00000031 Debug: 142 6499 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000000 Debug: 143 6499 gdb_server.c:1997 gdb_input_inner(): received packet: 'm0,4' Debug: 144 6499 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000000, len: 0x00000004 Debug: 145 6499 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000000 Debug: 146 6499 gdb_server.c:1997 gdb_input_inner(): received packet: 'qSymbol::' Debug: 147 6546 gdb_server.c:1997 gdb_input_inner(): received packet: 'qfThreadInfo' Debug: 148 6546 gdb_server.c:1997 gdb_input_inner(): received packet: 'qL1200000000000000000' Debug: 149 6546 gdb_server.c:1997 gdb_input_inner(): received packet: 'qRcmd,736f66745f72657365745f68616c74' Debug: 151 6562 command.c:82 script_command(): script_command - soft_reset_halt Debug: 152 6562 command.c:99 script_command(): script_command - soft_reset_halt, argv[0]=ocd_soft_reset_halt User: 153 6562 target.c:1691 handle_soft_reset_halt_command(): requesting target halt and executing a soft reset Debug: 154 6562 cortex_m3.c:524 cortex_m3_soft_reset_halt(): system reset-halted, dcb_dhcsr 0x2030007, nvic_dfsr 0x8 Debug: 155 6578 cortex_m3.c:409 cortex_m3_poll(): Exit from reset with dcb_dhcsr 0x30007 Debug: 156 6578 cortex_m3.c:182 cortex_m3_endreset_event(): DCB_DEMCR = 0x01000501 Debug: 157 6578 target.c:1260 target_write_u32(): address: 0xe0002000, value: 0x00000003 Debug: 158 6578 target.c:1260 target_write_u32(): address: 0xe0002008, value: 0x00000000 Debug: 159 6593 target.c:1260 target_write_u32(): address: 0xe000200c, value: 0x00000000 Debug: 160 6593 target.c:1260 target_write_u32(): address: 0xe0002010, value: 0x00000000 Debug: 161 6593 target.c:1260 target_write_u32(): address: 0xe0002014, value: 0x00000000 Debug: 162 6593 target.c:1260 target_write_u32(): address: 0xe0002018, value: 0x00000000 Debug: 163 6609 target.c:1260 target_write_u32(): address: 0xe000201c, value: 0x00000000 Debug: 164 6609 target.c:1260 target_write_u32(): address: 0xe0002020, value: 0x00000000 Debug: 165 6609 target.c:1260 target_write_u32(): address: 0xe0002024, value: 0x00000000 Debug: 166 6609 target.c:1260 target_write_u32(): address: 0xe0001020, value: 0x00000000 Debug: 167 6624 target.c:1260 target_write_u32(): address: 0xe0001024, value: 0x00000000 Debug: 168 6624 target.c:1260 target_write_u32(): address: 0xe0001028, value: 0x00000000 Debug: 169 6624 target.c:1260 target_write_u32(): address: 0xe0001030, value: 0x00000000 Debug: 170 6624 target.c:1260 target_write_u32(): address: 0xe0001034, value: 0x00000000 Debug: 171 6640 target.c:1260 target_write_u32(): address: 0xe0001038, value: 0x00000000 Debug: 172 6640 target.c:1260 target_write_u32(): address: 0xe0001040, value: 0x00000000 Debug: 173 6640 target.c:1260 target_write_u32(): address: 0xe0001044, value: 0x00000000 Debug: 174 6640 target.c:1260 target_write_u32(): address: 0xe0001048, value: 0x00000000 Debug: 175 6656 target.c:1260 target_write_u32(): address: 0xe0001050, value: 0x00000000 Debug: 176 6656 target.c:1260 target_write_u32(): address: 0xe0001054, value: 0x00000000 Debug: 177 6656 target.c:1260 target_write_u32(): address: 0xe0001058, value: 0x00000000 Debug: 178 6671 cortex_m3.c:306 cortex_m3_debug_entry(): Debug: 179 6671 cortex_m3.c:114 cortex_m3_clear_halt(): NVIC_DFSR 0x8 Debug: 180 6687 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x20000068 Debug: 181 6703 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0x1a278 Debug: 182 6718 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0x2278 Debug: 183 6734 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x400fd000 Debug: 184 6734 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0xa4420001 Debug: 185 6749 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x1 Debug: 186 6765 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x2278 Debug: 187 6781 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0 Debug: 188 6781 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x200003da Debug: 189 6796 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0xe000ed0c Debug: 190 6812 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x5fa0004 Debug: 191 6828 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x1000 Debug: 192 6828 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x1 Debug: 193 6843 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x20000718 Debug: 194 6859 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xffffffff Debug: 195 6874 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x24d8 Debug: 196 6890 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x1000000 Debug: 197 6890 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x20000718 Debug: 198 6906 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x80010410 Debug: 199 6921 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x0 Debug: 200 6937 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0 Debug: 201 6937 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0 Debug: 202 6953 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0 Debug: 203 6953 cortex_m3.c:368 cortex_m3_debug_entry(): entered debug state in core mode: Thread at PC 0x24d8, target->state: halted Debug: 204 6953 target.c:709 target_call_event_callbacks(): target event 4 (early-halted) Debug: 205 6953 target.c:2995 target_handle_event(): event: 4 early-halted - no action Debug: 206 6953 target.c:2995 target_handle_event(): event: 4 early-halted - no action Debug: 207 6953 target.c:709 target_call_event_callbacks(): target event 5 (halted) Debug: 208 6953 target.c:2995 target_handle_event(): event: 5 halted - no action User: 209 6953 target.c:965 target_arch_state(): target state: halted User: 210 6953 armv7m.c:465 armv7m_arch_state(): target halted due to undefined, current mode: Thread xPSR: 0x01000000 pc: 0x000024d8 Debug: 211 6953 target.c:2995 target_handle_event(): event: 5 halted - no action Debug: 212 6968 gdb_server.c:1997 gdb_input_inner(): received packet: 'm0,4' Debug: 213 6968 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000000, len: 0x00000004 Debug: 214 6968 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000000 Debug: 215 7031 gdb_server.c:1997 gdb_input_inner(): received packet: 'qRcmd,736c65657020323030' Debug: 217 7046 command.c:82 script_command(): script_command - sleep Debug: 218 7046 command.c:99 script_command(): script_command - sleep, argv[0]=ocd_sleep Debug: 219 7046 command.c:99 script_command(): script_command - sleep, argv[1]=200 Debug: 220 7343 gdb_server.c:1997 gdb_input_inner(): received packet: 'qRcmd, 666c61736820636f6e645f77726974655f696d616765206572617365202e2e2f636f727465782d6d332d626f6f746c6f616465722f72656c656173652f426f6f746c6f616465722e62696e20302062696e' Debug: 222 7359 command.c:82 script_command(): script_command - cond_write_image Debug: 223 7359 command.c:99 script_command(): script_command - cond_write_image, argv[0] =ocd_flash_cond_write_image Debug: 224 7359 command.c:99 script_command(): script_command - cond_write_image, argv[1]=erase Debug: 225 7359 command.c:99 script_command(): script_command - cond_write_image, argv[2]=../cortex-m3- bootloader/release/Bootloader.bin Debug: 226 7359 command.c:99 script_command(): script_command - cond_write_image, argv[3]=0 Debug: 227 7359 command.c:99 script_command(): script_command - cond_write_image, argv[4]=bin Debug: 228 7359 configuration.c:88 find_file(): found ../cortex-m3-bootloader/release/Bootloader.bin Debug: 229 7359 image.c:1002 image_calculate_checksum(): Calculating checksum Debug: 230 7359 image.c:1033 image_calculate_checksum(): Calculating checksum done Debug: 231 7359 target.c:832 target_alloc_working_area(): allocating new working area Debug: 232 7359 target.c:1281 target_write_u16(): address: 0x20000000, value: 0x00004602 Debug: 233 7359 target.c:1281 target_write_u16(): address: 0x20000002, value: 0x0000f04f Debug: 234 7359 target.c:1281 target_write_u16(): address: 0x20000004, value: 0x000030ff Debug: 235 7359 target.c:1281 target_write_u16(): address: 0x20000006, value: 0x0000460b Debug: 236 7374 target.c:1281 target_write_u16(): address: 0x20000008, value: 0x0000f04f Debug: 237 7374 target.c:1281 target_write_u16(): address: 0x2000000a, value: 0x00000400 Debug: 238 7374 target.c:1281 target_write_u16(): address: 0x2000000c, value: 0x0000e013 Debug: 239 7390 target.c:1281 target_write_u16(): address: 0x2000000e, value: 0x00005d11 Debug: 240 7390 target.c:1281 target_write_u16(): address: 0x20000010, value: 0x0000f8df Debug: 241 7390 target.c:1281 target_write_u16(): address: 0x20000012, value: 0x00007028 Debug: 242 7390 target.c:1281 target_write_u16(): address: 0x20000014, value: 0x0000ea80 Debug: 243 7406 target.c:1281 target_write_u16(): address: 0x20000016, value: 0x00006001 Debug: 244 7406 target.c:1281 target_write_u16(): address: 0x20000018, value: 0x0000f04f Debug: 245 7406 target.c:1281 target_write_u16(): address: 0x2000001a, value: 0x00000500 Debug: 246 7406 target.c:1281 target_write_u16(): address: 0x2000001c, value: 0x00002800 Debug: 247 7421 target.c:1281 target_write_u16(): address: 0x2000001e, value: 0x0000ea4f Debug: 248 7421 target.c:1281 target_write_u16(): address: 0x20000020, value: 0x00000640 Debug: 249 7421 target.c:1281 target_write_u16(): address: 0x20000022, value: 0x0000f105 Debug: 250 7421 target.c:1281 target_write_u16(): address: 0x20000024, value: 0x00000501 Debug: 251 7437 target.c:1281 target_write_u16(): address: 0x20000026, value: 0x00004630 Debug: 252 7437 target.c:1281 target_write_u16(): address: 0x20000028, value: 0x0000bfb8 Debug: 253 7437 target.c:1281 target_write_u16(): address: 0x2000002a, value: 0x0000ea86 Debug: 254 7437 target.c:1281 target_write_u16(): address: 0x2000002c, value: 0x00000007 Debug: 255 7453 target.c:1281 target_write_u16(): address: 0x2000002e, value: 0x00002d08 Debug: 256 7453 target.c:1281 target_write_u16(): address: 0x20000030, value: 0x0000d1f4 Debug: 257 7453 target.c:1281 target_write_u16(): address: 0x20000032, value: 0x0000f104 Debug: 258 7453 target.c:1281 target_write_u16(): address: 0x20000034, value: 0x00000401 Debug: 259 7468 target.c:1281 target_write_u16(): address: 0x20000036, value: 0x0000429c Debug: 260 7468 target.c:1281 target_write_u16(): address: 0x20000038, value: 0x0000d1e9 Debug: 261 7468 target.c:1281 target_write_u16(): address: 0x2000003a, value: 0x0000e7fe Debug: 262 7468 target.c:1281 target_write_u16(): address: 0x2000003c, value: 0x00001db7 Debug: 263 7484 target.c:1281 target_write_u16(): address: 0x2000003e, value: 0x000004c1 Debug: 264 7499 breakpoints.c:93 breakpoint_add(): added software breakpoint at 0x2000003a of length 0x00000002 Debug: 265 7499 armv7m.c:134 armv7m_restore_context(): Debug: 266 7499 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 15 value 0x20000000 Debug: 267 7499 armv7m.c:243 armv7m_write_core_reg(): write core reg 15 value 0x20000000 Debug: 268 7515 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 1 value 0xdc0 Debug: 269 7515 armv7m.c:243 armv7m_write_core_reg(): write core reg 1 value 0xdc0 Debug: 270 7531 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 0 value 0x0 Debug: 271 7531 armv7m.c:243 armv7m_write_core_reg(): write core reg 0 value 0x0 Debug: 272 7531 target.c:709 target_call_event_callbacks(): target event 21 (debug-resumed) Debug: 273 7531 target.c:2995 target_handle_event(): event: 21 debug-resumed - no action Debug: 274 7531 target.c:2995 target_handle_event(): event: 21 debug-resumed - no action Debug: 275 7531 cortex_m3.c:620 cortex_m3_resume(): target debug resumed at 0x20000000 Debug: 276 7546 target.c:1657 target_wait_state(): waiting for target halted... Debug: 277 7546 cortex_m3.c:428 cortex_m3_poll(): Debug: 278 7546 cortex_m3.c:306 cortex_m3_debug_entry(): Debug: 279 7546 cortex_m3.c:114 cortex_m3_clear_halt(): NVIC_DFSR 0x2 Debug: 280 7562 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0xafa41f04 Debug: 281 7578 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xf9 Debug: 282 7593 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0x0 Debug: 283 7609 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0xdc0 Debug: 284 7609 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0xdc0 Debug: 285 7624 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x8 Debug: 286 7640 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0xafa41f04 Debug: 287 7656 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x4c11db7 Debug: 288 7671 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x200003da Debug: 289 7671 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0xe000ed0c Debug: 290 7687 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x5fa0004 Debug: 291 7703 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x1000 Debug: 292 7718 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x1 Debug: 293 7718 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x20000718 Debug: 294 7734 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xffffffff Debug: 295 7749 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x2000003a Debug: 296 7765 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x61000000 Debug: 297 7765 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x20000718 Debug: 298 7781 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x80010410 Debug: 299 7796 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x0 Debug: 300 7812 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0 Debug: 301 7812 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0 Debug: 302 7843 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0 Debug: 303 7843 cortex_m3.c:368 cortex_m3_debug_entry(): entered debug state in core mode: Thread at PC 0x2000003a, target->state: halted Debug: 304 7843 target.c:709 target_call_event_callbacks(): target event 20 (debug-halted) Debug: 305 7843 target.c:2995 target_handle_event(): event: 20 debug-halted - no action Debug: 306 7843 target.c:2995 target_handle_event(): event: 20 debug-halted - no action Debug: 307 7859 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x2000003a Debug: 308 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register control with value 0x00000000 Debug: 309 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register faultmask with value 0x00000000 Debug: 310 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register basepri with value 0x00000000 Debug: 311 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register primask with value 0x00000000 Debug: 312 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register psp with value 0x80010410 Debug: 313 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register msp with value 0x20000718 Debug: 314 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register xPSR with value 0x01000000 Debug: 315 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register pc with value 0x000024d8 Debug: 316 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register lr with value 0xffffffff Debug: 317 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register sp with value 0x20000718 Debug: 318 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r12 with value 0x00000001 Debug: 319 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r11 with value 0x00001000 Debug: 320 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r10 with value 0x05fa0004 Debug: 321 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r9 with value 0xe000ed0c Debug: 322 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r8 with value 0x200003da Debug: 323 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r7 with value 0x00000000 Debug: 324 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r6 with value 0x00002278 Debug: 325 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r5 with value 0x00000001 Debug: 326 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r4 with value 0xa4420001 Debug: 327 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r3 with value 0x400fd000 Debug: 328 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r2 with value 0x00002278 Debug: 329 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r1 with value 0x0001a278 Debug: 330 7859 armv7m.c:444 armv7m_run_algorithm(): restoring register r0 with value 0x20000068 User: 331 7859 command.c:363 command_print(): checksum mismatch - attempting binary compare User: 332 7921 command.c:363 command_print(): Verify operation failed address 0x00000000. Was 0x18 instead of 0x0c User: 333 7921 command.c:363 command_print(): current image differs, downloading new image User: 334 7921 command.c:363 command_print(): auto erase enabled Debug: 335 7921 configuration.c:88 find_file(): found ../cortex-m3-bootloader/release/Bootloader.bin Debug: 336 7921 target.c:1192 target_read_u32(): address: 0x400fe060, value: 0x01ce0380 Debug: 337 7921 stellaris.c:354 stellaris_read_clock_info(): Stellaris RCC 1ce0380 Debug: 338 7937 target.c:1192 target_read_u32(): address: 0x400fe064, value: 0x00000640 Debug: 339 7937 stellaris.c:356 stellaris_read_clock_info(): Stellaris PLLCFG 640 Debug: 340 7937 stellaris.c:404 stellaris_set_flash_mode(): usecrl = 49 Debug: 341 7937 target.c:1260 target_write_u32(): address: 0x400fe140, value: 0x00000031 Debug: 342 7937 stellaris.c:404 stellaris_set_flash_mode(): usecrl = 49 Debug: 343 7937 target.c:1260 target_write_u32(): address: 0x400fe140, value: 0x00000031 Debug: 344 7937 target.c:1260 target_write_u32(): address: 0x400fd010, value: 0x00000000 Debug: 345 7937 target.c:1260 target_write_u32(): address: 0x400fd014, value: 0x00000003 Debug: 346 7953 target.c:1260 target_write_u32(): address: 0x400fd000, value: 0x00000000 Debug: 347 7953 target.c:1260 target_write_u32(): address: 0x400fd008, value: 0xa4420002 Debug: 348 7953 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 349 7968 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 350 7968 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 351 7968 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 352 7968 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 353 7984 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000000 Debug: 354 7984 target.c:1192 target_read_u32(): address: 0x400fd00c, value: 0x00000002 Debug: 355 7984 target.c:1260 target_write_u32(): address: 0x400fd000, value: 0x00000400 Debug: 356 7984 target.c:1260 target_write_u32(): address: 0x400fd008, value: 0xa4420002 Debug: 357 7999 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 358 7999 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 359 7999 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 360 8015 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 361 8015 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 362 8015 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000000 Debug: 363 8015 target.c:1192 target_read_u32(): address: 0x400fd00c, value: 0x00000002 Debug: 364 8015 target.c:1260 target_write_u32(): address: 0x400fd000, value: 0x00000800 Debug: 365 8031 target.c:1260 target_write_u32(): address: 0x400fd008, value: 0xa4420002 Debug: 366 8031 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 367 8031 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 368 8062 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 369 8062 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000000 Debug: 370 8062 target.c:1192 target_read_u32(): address: 0x400fd00c, value: 0x00000002 Debug: 371 8062 target.c:1260 target_write_u32(): address: 0x400fd000, value: 0x00000c00 Debug: 372 8062 target.c:1260 target_write_u32(): address: 0x400fd008, value: 0xa4420002 Debug: 373 8078 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 374 8078 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 375 8078 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 376 8093 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 377 8093 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000002 Debug: 378 8093 target.c:1192 target_read_u32(): address: 0x400fd008, value: 0x00000000 Debug: 379 8093 target.c:1192 target_read_u32(): address: 0x400fd00c, value: 0x00000002 Debug: 380 8093 stellaris.c:828 stellaris_write(): (bank=0xeaf8a0 buffer=0xedffc8 offset=00000000 count=00000DC0) Debug: 381 8109 target.c:1192 target_read_u32(): address: 0x400fe060, value: 0x01ce0380 Debug: 382 8109 stellaris.c:354 stellaris_read_clock_info(): Stellaris RCC 1ce0380 Debug: 383 8109 target.c:1192 target_read_u32(): address: 0x400fe064, value: 0x00000640 Debug: 384 8109 stellaris.c:356 stellaris_read_clock_info(): Stellaris PLLCFG 640 Debug: 385 8109 stellaris.c:404 stellaris_set_flash_mode(): usecrl = 49 Debug: 386 8109 target.c:1260 target_write_u32(): address: 0x400fe140, value: 0x00000031 Debug: 387 8109 stellaris.c:404 stellaris_set_flash_mode(): usecrl = 49 Debug: 388 8109 target.c:1260 target_write_u32(): address: 0x400fe140, value: 0x00000031 Debug: 389 8109 target.c:1260 target_write_u32(): address: 0x400fd010, value: 0x00000000 Debug: 390 8124 target.c:1260 target_write_u32(): address: 0x400fd014, value: 0x00000003 Debug: 391 8124 stellaris.c:745 stellaris_write_block(): (bank=0xeaf8a0 buffer=0xedffc8 offset=00000000 wcount=00000370) Debug: 392 8124 target.c:832 target_alloc_working_area(): allocating new working area Debug: 393 8124 target.c:981 target_write_buffer(): writing buffer of 40 byte at 0x20000040 Debug: 394 8124 target.c:832 target_alloc_working_area(): allocating new working area Debug: 395 8124 target.c:981 target_write_buffer(): writing buffer of 3520 byte at 0x20000068 Info: 396 8171 stellaris.c:789 stellaris_write_block(): Algorithm flash write 880 words to 0x0, 880 remaining Debug: 397 8171 stellaris.c:790 stellaris_write_block(): Algorithm flash write 880 words to 0x0, 880 remaining Debug: 398 8187 breakpoints.c:93 breakpoint_add(): added software breakpoint at 0x2000005e of length 0x00000002 Debug: 399 8187 armv7m.c:134 armv7m_restore_context(): Debug: 400 8203 cortex_m3.c:1254 cortex_m3_store_core_reg_u32(): write special reg 22 value 0x0 Debug: 401 8203 armv7m.c:243 armv7m_write_core_reg(): write core reg 22 value 0x0 Debug: 402 8234 cortex_m3.c:1254 cortex_m3_store_core_reg_u32(): write special reg 21 value 0x0 Debug: 403 8234 armv7m.c:243 armv7m_write_core_reg(): write core reg 21 value 0x0 Debug: 404 8265 cortex_m3.c:1254 cortex_m3_store_core_reg_u32(): write special reg 20 value 0x0 Debug: 405 8265 armv7m.c:243 armv7m_write_core_reg(): write core reg 20 value 0x0 Debug: 406 8281 cortex_m3.c:1254 cortex_m3_store_core_reg_u32(): write special reg 19 value 0x1 Debug: 407 8281 armv7m.c:243 armv7m_write_core_reg(): write core reg 19 value 0x1 Debug: 408 8296 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 18 value 0x80010410 Debug: 409 8296 armv7m.c:243 armv7m_write_core_reg(): write core reg 18 value 0x80010410 Debug: 410 8312 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 17 value 0x20000718 Debug: 411 8312 armv7m.c:243 armv7m_write_core_reg(): write core reg 17 value 0x20000718 Debug: 412 8312 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 16 value 0x1000000 Debug: 413 8312 armv7m.c:243 armv7m_write_core_reg(): write core reg 16 value 0x1000000 Debug: 414 8343 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 15 value 0x20000040 Debug: 415 8343 armv7m.c:243 armv7m_write_core_reg(): write core reg 15 value 0x20000040 Debug: 416 8343 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 14 value 0xffffffff Debug: 417 8343 armv7m.c:243 armv7m_write_core_reg(): write core reg 14 value 0xffffffff Debug: 418 8359 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 13 value 0x20000718 Debug: 419 8359 armv7m.c:243 armv7m_write_core_reg(): write core reg 13 value 0x20000718 Debug: 420 8374 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 12 value 0x1 Debug: 421 8374 armv7m.c:243 armv7m_write_core_reg(): write core reg 12 value 0x1 Debug: 422 8390 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 11 value 0x1000 Debug: 423 8390 armv7m.c:243 armv7m_write_core_reg(): write core reg 11 value 0x1000 Debug: 424 8390 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 10 value 0x5fa0004 Debug: 425 8390 armv7m.c:243 armv7m_write_core_reg(): write core reg 10 value 0x5fa0004 Debug: 426 8406 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 9 value 0xe000ed0c Debug: 427 8406 armv7m.c:243 armv7m_write_core_reg(): write core reg 9 value 0xe000ed0c Debug: 428 8421 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 8 value 0x200003da Debug: 429 8421 armv7m.c:243 armv7m_write_core_reg(): write core reg 8 value 0x200003da Debug: 430 8437 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 7 value 0x0 Debug: 431 8437 armv7m.c:243 armv7m_write_core_reg(): write core reg 7 value 0x0 Debug: 432 8453 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 6 value 0x2278 Debug: 433 8453 armv7m.c:243 armv7m_write_core_reg(): write core reg 6 value 0x2278 Debug: 434 8453 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 5 value 0x1 Debug: 435 8453 armv7m.c:243 armv7m_write_core_reg(): write core reg 5 value 0x1 Debug: 436 8468 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 4 value 0xa4420001 Debug: 437 8468 armv7m.c:243 armv7m_write_core_reg(): write core reg 4 value 0xa4420001 Debug: 438 8484 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 3 value 0x400fd000 Debug: 439 8484 armv7m.c:243 armv7m_write_core_reg(): write core reg 3 value 0x400fd000 Debug: 440 8499 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 2 value 0xdc0 Debug: 441 8499 armv7m.c:243 armv7m_write_core_reg(): write core reg 2 value 0xdc0 Debug: 442 8515 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 1 value 0x0 Debug: 443 8515 armv7m.c:243 armv7m_write_core_reg(): write core reg 1 value 0x0 Debug: 444 8515 cortex_m3.c:1225 cortex_m3_store_core_reg_u32(): write core reg 0 value 0x20000068 Debug: 445 8515 armv7m.c:243 armv7m_write_core_reg(): write core reg 0 value 0x20000068 Debug: 446 8531 target.c:709 target_call_event_callbacks(): target event 21 (debug-resumed) Debug: 447 8531 target.c:2995 target_handle_event(): event: 21 debug-resumed - no action Debug: 448 8531 target.c:2995 target_handle_event(): event: 21 debug-resumed - no action Debug: 449 8531 cortex_m3.c:620 cortex_m3_resume(): target debug resumed at 0x20000040 Debug: 450 8531 target.c:1657 target_wait_state(): waiting for target halted... Debug: 451 8578 cortex_m3.c:428 cortex_m3_poll(): Debug: 452 8578 cortex_m3.c:306 cortex_m3_debug_entry(): Debug: 453 8578 cortex_m3.c:114 cortex_m3_clear_halt(): NVIC_DFSR 0x2 Debug: 454 8593 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x20000068 Debug: 455 8609 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xdc0 Debug: 456 8624 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0xdc0 Debug: 457 8624 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x400fd000 Debug: 458 8640 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0xa4420001 Debug: 459 8656 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x1 Debug: 460 8671 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0xdc0 Debug: 461 8687 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0 Debug: 463 8687 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x200003da Debug: 464 8703 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0xe000ed0c Debug: 465 8718 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x5fa0004 Debug: 466 8734 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x1000 Debug: 467 8734 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x1 Debug: 468 8749 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x20000718 Debug: 469 8765 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xffffffff Debug: 470 8781 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x2000005e Debug: 471 8781 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x61000000 Debug: 472 8796 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x20000718 Debug: 473 8812 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x80010410 Debug: 474 8828 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x1 Debug: 475 8843 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0 Debug: 476 8843 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0 Debug: 477 8859 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0 Debug: 478 8859 cortex_m3.c:368 cortex_m3_debug_entry(): entered debug state in core mode: Thread at PC 0x2000005e, target->state: halted Debug: 479 8859 target.c:709 target_call_event_callbacks(): target event 20 (debug-halted) Debug: 480 8859 target.c:2995 target_handle_event(): event: 20 debug-halted - no action Debug: 481 8859 target.c:2995 target_handle_event(): event: 20 debug-halted - no action Debug: 482 8874 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x2000005e Debug: 483 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register control with value 0x00000000 Debug: 484 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register faultmask with value 0x00000000 Debug: 485 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register basepri with value 0x00000000 Debug: 486 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register primask with value 0x00000000 Debug: 487 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register psp with value 0x80010410 Debug: 488 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register msp with value 0x20000718 Debug: 489 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register xPSR with value 0x01000000 Debug: 490 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register pc with value 0x000024d8 Debug: 491 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register lr with value 0xffffffff Debug: 492 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register sp with value 0x20000718 Debug: 493 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r12 with value 0x00000001 Debug: 494 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r11 with value 0x00001000 Debug: 495 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r10 with value 0x05fa0004 Debug: 496 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r9 with value 0xe000ed0c Debug: 497 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r8 with value 0x200003da Debug: 498 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r7 with value 0x00000000 Debug: 499 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r6 with value 0x00002278 Debug: 500 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r5 with value 0x00000001 Debug: 501 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r4 with value 0xa4420001 Debug: 502 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r3 with value 0x400fd000 Debug: 503 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r2 with value 0x00002278 Debug: 504 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r1 with value 0x0001a278 Debug: 505 8874 armv7m.c:444 armv7m_run_algorithm(): restoring register r0 with value 0x20000068 Debug: 506 8890 target.c:1192 target_read_u32(): address: 0x400fd00c, value: 0x00000002 User: 507 8890 command.c:363 command_print(): wrote 3520 byte from file ../cortex-m3-bootloader/release/Bootloader. bin in 0.968743s (3.548413 kb/s) Debug: 508 8968 gdb_server.c:1997 gdb_input_inner(): received packet: 'qRcmd,736f66745f72657365745f68616c74' Debug: 510 8984 command.c:82 script_command(): script_command - soft_reset_halt Debug: 511 8984 command.c:99 script_command(): script_command - soft_reset_halt, argv[0]=ocd_soft_reset_halt User: 512 8984 target.c:1691 handle_soft_reset_halt_command(): requesting target halt and executing a soft reset Debug: 513 8999 cortex_m3.c:524 cortex_m3_soft_reset_halt(): system reset-halted, dcb_dhcsr 0x2030003, nvic_dfsr 0x8 Debug: 514 8999 cortex_m3.c:409 cortex_m3_poll(): Exit from reset with dcb_dhcsr 0x30003 Debug: 515 8999 cortex_m3.c:182 cortex_m3_endreset_event(): DCB_DEMCR = 0x01000501 Debug: 516 9015 target.c:1260 target_write_u32(): address: 0xe0002000, value: 0x00000003 Debug: 517 9015 target.c:1260 target_write_u32(): address: 0xe0002008, value: 0x00000000 Debug: 518 9015 target.c:1260 target_write_u32(): address: 0xe000200c, value: 0x00000000 Debug: 519 9015 target.c:1260 target_write_u32(): address: 0xe0002010, value: 0x00000000 Debug: 520 9031 target.c:1260 target_write_u32(): address: 0xe0002014, value: 0x00000000 Debug: 521 9031 target.c:1260 target_write_u32(): address: 0xe0002018, value: 0x00000000 Debug: 522 9031 target.c:1260 target_write_u32(): address: 0xe000201c, value: 0x00000000 Debug: 523 9031 target.c:1260 target_write_u32(): address: 0xe0002020, value: 0x00000000 Debug: 524 9046 target.c:1260 target_write_u32(): address: 0xe0002024, value: 0x00000000 Debug: 525 9046 target.c:1260 target_write_u32(): address: 0xe0001020, value: 0x00000000 Debug: 526 9046 target.c:1260 target_write_u32(): address: 0xe0001024, value: 0x00000000 Debug: 527 9046 target.c:1260 target_write_u32(): address: 0xe0001028, value: 0x00000000 Debug: 528 9062 target.c:1260 target_write_u32(): address: 0xe0001030, value: 0x00000000 Debug: 529 9062 target.c:1260 target_write_u32(): address: 0xe0001034, value: 0x00000000 Debug: 530 9062 target.c:1260 target_write_u32(): address: 0xe0001038, value: 0x00000000 Debug: 531 9078 target.c:1260 target_write_u32(): address: 0xe0001040, value: 0x00000000 Debug: 532 9078 target.c:1260 target_write_u32(): address: 0xe0001044, value: 0x00000000 Debug: 533 9078 target.c:1260 target_write_u32(): address: 0xe0001048, value: 0x00000000 Debug: 534 9078 target.c:1260 target_write_u32(): address: 0xe0001050, value: 0x00000000 Debug: 535 9093 target.c:1260 target_write_u32(): address: 0xe0001054, value: 0x00000000 Debug: 536 9093 target.c:1260 target_write_u32(): address: 0xe0001058, value: 0x00000000 Debug: 537 9093 cortex_m3.c:306 cortex_m3_debug_entry(): Debug: 538 9109 cortex_m3.c:114 cortex_m3_clear_halt(): NVIC_DFSR 0x8 Debug: 539 9124 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x20000068 Debug: 540 9140 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xdc0 Debug: 541 9140 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0xdc0 Debug: 542 9156 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x400fd000 Debug: 543 9171 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0xa4420001 Debug: 544 9187 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x1 Debug: 545 9203 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0xdc0 Debug: 546 9203 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0 Debug: 547 9218 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x200003da Debug: 548 9234 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0xe000ed0c Debug: 549 9249 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x5fa0004 Debug: 550 9249 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x1000 Debug: 551 9265 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x1 Debug: 552 9281 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x2000040c Debug: 553 9296 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xffffffff Debug: 554 9296 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x440 Debug: 555 9312 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x1000000 Debug: 556 9328 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x2000040c Debug: 557 9343 cortex_m3.c:1159 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x80010410 Debug: 558 9359 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x0 Debug: 559 9359 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0 Debug: 560 9374 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0 Debug: 561 9390 cortex_m3.c:1185 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0 Debug: 562 9390 cortex_m3.c:368 cortex_m3_debug_entry(): entered debug state in core mode: Thread at PC 0x440, target->state: halted Debug: 563 9390 target.c:709 target_call_event_callbacks(): target event 4 (early-halted) Debug: 564 9390 target.c:2995 target_handle_event(): event: 4 early-halted - no action Debug: 565 9390 target.c:2995 target_handle_event(): event: 4 early-halted - no action Debug: 566 9390 target.c:709 target_call_event_callbacks(): target event 5 (halted) Debug: 567 9390 target.c:2995 target_handle_event(): event: 5 halted - no action User: 568 9390 target.c:965 target_arch_state(): target state: halted User: 569 9390 armv7m.c:465 armv7m_arch_state(): target halted due to breakpoint, current mode: Thread xPSR: 0x01000000 pc: 0x00000440 Debug: 570 9390 target.c:2995 target_handle_event(): event: 5 halted - no action Debug: 571 9437 gdb_server.c:1997 gdb_input_inner(): received packet: 'm0,4' Debug: 572 9437 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000000, len: 0x00000004 Debug: 573 9437 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000000 Debug: 574 9437 gdb_server.c:1997 gdb_input_inner(): received packet: 'm4,4' Debug: 575 9437 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000004, len: 0x00000004 Debug: 576 9437 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000004 Debug: 577 9437 gdb_server.c:1997 gdb_input_inner(): received packet: 'm8,4' Debug: 578 9437 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000008, len: 0x00000004 Debug: 579 9437 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000008 Debug: 580 9453 gdb_server.c:1997 gdb_input_inner(): received packet: 'mc,4' Debug: 581 9453 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x0000000c, len: 0x00000004 Debug: 582 9453 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x0000000c Debug: 583 9453 gdb_server.c:1997 gdb_input_inner(): received packet: 'm10,4' Debug: 584 9453 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000010, len: 0x00000004 Debug: 585 9453 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000010 Debug: 586 9453 gdb_server.c:1997 gdb_input_inner(): received packet: 'm14,4' Debug: 587 9453 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000014, len: 0x00000004 Debug: 588 9453 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000014 Debug: 589 9453 gdb_server.c:1997 gdb_input_inner(): received packet: 'm18,4' Debug: 590 9453 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000018, len: 0x00000004 Debug: 591 9453 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000018 Debug: 592 9468 gdb_server.c:1997 gdb_input_inner(): received packet: 'm1c,4' Debug: 593 9468 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x0000001c, len: 0x00000004 Debug: 594 9468 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x0000001c Debug: 595 9468 gdb_server.c:1997 gdb_input_inner(): received packet: 'm20,4' Debug: 596 9468 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000020, len: 0x00000004 Debug: 597 9468 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000020 Debug: 598 9468 gdb_server.c:1997 gdb_input_inner(): received packet: 'm24,4' Debug: 599 9468 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000024, len: 0x00000004 Debug: 600 9468 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000024 Debug: 601 9468 gdb_server.c:1997 gdb_input_inner(): received packet: 'm28,4' Debug: 602 9468 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000028, len: 0x00000004 Debug: 603 9468 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000028 Debug: 604 9484 gdb_server.c:1997 gdb_input_inner(): received packet: 'm2c,4' Debug: 605 9484 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x0000002c, len: 0x00000004 Debug: 606 9484 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x0000002c Debug: 607 9484 gdb_server.c:1997 gdb_input_inner(): received packet: 'm30,4' Debug: 608 9484 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000030, len: 0x00000004 Debug: 609 9484 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000030 Debug: 610 9484 gdb_server.c:1997 gdb_input_inner(): received packet: 'm34,4' Debug: 611 9484 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000034, len: 0x00000004 Debug: 612 9484 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000034 Debug: 613 9484 gdb_server.c:1997 gdb_input_inner(): received packet: 'm38,4' Debug: 614 9484 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000038, len: 0x00000004 Debug: 615 9484 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000038 Debug: 616 9499 gdb_server.c:1997 gdb_input_inner(): received packet: 'm3c,4' Debug: 617 9499 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x0000003c, len: 0x00000004 Debug: 618 9499 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x0000003c Debug: 619 9499 gdb_server.c:1997 gdb_input_inner(): received packet: 'm40,4' Debug: 620 9499 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000040, len: 0x00000004 Debug: 621 9499 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000040 Debug: 622 9499 gdb_server.c:1997 gdb_input_inner(): received packet: 'm44,4' Debug: 623 9499 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000044, len: 0x00000004 Debug: 624 9499 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000044 Debug: 625 9515 gdb_server.c:1997 gdb_input_inner(): received packet: 'm48,4' Debug: 626 9515 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x00000048, len: 0x00000004 Debug: 627 9515 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x00000048 Debug: 628 9515 gdb_server.c:1997 gdb_input_inner(): received packet: 'm4c,4' Debug: 629 9515 gdb_server.c:1137 gdb_read_memory_packet(): addr: 0x0000004c, len: 0x00000004 Debug: 630 9515 target.c:1057 target_read_buffer(): reading buffer of 4 byte at 0x0000004c Debug: 631 9515 gdb_server.c:1997 gdb_in... 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