[Netnice-commitlog] netnice : Linux/arch/arm/boot/compressed head-shark.S,1.1.1.1,1.1.1.1.8.1 head-s
Status: Alpha
Brought to you by:
taost6
Menu
▾
▴
[Netnice-commitlog] netnice : Linux/arch/arm/boot/compressed head-shark.S,1.1.1.1,1.1.1.1.8.1 head-sharpsl.S,1.1.1.1,1.1.1.1.6.1 head.S,1.1.1.2,1.1.1.2.6.1 misc.c,1.1.1.2,1.1.1.2.6.1 ofw-shark.c,1.1.1.2,1.1.1.2.6.1
|
From: bhatt k. m. <rou...@us...> - 2006-02-16 10:13:53
|
Update of /cvsroot/netnice/Linux/arch/arm/boot/compressed In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv2102/boot/compressed Modified Files: Tag: netnice2615 head-shark.S head-sharpsl.S head.S misc.c ofw-shark.c Log Message: netnice patch updated to linux kernel 2.6.15. --Kartikey BHATT Index: head.S =================================================================== RCS file: /cvsroot/netnice/Linux/arch/arm/boot/compressed/head.S,v retrieving revision 1.1.1.2 retrieving revision 1.1.1.2.6.1 diff -u -d -r1.1.1.2 -r1.1.1.2.6.1 --- head.S 5 Nov 2005 19:52:11 -0000 1.1.1.2 +++ head.S 16 Feb 2006 10:13:12 -0000 1.1.1.2.6.1 @@ -19,38 +19,28 @@ */ #ifdef DEBUG -#include <asm/arch/debug-macro.S> - #if defined(CONFIG_DEBUG_ICEDCC) .macro loadsp, rb .endm - .macro writeb, ch, rb + .macro writeb, ch, rb mcr p14, 0, \ch, c0, c1, 0 .endm #else + +#include <asm/arch/debug-macro.S> + .macro writeb, ch, rb senduart \ch, \rb .endm -#if defined(CONFIG_FOOTBRIDGE) || \ - defined(CONFIG_ARCH_RPC) || \ - defined(CONFIG_ARCH_INTEGRATOR) || \ - defined(CONFIG_ARCH_PXA) || \ - defined(CONFIG_ARCH_IXP4XX) || \ - defined(CONFIG_ARCH_IXP2000) || \ - defined(CONFIG_ARCH_LH7A40X) || \ - defined(CONFIG_ARCH_OMAP) - .macro loadsp, rb - addruart \rb - .endm -#elif defined(CONFIG_ARCH_SA1100) +#if defined(CONFIG_ARCH_SA1100) .macro loadsp, rb mov \rb, #0x80000000 @ physical base address -# if defined(CONFIG_DEBUG_LL_SER3) +#ifdef CONFIG_DEBUG_LL_SER3 add \rb, \rb, #0x00050000 @ Ser3 -# else +#else add \rb, \rb, #0x00010000 @ Ser1 -# endif +#endif .endm #elif defined(CONFIG_ARCH_IOP331) .macro loadsp, rb @@ -64,7 +54,9 @@ add \rb, \rb, #0x4000 * CONFIG_S3C2410_LOWLEVEL_UART_PORT .endm #else -#error no serial architecture defined + .macro loadsp, rb + addruart \rb + .endm #endif #endif #endif Index: head-shark.S =================================================================== RCS file: /cvsroot/netnice/Linux/arch/arm/boot/compressed/head-shark.S,v retrieving revision 1.1.1.1 retrieving revision 1.1.1.1.8.1 diff -u -d -r1.1.1.1 -r1.1.1.1.8.1 --- head-shark.S 13 Jul 2004 07:19:36 -0000 1.1.1.1 +++ head-shark.S 16 Feb 2006 10:13:12 -0000 1.1.1.1.8.1 @@ -63,8 +63,8 @@ mov pc, r2 -__copy_target: .long 0x08508000 -__copy_end: .long 0x08608000 +__copy_target: .long 0x08507FFC +__copy_end: .long 0x08607FFC .word _start .word __bss_start @@ -73,9 +73,10 @@ __temp_stack: .space 128 __mmu_off: - adr r0, __ofw_data + adr r0, __ofw_data @ read the 1. entry of the memory map ldr r0, [r0, #4] orr r0, r0, #0x00600000 + sub r0, r0, #4 ldr r1, __copy_end ldr r3, __copy_target @@ -89,20 +90,43 @@ * from 0x08500000 to 0x08508000 if we have only 8MB */ +/* As we get more 2.6-kernels it gets more and more + * uncomfortable to be bound to kernel images of 1MB only. + * So we add a loop here, to be able to copy some more. + * Alexander Schulz 2005-07-17 + */ + + mov r4, #3 @ How many megabytes to copy + + +__MoveCode: sub r4, r4, #1 __Copy: ldr r2, [r0], #-4 str r2, [r1], #-4 teq r1, r3 bne __Copy + + /* The firmware maps us in blocks of 1 MB, the next block is + _below_ the last one. So our decrementing source pointer + ist right here, but the destination pointer must be increased + by 2 MB */ + add r1, r1, #0x00200000 + add r3, r3, #0x00100000 + + teq r4, #0 + bne __MoveCode + + /* and jump to it */ - adr r2, __go_on - adr r0, __ofw_data + adr r2, __go_on @ where we want to jump + adr r0, __ofw_data @ read the 1. entry of the memory map ldr r0, [r0, #4] - sub r2, r2, r0 - sub r2, r2, #0x00500000 - ldr r0, __copy_target + sub r2, r2, r0 @ we are mapped add 0e50 now, sub that (-0e00) + sub r2, r2, #0x00500000 @ -0050 + ldr r0, __copy_target @ and add 0850 8000 instead + add r0, r0, #4 add r2, r2, r0 - mov pc, r2 + mov pc, r2 @ and jump there __go_on: adr sp, __temp_stack Index: ofw-shark.c =================================================================== RCS file: /cvsroot/netnice/Linux/arch/arm/boot/compressed/ofw-shark.c,v retrieving revision 1.1.1.2 retrieving revision 1.1.1.2.6.1 diff -u -d -r1.1.1.2 -r1.1.1.2.6.1 --- ofw-shark.c 5 Nov 2005 19:52:12 -0000 1.1.1.2 +++ ofw-shark.c 16 Feb 2006 10:13:12 -0000 1.1.1.2.6.1 @@ -256,5 +256,5 @@ temp[11]='\0'; mem_len = OF_getproplen(o,phandle, temp); OF_getprop(o,phandle, temp, buffer, mem_len); - (unsigned char) pointer[32] = ((unsigned char *) buffer)[mem_len-2]; + * ((unsigned char *) &pointer[32]) = ((unsigned char *) buffer)[mem_len-2]; } Index: misc.c =================================================================== RCS file: /cvsroot/netnice/Linux/arch/arm/boot/compressed/misc.c,v retrieving revision 1.1.1.2 retrieving revision 1.1.1.2.6.1 diff -u -d -r1.1.1.2 -r1.1.1.2.6.1 --- misc.c 5 Nov 2005 19:52:12 -0000 1.1.1.2 +++ misc.c 16 Feb 2006 10:13:12 -0000 1.1.1.2.6.1 @@ -30,7 +30,7 @@ #define putstr icedcc_putstr #define putc icedcc_putc -extern void idedcc_putc(int ch); +extern void icedcc_putc(int ch); static void icedcc_putstr(const char *ptr) @@ -283,8 +283,14 @@ putstr("."); } +#ifndef arch_error +#define arch_error(x) +#endif + static void error(char *x) { + arch_error(x); + putstr("\n\n"); putstr(x); putstr("\n\n -- System halted"); Index: head-sharpsl.S =================================================================== RCS file: /cvsroot/netnice/Linux/arch/arm/boot/compressed/head-sharpsl.S,v retrieving revision 1.1.1.1 retrieving revision 1.1.1.1.6.1 diff -u -d -r1.1.1.1 -r1.1.1.1.6.1 --- head-sharpsl.S 5 Nov 2005 19:52:11 -0000 1.1.1.1 +++ head-sharpsl.S 16 Feb 2006 10:13:12 -0000 1.1.1.1.6.1 @@ -7,7 +7,8 @@ * so we have to figure out the machine for ourselves... * * Support for Poodle, Corgi (SL-C700), Shepherd (SL-C750) - * and Husky (SL-C760). + * Husky (SL-C760), Tosa (SL-C6000), Spitz (SL-C3000), + * Akita (SL-C1000) and Borzoi (SL-C3100). * */ @@ -23,6 +24,22 @@ __SharpSL_start: +/* Check for TC6393 - if found we have a Tosa */ + ldr r7, .TOSAID + mov r1, #0x10000000 @ Base address of TC6393 chip + mov r6, #0x03 + ldrh r3, [r1, #8] @ Load TC6393XB Revison: This is 0x0003 + cmp r6, r3 + beq .SHARPEND @ Success -> tosa + +/* Check for pxa270 - if found, branch */ + mrc p15, 0, r4, c0, c0 @ Get Processor ID + and r4, r4, #0xffffff00 + ldr r3, .PXA270ID + cmp r4, r3 + beq .PXA270 + +/* Check for w100 - if not found we have a Poodle */ ldr r1, .W100ADDR @ Base address of w100 chip + regs offset mov r6, #0x31 @ Load Magic Init value @@ -30,7 +47,7 @@ mov r5, #0x3000 .W100LOOP: subs r5, r5, #1 - bne .W100LOOP + bne .W100LOOP mov r6, #0x30 @ Load 2nd Magic Init value str r6, [r1, #0x280] @ to SCRATCH_UMSK @@ -40,45 +57,52 @@ cmp r6, r3 bne .SHARPEND @ We have no w100 - Poodle - mrc p15, 0, r6, c0, c0 @ Get Processor ID - and r6, r6, #0xffffff00 +/* Check for pxa250 - if found we have a Corgi */ ldr r7, .CORGIID ldr r3, .PXA255ID - cmp r6, r3 + cmp r4, r3 blo .SHARPEND @ We have a PXA250 - Corgi - mov r1, #0x0c000000 @ Base address of NAND chip - ldrb r3, [r1, #24] @ Load FLASHCTL - bic r3, r3, #0x11 @ SET NCE - orr r3, r3, #0x0a @ SET CLR + FLWP - strb r3, [r1, #24] @ Save to FLASHCTL - mov r2, #0x90 @ Command "readid" - strb r2, [r1, #20] @ Save to FLASHIO - bic r3, r3, #2 @ CLR CLE - orr r3, r3, #4 @ SET ALE - strb r3, [r1, #24] @ Save to FLASHCTL - mov r2, #0 @ Address 0x00 - strb r2, [r1, #20] @ Save to FLASHIO - bic r3, r3, #4 @ CLR ALE - strb r3, [r1, #24] @ Save to FLASHCTL -.SHARP1: - ldrb r3, [r1, #24] @ Load FLASHCTL - tst r3, #32 @ Is chip ready? - beq .SHARP1 - ldrb r2, [r1, #20] @ NAND Manufacturer ID - ldrb r3, [r1, #20] @ NAND Chip ID +/* Check for 64MiB flash - if found we have a Shepherd */ + bl get_flash_ids ldr r7, .SHEPHERDID cmp r3, #0x76 @ 64MiB flash beq .SHARPEND @ We have Shepherd + +/* Must be a Husky */ ldr r7, .HUSKYID @ Must be Husky b .SHARPEND +.PXA270: +/* Check for 16MiB flash - if found we have Spitz */ + bl get_flash_ids + ldr r7, .SPITZID + cmp r3, #0x73 @ 16MiB flash + beq .SHARPEND @ We have Spitz + +/* Check for a second SCOOP chip - if found we have Borzoi */ + ldr r1, .SCOOP2ADDR + ldr r7, .BORZOIID + mov r6, #0x0140 + strh r6, [r1] + ldrh r6, [r1] + cmp r6, #0x0140 + beq .SHARPEND @ We have Borzoi + +/* Must be Akita */ + ldr r7, .AKITAID + b .SHARPEND @ We have Borzoi + .PXA255ID: .word 0x69052d00 @ PXA255 Processor ID +.PXA270ID: + .word 0x69054100 @ PXA270 Processor ID .W100ID: .word 0x57411002 @ w100 Chip ID .W100ADDR: .word 0x08010000 @ w100 Chip ID Reg Address +.SCOOP2ADDR: + .word 0x08800040 .POODLEID: .word MACH_TYPE_POODLE .CORGIID: @@ -87,6 +111,41 @@ .word MACH_TYPE_SHEPHERD .HUSKYID: .word MACH_TYPE_HUSKY -.SHARPEND: +.TOSAID: + .word MACH_TYPE_TOSA +.SPITZID: + .word MACH_TYPE_SPITZ +.AKITAID: + .word MACH_TYPE_AKITA +.BORZOIID: + .word MACH_TYPE_BORZOI +/* + * Return: r2 - NAND Manufacturer ID + * r3 - NAND Chip ID + * Corrupts: r1 + */ +get_flash_ids: + mov r1, #0x0c000000 @ Base address of NAND chip + ldrb r3, [r1, #24] @ Load FLASHCTL + bic r3, r3, #0x11 @ SET NCE + orr r3, r3, #0x0a @ SET CLR + FLWP + strb r3, [r1, #24] @ Save to FLASHCTL + mov r2, #0x90 @ Command "readid" + strb r2, [r1, #20] @ Save to FLASHIO + bic r3, r3, #2 @ CLR CLE + orr r3, r3, #4 @ SET ALE + strb r3, [r1, #24] @ Save to FLASHCTL + mov r2, #0 @ Address 0x00 + strb r2, [r1, #20] @ Save to FLASHIO + bic r3, r3, #4 @ CLR ALE + strb r3, [r1, #24] @ Save to FLASHCTL +.fids1: + ldrb r3, [r1, #24] @ Load FLASHCTL + tst r3, #32 @ Is chip ready? + beq .fids1 + ldrb r2, [r1, #20] @ NAND Manufacturer ID + ldrb r3, [r1, #20] @ NAND Chip ID + mov pc, lr +.SHARPEND: |
