Re: [Nasm-devel] Re: CPU directive

[H. P. A. <hp...@zy...>]

John Coffman wrote:
> The CPU directive is useful for lower processors:
> 
>   cpu 8086
>   cpu 286
> 
> because each processor added more instructions.  That is, the 286
> instruction set is a proper subset of the 386; the 186 instruction set is a
> proper subset of the 286; and the 8086 instruction set is a proper subset
> of the 186:
> 
>    386 > 286 > 186 > 8086
> 
> But when you get to the MMX, MMX2, SSE, SSE2, 3Dnow, 3Dnow2 ... instruction
> sets on higher processors, the nice proper subset relationship breaks down.
> 
> As Peter points out, CPU 8086 is useful, to prevent a silent failure of an
> instruction which will not execute on an 8086; e.g., a NEAR conditional
> branch.
> 
> But, remember, higher processors trap illegal opcodes, unlike the 8086, so
> debugging is not impossible.
> 
> Yes, the CPU directive needs to be revisited:  starting with a matrix of
> ALL higher processors, and what instruction classes are supported.
> 

It's worse than that.  Consider the AMD Athlon.  Some Athlons support
SSE, and some don't.  Yet they are both sold under the name "Athlon", so
now you have to invent something to support this particular set.

	-hpa