[Nasm-bugs] [ nasm-Bugs-2787931 ] SSE5 spec changed

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Bugs item #2787931, was opened at 2009-05-06 08:59
Message generated for change (Comment added) made by hpa
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Category: Assembler
Group: None
>Status: Closed
>Resolution: Fixed
Priority: 5
Private: No
Submitted By: Nobody/Anonymous (nobody)
Assigned to: Nobody/Anonymous (nobody)
Summary: SSE5 spec changed

Initial Comment:
AMD have changed their specification of SSE5 instructions to make it compatible with Intel's VEX format. See
http://support.amd.com/us/Processor_TechDocs/43479.pdf

This new AMD manual has typos, see http://forums.amd.com/forum/messageview.cfm?catid=203&threadid=112835&enterthread=y

I have supported the change in my disassembler http://www.agner.org/optimize/#objconv but it is not debugged yet because I have no assembler to test it against.

Agner

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Comment By: H. Peter Anvin (hpa)
Date: 2009-06-26 16:24

Message:
This item has been resolved; the fix has been checked into git
(http://repo.or.cz/w/nasm.git) and will be in the next release.
You can usually also obtain a nightly snapshot at
ftp://ftp.zytor.com/pub/nasm/snapshots/; the snapshot robot usually runs
some time between 07:00 and 10:30 UTC, but sometimes runs immediately if
there was no previous snapshot for today.



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Comment By: H. Peter Anvin (hpa)
Date: 2009-05-06 09:10

Message:
The current git tree has support for the XOP encoding; however, it would be
very useful if someone other than me could volunteer to enter the
instruction table.  This is especially so given my current employment...


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