From: H. P. A. <hp...@zy...> - 2008-05-13 04:39:57
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Peter Johnson wrote: > > I'm not seeing a clear delination between (2) and (3). I simply have two > classes in Yasm: CPU names and feature flags. See > http://www.tortall.net/projects/yasm/manual/html/arch-x86-modes.html#arch-x86-cpu > > Also, dependencies can get difficult with the mix of AMD and Intel. I > simply have a bitmask of features with individual enable/disable (so nosse > does not disable sse2). > The delineation between (2) and (3) is pretty much that (2) are vertical properties which are added to as the CPU evolves, whereas (3) are well-defined single instances; these days they usually get proper names as feature sets because of CPUID. -hpa |