Thread: [myhdl-list] Dynamic data type
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From: Blubaugh, D. A. <dbl...@be...> - 2008-05-20 19:47:04
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To Whom It May Concern, I was wondering that if one were to include floating-point support for MyHDL by developing a support module for such number processing. I was wondering if MYHDL will be able to handle dynamic data type processing. Such as if I were to multiply a complex number (real and complex values are integers) with a floating point number and then finally dividing with an integer number. Will MYHDL and or python be able to handle the multiple different data types to create a final result of a floating-point complex number. Has anyone out there done any relevant work on this topic that will allow for myhdl to create synthesizable Verilog, that handles these multiple variable data type processing?? Thanks, David Blubaugh This e-mail transmission contains information that is confidential and may be privileged. It is intended only for the addressee(s) named above. If you receive this e-mail in error, please do not read, copy or disseminate it in any manner. If you are not the intended recipient, any disclosure, copying, distribution or use of the contents of this information is prohibited. Please reply to the message immediately by informing the sender that the message was misdirected. After replying, please erase it from your computer system. Your assistance in correcting this error is appreciated. |
From: Christopher F. <cf...@uc...> - 2008-05-20 20:16:22
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MyHDL will only convert intbv (maybe others?) data types currently. It wouldn't support what you are suggesting. There seems to be 2 different methods in your comments, 1. Implementing support in MyHDL to handle complex data types 2. Building models for the different complex data types. I believe from previous posts method 1 was encouraged to be a separate tool that utilizes MyHDL but not built into MyHDL, leaving MyHDL as an RTL language. Method 2 would be a collections of floating-point modules etc implemented in MyHDL. On Tue, 20 May 2008 15:46:54 -0400 "Blubaugh, David A." <dbl...@be...> wrote: > To Whom It May Concern, > > > I was wondering that if one were to include floating-point support >for > MyHDL by developing a support module for such number processing. I >was > wondering if MYHDL will be able to handle dynamic data type >processing. > Such as if I were to multiply a complex number (real and complex >values > are integers) with a floating point number and then finally dividing > with an integer number. Will MYHDL and or python be able to handle >the > multiple different data types to create a final result of a > floating-point complex number. Has anyone out there done any >relevant > work on this topic that will allow for myhdl to create synthesizable > Verilog, that handles these multiple variable data type processing?? > > > > Thanks, > > > David Blubaugh > > > > > This e-mail transmission contains information that is confidential >and may be > privileged. It is intended only for the addressee(s) named above. If >you receive > this e-mail in error, please do not read, copy or disseminate it in >any manner. > If you are not the intended recipient, any disclosure, copying, >distribution or > use of the contents of this information is prohibited. Please reply >to the > message immediately by informing the sender that the message was >misdirected. > After replying, please erase it from your computer system. Your >assistance in > correcting this error is appreciated. > |
From: Brendan R. <bre...@gm...> - 2008-05-22 18:10:46
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Blubaugh, David A. <dblubaugh <at> belcan.com> writes: > To Whom It May Concern, > > I was wondering that if one were to include floating-point support for MyHDL by developing a support module for such number processing. I was wondering if MYHDL will be able to handle dynamic data type processing. Such as if I were to multiply a complex number (real and complex values are integers) with a floating point number and then finally dividing with an integer number. Will MYHDL and or python be able to handle the multiple different data types to create a final result of a floating-point complex number. Has anyone out there done any relevant work on this topic that will allow for myhdl to create synthesizable Verilog, that handles these multiple variable data type processing?? > Thanks, > > David Blubaugh Hi David, Including direct support for floating point conversion doesn't make sense. Floating point implementations tend to be architecture (device) specific. Anything that attempts to be generic would not be what people want anyway. What might make sense is something that helps you to convert your floating point algorithms to fixed point, though I'm not convinced that it should be a part of MyHDL. MyHDL should to being an excellent HDL experimentation and generation tool. Along the lines of floating-to-fixed conversion, I found this online: http://users.ece.utexas.edu/~bevans/projects/wordlength/converter/index.html Tom Dillon's company also has some pretty good information on this topic: http://www.dilloneng.com/ingenuity/fixed-vs-floating-point Cheers, - Brendan |
From: Blubaugh, D. A. <dbl...@be...> - 2008-05-22 19:41:43
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Dear Sir, My question still has not been answered. Will there be any development as far as dynamic data typing is concerned? Such as between an integer and a complex number within complex arithmetic? Thanks, David -----Original Message----- From: myh...@li... [mailto:myh...@li...] On Behalf Of Brendan Rankin Sent: Thursday, May 22, 2008 2:10 PM To: myh...@li... Subject: Re: [myhdl-list] Dynamic data type Blubaugh, David A. <dblubaugh <at> belcan.com> writes: > To Whom It May Concern, > > I was wondering that if one were to include floating-point support for > MyHDL by developing a support module for such number processing. I was wondering if MYHDL will be able to handle dynamic data type processing. Such as if I were to multiply a complex number (real and complex values are integers) with a floating point number and then finally dividing with an integer number. Will MYHDL and or python be able to handle the multiple different data types to create a final result of a floating-point complex number. Has anyone out there done any relevant work on this topic that will allow for myhdl to create synthesizable Verilog, that handles these multiple variable data type processing?? > Thanks, > > David Blubaugh Hi David, Including direct support for floating point conversion doesn't make sense. Floating point implementations tend to be architecture (device) specific. Anything that attempts to be generic would not be what people want anyway. What might make sense is something that helps you to convert your floating point algorithms to fixed point, though I'm not convinced that it should be a part of MyHDL. MyHDL should to being an excellent HDL experimentation and generation tool. Along the lines of floating-to-fixed conversion, I found this online: http://users.ece.utexas.edu/~bevans/projects/wordlength/converter/index. html Tom Dillon's company also has some pretty good information on this topic: http://www.dilloneng.com/ingenuity/fixed-vs-floating-point Cheers, - Brendan ------------------------------------------------------------------------ - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ myhdl-list mailing list myh...@li... https://lists.sourceforge.net/lists/listinfo/myhdl-list This e-mail transmission contains information that is confidential and may be privileged. It is intended only for the addressee(s) named above. If you receive this e-mail in error, please do not read, copy or disseminate it in any manner. If you are not the intended recipient, any disclosure, copying, distribution or use of the contents of this information is prohibited. Please reply to the message immediately by informing the sender that the message was misdirected. After replying, please erase it from your computer system. Your assistance in correcting this error is appreciated. |