Thread: [myhdl-list] tools for the Lattice ICE-40 FPGA.
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From: Edward V. <dev...@sb...> - 2015-09-14 17:30:59
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Hi all, I just completed building the tools (Yosys, arachne-pnr, and icebox) for the Lattice ICE-40. It appears this will fit on a 4GB SD card. With the board that XESS is making this will be a standalone HDL development system with GTKWave, XSTOOLs, Iverilog, arachne-pnr(place and route), Yosys (Yosys is a framework for Verilog RTL synthesis), icebox(this will not be needed since XESS is going to push the bit file with GPIO instead of USB), and MyHDL.These were built on a custom image for the Raspberry Pi 2 B with Yocto. If you have any questions let me know.Regards, Below are some tests that I ran on Raspberry Pi 2 B. g++ -Isrc -std=c++11 -MD -O2 -Wall -Wshadow -Wsign-compare -Werror -c -o tests/test_bv.o tests/test_bv.cc g++ -Isrc -std=c++11 -MD -O2 -Wall -Wshadow -Wsign-compare -Werror -o tests/test_bv tests/test_bv.o g++ -Isrc -std=c++11 -MD -O2 -Wall -Wshadow -Wsign-compare -Werror -c -o tests/test_us.o tests/test_us.cc g++ -Isrc -std=c++11 -MD -O2 -Wall -Wshadow -Wsign-compare -Werror -o tests/test_us tests/test_us.o ./tests/test_bv ./tests/test_us make -C examples/rot clean && make -C examples/rot make[1]: Entering directory '/home/root/arachne-pnr/examples/rot' rm -f rot.blif rot.txt rot.ex rot.bin make[1]: Leaving directory '/home/root/arachne-pnr/examples/rot' make[1]: Entering directory '/home/root/arachne-pnr/examples/rot' yosys -q -p "synth_ice40 -blif rot.blif" rot.v Warning: Wire top.ready has an unprocessed 'init' attribute. ../../bin/arachne-pnr -p rot.pcf rot.blif -o rot.txt seed: 1 device: 1k read_chipdb +/share/arachne-pnr/chipdb-1k.bin... supported packages: tq144 read_blif rot.blif... prune... read_pcf rot.pcf... instantiate_io... pack... After packing: IOs 6 / 96 LCs 66 / 1280 DFF 29 CARRY 23 CARRY, DFF 0 DFF PASS 5 CARRY PASS 2 BRAMs 0 / 16 WARMBOOTs 0 / 1 GBs 0 / 8 promote_globals... promoted clk$2, 29 / 29 promoted $abc$447$n1, 28 / 28 promoted 2 nets 1 sr/we 1 clk 2 globals 1 sr/we 1 clk realize_constants... realized 1 place... initial wire length = 1015 final wire length = 101 After placement: PIOs 4 / 96 PLBs 16 / 160 BRAMs 0 / 16 place time 2.03s route... pass 1, 0 shared. route time 0.72s write_txt rot.txt... icebox_explain rot.txt > rot.ex icepack rot.txt rot.bin make[1]: Leaving directory '/home/root/arachne-pnr/examples/rot' cd tests/simple && ICEBOX=/usr/local/share/icebox bash run-test.sh + arachne_pnr=../../bin/arachne-pnr + devices='1k 8k' + : /usr/local/share/icebox + rm -f txt.sum + for d in '$devices' + rm -rf 1k + mkdir 1k + ../../bin/arachne-pnr -d 1k -c /usr/local/share/icebox/chipdb-1k.txt --write-binary-chipdb 1k/chipdb-1k.bin seed: 1 device: 1k read_chipdb /usr/local/share/icebox/chipdb-1k.txt... write_binary_chipdb 1k/chipdb-1k.bin + ../../bin/arachne-pnr -d 1k -c 1k/chipdb-1k.bin --write-binary-chipdb 1k/chipdb2-1k.bin seed: 1 device: 1k read_chipdb 1k/chipdb-1k.bin... write_binary_chipdb 1k/chipdb2-1k.bin + cmp 1k/chipdb-1k.bin 1k/chipdb2-1k.bin + ../../bin/arachne-pnr -d 1k sb_up3down5.blif -o 1k/sb_up3down5.txt seed: 1 device: 1k read_chipdb +/share/arachne-pnr/chipdb-1k.bin... supported packages: tq144 read_blif sb_up3down5.blif... prune... instantiate_io... pack... After packing: IOs 24 / 96 LCs 50 / 1280 DFF 12 CARRY 0 CARRY, DFF 0 DFF PASS 7 CARRY PASS 0 BRAMs 0 / 16 WARMBOOTs 0 / 1 GBs 0 / 8 promote_globals... promoted clock$2, 12 / 12 promoted 1 nets 1 clk 1 globals 1 clk realize_constants... place... initial wire length = 383 final wire length = 169 After placement: PIOs 13 / 96 PLBs 15 / 160 BRAMs 0 / 16 place time 2.60s route... pass 1, 0 shared. route time 0.88s write_txt 1k/sb_up3down5.txt... + shasum 1k/sb_up3down5.txt run-test.sh: line 21: shasum: command not found Makefile:50: recipe for target 'test' failed make: *** [test] Error 127 Edward Vidal Jr. e-mail dev...@sb... 915-595-1613 |
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From: Christopher F. <chr...@gm...> - 2015-09-14 18:11:42
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On 9/14/2015 12:30 PM, Edward Vidal wrote: > Hi all, I just completed building the tools (Yosys, arachne-pnr, and > icebox) for the Lattice ICE-40. It appears this will fit on a 4GB > SD card. > > With the board that XESS is making this will be a standalone > HDL development system with GTKWave, XSTOOLs, Iverilog, > arachne-pnr(place and route), Yosys (Yosys is a framework for Verilog > RTL synthesis), icebox(this will not be needed since XESS is going to > push the bit file with GPIO instead of USB), and MyHDL.These were > built on a custom image for the Raspberry Pi 2 B with Yocto. Do you have any benchmarks how long a small design takes to go through the complete toolflow on the R2? Regards, Chris |
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From: Edward V. <dev...@sb...> - 2015-09-14 19:32:21
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tests/ |-- combinatorial | |-- generate.py | `-- run-test.sh |-- fsm | |-- 1k | | |-- uut_00000.log | | |-- uut_00000.pnr-log | | |-- uut_00000_gate.bin | | |-- uut_00000_gate.blif | | |-- uut_00000_gate.chip.txt | | |-- uut_00000_gate.pcf | | |-- uut_00000_gate.v | | |-- uut_00000_pp.log | | |-- uut_00000_pp.v | | |-- uut_00001.log | | |-- uut_00001.pnr-log | | |-- uut_00001_gate.bin | | |-- uut_00001_gate.blif | | |-- uut_00001_gate.chip.txt | | |-- uut_00001_gate.pcf | | |-- uut_00001_gate.v | | |-- uut_00001_pp.log | | |-- uut_00001_pp.v | | |-- uut_00002.log | | |-- uut_00002.pnr-log | | |-- uut_00002_gate.bin | | |-- uut_00002_gate.blif | | |-- uut_00002_gate.chip.txt | | |-- uut_00002_gate.pcf | | |-- uut_00002_gate.v | | |-- uut_00002_pp.log | | |-- uut_00002_pp.v | | |-- uut_00003.log | | |-- uut_00003.pnr-log | | |-- uut_00003_gate.bin | | |-- uut_00003_gate.blif | | |-- uut_00003_gate.chip.txt | | |-- uut_00003_gate.pcf | | |-- uut_00003_gate.v | | |-- uut_00003_pp.log | | |-- uut_00003_pp.v | | |-- uut_00004.log | | |-- uut_00004.pnr-log | | |-- uut_00004_gate.bin | | |-- uut_00004_gate.blif | | |-- uut_00004_gate.chip.txt | | |-- uut_00004_gate.pcf | | |-- uut_00004_gate.v | | |-- uut_00004_pp.log | | |-- uut_00004_pp.v | | |-- uut_00005.log | | |-- uut_00005.pnr-log | | |-- uut_00005_gate.bin | | |-- uut_00005_gate.blif | | |-- uut_00005_gate.chip.txt | | |-- uut_00005_gate.pcf | | |-- uut_00005_gate.v | | |-- uut_00005_pp.log | | |-- uut_00005_pp.v | | |-- uut_00006.log | | |-- uut_00006.pnr-log | | |-- uut_00006_gate.bin | | |-- uut_00006_gate.blif | | |-- uut_00006_gate.chip.txt | | |-- uut_00006_gate.pcf | | |-- uut_00006_gate.v | | |-- uut_00006_pp.log | | |-- uut_00006_pp.v | | |-- uut_00007.log | | |-- uut_00007.pnr-log | | |-- uut_00007_gate.bin | | |-- uut_00007_gate.blif | | |-- uut_00007_gate.chip.txt | | |-- uut_00007_gate.pcf | | |-- uut_00007_gate.v | | |-- uut_00007_pp.log | | |-- uut_00007_pp.v | | |-- uut_00008.pnr-log | | |-- uut_00008_gate.blif | | `-- uut_00008_pp.v | |-- generate.py | |-- run-test.sh | `-- temp | |-- uut_00000.v | |-- uut_00000.ys | |-- uut_00000_pp.ys | |-- uut_00001.v | |-- uut_00001.ys | |-- uut_00001_pp.ys | |-- uut_00002.v | |-- uut_00002.ys | |-- uut_00002_pp.ys | |-- uut_00003.v | |-- uut_00003.ys | |-- uut_00003_pp.ys | |-- uut_00004.v | |-- uut_00004.ys | |-- uut_00004_pp.ys | |-- uut_00005.v | |-- uut_00005.ys | |-- uut_00005_pp.ys | |-- uut_00006.v | |-- uut_00006.ys | |-- uut_00006_pp.ys | |-- uut_00007.v | |-- uut_00007.ys | |-- uut_00007_pp.ys | |-- uut_00008.v | |-- uut_00008.ys | |-- uut_00008_pp.ys | |-- uut_00009.v | |-- uut_00009.ys | |-- uut_00009_pp.ys | |-- uut_00010.v | |-- uut_00010.ys | |-- uut_00010_pp.ys | |-- uut_00011.v | |-- uut_00011.ys | |-- uut_00011_pp.ys | |-- uut_00012.v | |-- uut_00012.ys | |-- uut_00012_pp.ys | |-- uut_00013.v | |-- uut_00013.ys | |-- uut_00013_pp.ys | |-- uut_00014.v | |-- uut_00014.ys | |-- uut_00014_pp.ys | |-- uut_00015.v | |-- uut_00015.ys | |-- uut_00015_pp.ys | |-- uut_00016.v | |-- uut_00016.ys | |-- uut_00016_pp.ys | |-- uut_00017.v | |-- uut_00017.ys | |-- uut_00017_pp.ys | |-- uut_00018.v | |-- uut_00018.ys | |-- uut_00018_pp.ys | |-- uut_00019.v | |-- uut_00019.ys | |-- uut_00019_pp.ys | |-- uut_00020.v | |-- uut_00020.ys | |-- uut_00020_pp.ys | |-- uut_00021.v | |-- uut_00021.ys | |-- uut_00021_pp.ys | |-- uut_00022.v | |-- uut_00022.ys | |-- uut_00022_pp.ys | |-- uut_00023.v | |-- uut_00023.ys | |-- uut_00023_pp.ys | |-- uut_00024.v | |-- uut_00024.ys | `-- uut_00024_pp.ys |-- regression | |-- 1k | | |-- bram1.bin | | |-- bram1.txt | | |-- carry_pack_fail1.bin | | |-- carry_pack_fail1.txt | | |-- carry_route_fail1.chip.v | | |-- carry_route_fail1.log | | |-- carry_route_fail1.pcf | | |-- carry_route_fail1.txt | | |-- test1.bin | | |-- test1.txt | | |-- test2.bin | | `-- test2.txt | |-- 8k | | |-- bram1.bin | | |-- bram1.txt | | |-- carry_pack_fail1.bin | | |-- carry_pack_fail1.txt | | |-- carry_route_fail1.chip.v | | |-- carry_route_fail1.log | | |-- carry_route_fail1.pcf | | |-- carry_route_fail1.txt | | |-- test1.bin | | |-- test1.txt | | |-- test2.bin | | `-- test2.txt | |-- bram1.blif | |-- carry_pack_fail1.blif | |-- carry_route_fail1.blif | |-- carry_route_fail1.v | |-- run-test.sh | |-- test1.blif | `-- test2.blif |-- simple | |-- 1k | | |-- bram.bin | | |-- bram.txt | | |-- carry.bin | | |-- carry.txt | | |-- chipdb-1k.bin | | |-- chipdb2-1k.bin | | |-- sb_up3down5.bin | | |-- sb_up3down5.txt | | |-- sb_up3down5_l.bin | | |-- sb_up3down5_l.txt | | |-- sb_up3down5_packed.bin | | |-- sb_up3down5_packed.blif | | `-- sb_up3down5_packed.txt | |-- 8k | | |-- bram.bin | | |-- bram.txt | | |-- carry.bin | | |-- carry.txt | | |-- chipdb-8k.bin | | |-- chipdb2-8k.bin | | |-- sb_up3down5.bin | | |-- sb_up3down5.txt | | |-- sb_up3down5_l.bin | | |-- sb_up3down5_l.txt | | |-- sb_up3down5_packed.bin | | |-- sb_up3down5_packed.blif | | `-- sb_up3down5_packed.txt | |-- bram.blif | |-- carry.blif | |-- run-test.sh | |-- run-valgrind-test.sh | |-- sb_up3down5.blif | `-- txt.sum |-- test_bv |-- test_bv.cc |-- test_bv.d |-- test_bv.o |-- test_us |-- test_us.cc |-- test_us.d `-- test_us.o 10 directories, 225 files |
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From: Christopher F. <chr...@gm...> - 2015-09-15 04:27:32
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On 9/14/15 2:32 PM, Edward Vidal wrote:
> Hi Chris, I added code to compute the shasum and now the make test is
> running longer. I now are seeing 29 bin files. This after
> installing the shasum which is about 50 mins.
>
> ls -la ~/shasum ; date -rwxr-xr-x 1 root root 23216 Sep 14 17:27
> /home/root/shasum Mon Sep 14 18:09:18 UTC 2015
Kinda, but I was curious how long it would comparatively
take to generate a bitstream starting with a myhdl file.
I don't have an R2 (or 1) to test but the following is
an example starting with a myhdl file, generating a
bitstream for an icestick using the open-source tools [1].
I built this into some automation stuff I have used in
the past. Running the example on my old'sh ubuntu system
I get:
>> time python ex_icestick.py
real 0m3.6s
The above converts the simple myhdl file, then runs the
yosys/arachne/icestorm to generate the bitstream. I
don't have an icestick so I couldn't test it.
Regards,
Chris
[1]
https://github.com/cfelton/rhea/blob/master/examples/build/ex_icestick.py
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From: Edward V. <dev...@sb...> - 2015-09-15 13:11:30
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Chris,Test results myhdl 15 sec yosys 11 sec The resulting files are located at https://github.com/develone/raspberrypi2_yocto.git The folder benchmark_yosys contains the file bench_mark_yosys.txt the steps I used and the files generated on RaspBerry Pi 2B. It also has the iceiver folder. Note chmod +x iceriver/icestick.sh to make it work. Now need to compare the generated files that you got on Ubuntu.Let me if that is what you wanted. I do not have a board to test the bin file.Regards Edward Vidal Jr. e-mail dev...@sb... 915-595-1613 On Monday, September 14, 2015 10:28 PM, Christopher Felton <chr...@gm...> wrote: On 9/14/15 2:32 PM, Edward Vidal wrote: > Hi Chris, I added code to compute the shasum and now the make test is > running longer. I now are seeing 29 bin files. This after > installing the shasum which is about 50 mins. > > ls -la ~/shasum ; date -rwxr-xr-x 1 root root 23216 Sep 14 17:27 > /home/root/shasum Mon Sep 14 18:09:18 UTC 2015 Kinda, but I was curious how long it would comparatively take to generate a bitstream starting with a myhdl file. I don't have an R2 (or 1) to test but the following is an example starting with a myhdl file, generating a bitstream for an icestick using the open-source tools [1]. I built this into some automation stuff I have used in the past. Running the example on my old'sh ubuntu system I get: >> time python ex_icestick.py real 0m3.6s The above converts the simple myhdl file, then runs the yosys/arachne/icestorm to generate the bitstream. I don't have an icestick so I couldn't test it. Regards, Chris [1] https://github.com/cfelton/rhea/blob/master/examples/build/ex_icestick.py ------------------------------------------------------------------------------ _______________________________________________ myhdl-list mailing list myh...@li... https://lists.sourceforge.net/lists/listinfo/myhdl-list |
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From: Edward V. <dev...@sb...> - 2015-09-17 13:12:37
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Hello All,Ran the test that Chris provided "time python ex_icestick.py" on 2 Ubuntu 12.04(2 core & 6 core AMD) and Pi 2B built w/yocto. GCC needed to be upgraded to 4.9 from 4.6 to compile the tools. This site provides and explanation on how to upgrade. http://charette.no-ip.com:81/programming/2011-12-24_GCCv47/ | Yocto Pi 2B | | | | | | real | 0m20.943s | | user | 0m12.210s | | sys | 0m0.500s | | | | | Ubuntu 2 core | | | real | 0m5.310s | | user | 0m1.865s | | sys | 0m0.197s | | | | | Ubuntu 6 core | | | | | | real | 0m3.956s | | user | 0m1.093s | | sys | 0m0.120s | Dave completed the layout of the ICE-40 board a few days ago. - Lattice iCE40-HX8K FPGA in 256-pin BGA. - 32 MByte SDRAM (16M x 16). - Serial configuration flash (at least 2 Mbit). - Three Grove connectors. - Two PMOD connectors. - One 20x2 header with 3.3V, ground and 18 FPGA I/Os. - Two SATA headers (for differential signals; don't know if they would work with SATA HDDs.) - DIP switch with four SPST switches. - Two momentary pushbuttons. - Four LEDs. - 32 KByte HAT EEPROM. - 40-pin RPi GPIO header. Excited to test. Let me know if you have any questions.Cheers Edward Vidal Jr. e-mail dev...@sb... 915-595-1613 On Tuesday, September 15, 2015 7:11 AM, Edward Vidal <dev...@sb...> wrote: Chris,Test results myhdl 15 sec yosys 11 sec The resulting files are located at https://github.com/develone/raspberrypi2_yocto.git The folder benchmark_yosys contains the file bench_mark_yosys.txt the steps I used and the files generated on RaspBerry Pi 2B. It also has the iceiver folder. Note chmod +x iceriver/icestick.sh to make it work. Now need to compare the generated files that you got on Ubuntu.Let me if that is what you wanted. I do not have a board to test the bin file.Regards Edward Vidal Jr. e-mail dev...@sb... 915-595-1613 On Monday, September 14, 2015 10:28 PM, Christopher Felton <chr...@gm...> wrote: On 9/14/15 2:32 PM, Edward Vidal wrote: > Hi Chris, I added code to compute the shasum and now the make test is > running longer. I now are seeing 29 bin files. This after > installing the shasum which is about 50 mins. > > ls -la ~/shasum ; date -rwxr-xr-x 1 root root 23216 Sep 14 17:27 > /home/root/shasum Mon Sep 14 18:09:18 UTC 2015 Kinda, but I was curious how long it would comparatively take to generate a bitstream starting with a myhdl file. I don't have an R2 (or 1) to test but the following is an example starting with a myhdl file, generating a bitstream for an icestick using the open-source tools [1]. I built this into some automation stuff I have used in the past. Running the example on my old'sh ubuntu system I get: >> time python ex_icestick.py real 0m3.6s The above converts the simple myhdl file, then runs the yosys/arachne/icestorm to generate the bitstream. I don't have an icestick so I couldn't test it. Regards, Chris [1] https://github.com/cfelton/rhea/blob/master/examples/build/ex_icestick.py ------------------------------------------------------------------------------ _______________________________________________ myhdl-list mailing list myh...@li... https://lists.sourceforge.net/lists/listinfo/myhdl-list ------------------------------------------------------------------------------ _______________________________________________ myhdl-list mailing list myh...@li... https://lists.sourceforge.net/lists/listinfo/myhdl-list |
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