myhdl-list

[myhdl-list] Examples of using classes?

[Jeremy H. <jer...@gm...>]

Hi everyone,

I'm currently playing with myhdl, and I was wondering if anyone has
examples on using python classes to describe logic? more specifically, I am
looking for examples of class inheritance being used.

I have looked on the myhdl website and here:
https://github.com/jandecaluwe/myhdl-examples

but everything seems to be defined by functions in functions rather than in
a class.

Thanks,
Jeremy

Re: [myhdl-list] Examples of using classes?

[Christopher F. <chr...@gm...>]

On 7/28/2015 4:52 AM, Jeremy Herbert wrote:
> Hi everyone,
>
> I'm currently playing with myhdl, and I was wondering if anyone has
> examples on using python classes to describe logic? more specifically, I am
> looking for examples of class inheritance being used.
>
> I have looked on the myhdl website and here:
> https://github.com/jandecaluwe/myhdl-examples
>
> but everything seems to be defined by functions in functions rather than in
> a class.

This question pops up every once in awhile from new
users.  I think most users don't use classes as the
modules that contain the logic implementations.
Classes are used for interfaces and objects that might
have logic implementations (implemented in methods).

You can use classes, you just need to provide the
myhdl generators to the simulator and/or conversion
tools.

Can you elaborate how you want to use classes?  Its
not clear to me how inheritance can help logic
implementations.


Regards,
Chris

Re: [myhdl-list] Examples of using classes?

[Jeremy H. <jer...@gm...>]

Hi Chris,

I was thinking of using inheritance in defining interfaces using classes
like so:

class FIFO(object):
...

class AXIFIFO(FIFO):
...

class WishboneFIFO(FIFO):
...

Or even mixins:

class FIFO(object):
...

class AXI4SSlaveMixin(object):
...

class AXI4SMasterMixin(object):
...

class AXIFIFO(FIFO, AXI4SSlaveMixin, AXI4SMasterMixin):
...

Does this make sense? I'd basically like to be able to drop the
AXI4SSlaveMixin and replace it with WishboneSlaveMixin and have it "just
work".

Thanks,
Jeremy

On Tue, 28 Jul 2015 at 23:22 Christopher Felton <chr...@gm...>
wrote:

> On 7/28/2015 4:52 AM, Jeremy Herbert wrote:
> > Hi everyone,
> >
> > I'm currently playing with myhdl, and I was wondering if anyone has
> > examples on using python classes to describe logic? more specifically, I
> am
> > looking for examples of class inheritance being used.
> >
> > I have looked on the myhdl website and here:
> > https://github.com/jandecaluwe/myhdl-examples
> >
> > but everything seems to be defined by functions in functions rather than
> in
> > a class.
>
> This question pops up every once in awhile from new
> users.  I think most users don't use classes as the
> modules that contain the logic implementations.
> Classes are used for interfaces and objects that might
> have logic implementations (implemented in methods).
>
> You can use classes, you just need to provide the
> myhdl generators to the simulator and/or conversion
> tools.
>
> Can you elaborate how you want to use classes?  Its
> not clear to me how inheritance can help logic
> implementations.
>
>
> Regards,
> Chris
>
>
>
>
>
> ------------------------------------------------------------------------------
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

Re: [myhdl-list] Examples of using classes?

[Christopher F. <chr...@gm...>]

On 7/28/15 5:50 PM, Jeremy Herbert wrote:
> Hi Chris,
>
> I was thinking of using inheritance in defining interfaces using classes
> like so:
>
> class FIFO(object):
> ...
>
> class AXIFIFO(FIFO):
> ...
>
> class WishboneFIFO(FIFO):
> ...
>
> Or even mixins:
>
> class FIFO(object):
> ...
>
> class AXI4SSlaveMixin(object):
> ...
>
> class AXI4SMasterMixin(object):
> ...
>
> class AXIFIFO(FIFO, AXI4SSlaveMixin, AXI4SMasterMixin):
> ...
>
> Does this make sense? I'd basically like to be able to drop the
> AXI4SSlaveMixin and replace it with WishboneSlaveMixin and have it "just
> work".

Yes, defining interfaces like this is great and you
can attach transactors, adapters, etc.

My approached would be to define the interfaces and
still use a function (myhdl module/component):

     def fifo(stream_in, stream_o):
         inst_adapter_i = stream_i.adapter() # bus specific to generic
         inst_adapter_o = stream_o.adapter() # ""

         # add logic ....
         @always_seq(stream_i.clock.posedge, ...)
         def rtl_in():
             if stream_i.valid:


     stream_in = AXI4()  # instantiate the specifi bus
     stream_out = AXI4() # instantiate the specific bus
     inst_fifo = fifo(stream_in, stream_out)

This is kinda like what I did here:
https://github.com/cfelton/minnesota/tree/master/mn/system

Regards,
Chris

Re: [myhdl-list] Examples of using classes?

[Jeremy H. <jer...@gm...>]

Thanks, I'll take a look!
On Wed, 29 Jul 2015 at 10:18 am Christopher Felton <chr...@gm...>
wrote:

> On 7/28/15 5:50 PM, Jeremy Herbert wrote:
> > Hi Chris,
> >
> > I was thinking of using inheritance in defining interfaces using classes
> > like so:
> >
> > class FIFO(object):
> > ...
> >
> > class AXIFIFO(FIFO):
> > ...
> >
> > class WishboneFIFO(FIFO):
> > ...
> >
> > Or even mixins:
> >
> > class FIFO(object):
> > ...
> >
> > class AXI4SSlaveMixin(object):
> > ...
> >
> > class AXI4SMasterMixin(object):
> > ...
> >
> > class AXIFIFO(FIFO, AXI4SSlaveMixin, AXI4SMasterMixin):
> > ...
> >
> > Does this make sense? I'd basically like to be able to drop the
> > AXI4SSlaveMixin and replace it with WishboneSlaveMixin and have it "just
> > work".
>
> Yes, defining interfaces like this is great and you
> can attach transactors, adapters, etc.
>
> My approached would be to define the interfaces and
> still use a function (myhdl module/component):
>
>      def fifo(stream_in, stream_o):
>          inst_adapter_i = stream_i.adapter() # bus specific to generic
>          inst_adapter_o = stream_o.adapter() # ""
>
>          # add logic ....
>          @always_seq(stream_i.clock.posedge, ...)
>          def rtl_in():
>              if stream_i.valid:
>
>
>      stream_in = AXI4()  # instantiate the specifi bus
>      stream_out = AXI4() # instantiate the specific bus
>      inst_fifo = fifo(stream_in, stream_out)
>
> This is kinda like what I did here:
> https://github.com/cfelton/minnesota/tree/master/mn/system
>
> Regards,
> Chris
>
>
>
>
> ------------------------------------------------------------------------------
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> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>